diff options
Diffstat (limited to 'snd-alpx/include')
| -rw-r--r-- | snd-alpx/include/4.16/dmaengine.h | 174 | ||||
| -rw-r--r-- | snd-alpx/include/4.16/virt-dma.h | 221 | ||||
| -rw-r--r-- | snd-alpx/include/5.10/regmap.h | 1765 | ||||
| -rw-r--r-- | snd-alpx/include/5.14/regmap.h | 2041 | ||||
| -rw-r--r-- | snd-alpx/include/5.3/dmaengine.h | 174 | ||||
| -rw-r--r-- | snd-alpx/include/5.3/virt-dma.h | 222 | ||||
| -rw-r--r-- | snd-alpx/include/5.6/dmaengine.h | 185 | ||||
| -rw-r--r-- | snd-alpx/include/5.6/virt-dma.h | 227 | ||||
| -rw-r--r-- | snd-alpx/include/6.2/amd_xdma.h | 16 | ||||
| -rw-r--r-- | snd-alpx/include/6.2/dmaengine.h | 1637 | ||||
| -rw-r--r-- | snd-alpx/include/6.3/amd_xdma.h | 16 | ||||
| -rw-r--r-- | snd-alpx/include/6.3/dmaengine.h | 1637 |
12 files changed, 0 insertions, 8315 deletions
diff --git a/snd-alpx/include/4.16/dmaengine.h b/snd-alpx/include/4.16/dmaengine.h deleted file mode 100644 index 501c0b0..0000000 --- a/snd-alpx/include/4.16/dmaengine.h +++ /dev/null @@ -1,174 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * The contents of this file are private to DMA engine drivers, and is not - * part of the API to be used by DMA engine users. - */ -#ifndef DMAENGINE_H -#define DMAENGINE_H - -#include <linux/bug.h> -#include <linux/dmaengine.h> - -/** - * dma_cookie_init - initialize the cookies for a DMA channel - * @chan: dma channel to initialize - */ -static inline void dma_cookie_init(struct dma_chan *chan) -{ - chan->cookie = DMA_MIN_COOKIE; - chan->completed_cookie = DMA_MIN_COOKIE; -} - -/** - * dma_cookie_assign - assign a DMA engine cookie to the descriptor - * @tx: descriptor needing cookie - * - * Assign a unique non-zero per-channel cookie to the descriptor. - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx) -{ - struct dma_chan *chan = tx->chan; - dma_cookie_t cookie; - - cookie = chan->cookie + 1; - if (cookie < DMA_MIN_COOKIE) - cookie = DMA_MIN_COOKIE; - tx->cookie = chan->cookie = cookie; - - return cookie; -} - -/** - * dma_cookie_complete - complete a descriptor - * @tx: descriptor to complete - * - * Mark this descriptor complete by updating the channels completed - * cookie marker. Zero the descriptors cookie to prevent accidental - * repeated completions. - * - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline void dma_cookie_complete(struct dma_async_tx_descriptor *tx) -{ - BUG_ON(tx->cookie < DMA_MIN_COOKIE); - tx->chan->completed_cookie = tx->cookie; - tx->cookie = 0; -} - -/** - * dma_cookie_status - report cookie status - * @chan: dma channel - * @cookie: cookie we are interested in - * @state: dma_tx_state structure to return last/used cookies - * - * Report the status of the cookie, filling in the state structure if - * non-NULL. No locking is required. - */ -static inline enum dma_status dma_cookie_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *state) -{ - dma_cookie_t used, complete; - - used = chan->cookie; - complete = chan->completed_cookie; - barrier(); - if (state) { - state->last = complete; - state->used = used; - state->residue = 0; - } - return dma_async_is_complete(cookie, complete, used); -} - -static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) -{ - if (state) - state->residue = residue; -} - -struct dmaengine_desc_callback { - dma_async_tx_callback callback; - dma_async_tx_callback_result callback_result; - void *callback_param; -}; - -/** - * dmaengine_desc_get_callback - get the passed in callback function - * @tx: tx descriptor - * @cb: temp struct to hold the callback info - * - * Fill the passed in cb struct with what's available in the passed in - * tx descriptor struct - * No locking is required. - */ -static inline void -dmaengine_desc_get_callback(struct dma_async_tx_descriptor *tx, - struct dmaengine_desc_callback *cb) -{ - cb->callback = tx->callback; - cb->callback_result = tx->callback_result; - cb->callback_param = tx->callback_param; -} - -/** - * dmaengine_desc_callback_invoke - call the callback function in cb struct - * @cb: temp struct that is holding the callback info - * @result: transaction result - * - * Call the callback function provided in the cb struct with the parameter - * in the cb struct. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_callback_invoke(struct dmaengine_desc_callback *cb, - const struct dmaengine_result *result) -{ - struct dmaengine_result dummy_result = { - .result = DMA_TRANS_NOERROR, - .residue = 0 - }; - - if (cb->callback_result) { - if (!result) - result = &dummy_result; - cb->callback_result(cb->callback_param, result); - } else if (cb->callback) { - cb->callback(cb->callback_param); - } -} - -/** - * dmaengine_desc_get_callback_invoke - get the callback in tx descriptor and - * then immediately call the callback. - * @tx: dma async tx descriptor - * @result: transaction result - * - * Call dmaengine_desc_get_callback() and dmaengine_desc_callback_invoke() - * in a single function since no work is necessary in between for the driver. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_get_callback_invoke(struct dma_async_tx_descriptor *tx, - const struct dmaengine_result *result) -{ - struct dmaengine_desc_callback cb; - - dmaengine_desc_get_callback(tx, &cb); - dmaengine_desc_callback_invoke(&cb, result); -} - -/** - * dmaengine_desc_callback_valid - verify the callback is valid in cb - * @cb: callback info struct - * - * Return a bool that verifies whether callback in cb is valid or not. - * No locking is required. - */ -static inline bool -dmaengine_desc_callback_valid(struct dmaengine_desc_callback *cb) -{ - return (cb->callback) ? true : false; -} - -#endif diff --git a/snd-alpx/include/4.16/virt-dma.h b/snd-alpx/include/4.16/virt-dma.h deleted file mode 100644 index b09b75a..0000000 --- a/snd-alpx/include/4.16/virt-dma.h +++ /dev/null @@ -1,221 +0,0 @@ -/* - * Virtual DMA channel support for DMAengine - * - * Copyright (C) 2012 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#ifndef VIRT_DMA_H -#define VIRT_DMA_H - -#include <linux/dmaengine.h> -#include <linux/interrupt.h> - -#include "dmaengine.h" - -struct virt_dma_desc { - struct dma_async_tx_descriptor tx; - /* protected by vc.lock */ - struct list_head node; -}; - -struct virt_dma_chan { - struct dma_chan chan; - struct tasklet_struct task; - void (*desc_free)(struct virt_dma_desc *); - - spinlock_t lock; - - /* protected by vc.lock */ - struct list_head desc_allocated; - struct list_head desc_submitted; - struct list_head desc_issued; - struct list_head desc_completed; - - struct virt_dma_desc *cyclic; - struct virt_dma_desc *vd_terminated; -}; - -static inline struct virt_dma_chan *to_virt_chan(struct dma_chan *chan) -{ - return container_of(chan, struct virt_dma_chan, chan); -} - -void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head); -void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev); -struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *, dma_cookie_t); -extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *); -extern int vchan_tx_desc_free(struct dma_async_tx_descriptor *); - -/** - * vchan_tx_prep - prepare a descriptor - * @vc: virtual channel allocating this descriptor - * @vd: virtual descriptor to prepare - * @tx_flags: flags argument passed in to prepare function - */ -static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan *vc, - struct virt_dma_desc *vd, unsigned long tx_flags) -{ - unsigned long flags; - - dma_async_tx_descriptor_init(&vd->tx, &vc->chan); - vd->tx.flags = tx_flags; - vd->tx.tx_submit = vchan_tx_submit; - vd->tx.desc_free = vchan_tx_desc_free; - - spin_lock_irqsave(&vc->lock, flags); - list_add_tail(&vd->node, &vc->desc_allocated); - spin_unlock_irqrestore(&vc->lock, flags); - - return &vd->tx; -} - -/** - * vchan_issue_pending - move submitted descriptors to issued list - * @vc: virtual channel to update - * - * vc.lock must be held by caller - */ -static inline bool vchan_issue_pending(struct virt_dma_chan *vc) -{ - list_splice_tail_init(&vc->desc_submitted, &vc->desc_issued); - return !list_empty(&vc->desc_issued); -} - -/** - * vchan_cookie_complete - report completion of a descriptor - * @vd: virtual descriptor to update - * - * vc.lock must be held by caller - */ -static inline void vchan_cookie_complete(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - dma_cookie_t cookie; - - cookie = vd->tx.cookie; - dma_cookie_complete(&vd->tx); - dev_vdbg(vc->chan.device->dev, "txd %p[%x]: marked complete\n", - vd, cookie); - list_add_tail(&vd->node, &vc->desc_completed); - - tasklet_schedule(&vc->task); -} - -/** - * vchan_vdesc_fini - Free or reuse a descriptor - * @vd: virtual descriptor to free/reuse - */ -static inline void vchan_vdesc_fini(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - if (dmaengine_desc_test_reuse(&vd->tx)) - list_add(&vd->node, &vc->desc_allocated); - else - vc->desc_free(vd); -} - -/** - * vchan_cyclic_callback - report the completion of a period - * @vd: virtual descriptor - */ -static inline void vchan_cyclic_callback(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - vc->cyclic = vd; - tasklet_schedule(&vc->task); -} - -/** - * vchan_terminate_vdesc - Disable pending cyclic callback - * @vd: virtual descriptor to be terminated - * - * vc.lock must be held by caller - */ -static inline void vchan_terminate_vdesc(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - /* free up stuck descriptor */ - if (vc->vd_terminated) - vchan_vdesc_fini(vc->vd_terminated); - - vc->vd_terminated = vd; - if (vc->cyclic == vd) - vc->cyclic = NULL; -} - -/** - * vchan_next_desc - peek at the next descriptor to be processed - * @vc: virtual channel to obtain descriptor from - * - * vc.lock must be held by caller - */ -static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc) -{ - return list_first_entry_or_null(&vc->desc_issued, - struct virt_dma_desc, node); -} - -/** - * vchan_get_all_descriptors - obtain all submitted and issued descriptors - * @vc: virtual channel to get descriptors from - * @head: list of descriptors found - * - * vc.lock must be held by caller - * - * Removes all submitted and issued descriptors from internal lists, and - * provides a list of all descriptors found - */ -static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc, - struct list_head *head) -{ - list_splice_tail_init(&vc->desc_allocated, head); - list_splice_tail_init(&vc->desc_submitted, head); - list_splice_tail_init(&vc->desc_issued, head); - list_splice_tail_init(&vc->desc_completed, head); -} - -static inline void vchan_free_chan_resources(struct virt_dma_chan *vc) -{ - struct virt_dma_desc *vd; - unsigned long flags; - LIST_HEAD(head); - - spin_lock_irqsave(&vc->lock, flags); - vchan_get_all_descriptors(vc, &head); - list_for_each_entry(vd, &head, node) - dmaengine_desc_clear_reuse(&vd->tx); - spin_unlock_irqrestore(&vc->lock, flags); - - vchan_dma_desc_free_list(vc, &head); -} - -/** - * vchan_synchronize() - synchronize callback execution to the current context - * @vc: virtual channel to synchronize - * - * Makes sure that all scheduled or active callbacks have finished running. For - * proper operation the caller has to ensure that no new callbacks are scheduled - * after the invocation of this function started. - * Free up the terminated cyclic descriptor to prevent memory leakage. - */ -static inline void vchan_synchronize(struct virt_dma_chan *vc) -{ - unsigned long flags; - - tasklet_kill(&vc->task); - - spin_lock_irqsave(&vc->lock, flags); - if (vc->vd_terminated) { - vchan_vdesc_fini(vc->vd_terminated); - vc->vd_terminated = NULL; - } - spin_unlock_irqrestore(&vc->lock, flags); -} - -#endif diff --git a/snd-alpx/include/5.10/regmap.h b/snd-alpx/include/5.10/regmap.h deleted file mode 100644 index e7834d9..0000000 --- a/snd-alpx/include/5.10/regmap.h +++ /dev/null @@ -1,1765 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef __LINUX_REGMAP_H -#define __LINUX_REGMAP_H - -/* - * Register map access API - * - * Copyright 2011 Wolfson Microelectronics plc - * - * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> - */ - -#include <linux/list.h> -#include <linux/rbtree.h> -#include <linux/ktime.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/bug.h> -#include <linux/lockdep.h> -#include <linux/iopoll.h> -#include <linux/fwnode.h> - -struct module; -struct clk; -struct device; -struct device_node; -struct i2c_client; -struct i3c_device; -struct irq_domain; -struct slim_device; -struct spi_device; -struct spmi_device; -struct regmap; -struct regmap_range_cfg; -struct regmap_field; -struct snd_ac97; -struct sdw_slave; - -/* An enum of all the supported cache types */ -enum regcache_type { - REGCACHE_NONE, - REGCACHE_RBTREE, - REGCACHE_COMPRESSED, - REGCACHE_FLAT, -}; - -/** - * struct reg_default - Default value for a register. - * - * @reg: Register address. - * @def: Register default value. - * - * We use an array of structs rather than a simple array as many modern devices - * have very sparse register maps. - */ -struct reg_default { - unsigned int reg; - unsigned int def; -}; - -/** - * struct reg_sequence - An individual write from a sequence of writes. - * - * @reg: Register address. - * @def: Register value. - * @delay_us: Delay to be applied after the register write in microseconds - * - * Register/value pairs for sequences of writes with an optional delay in - * microseconds to be applied after each write. - */ -struct reg_sequence { - unsigned int reg; - unsigned int def; - unsigned int delay_us; -}; - -#define REG_SEQ(_reg, _def, _delay_us) { \ - .reg = _reg, \ - .def = _def, \ - .delay_us = _delay_us, \ - } -#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) - -/** - * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs - * - * @map: Regmap to read from - * @addr: Address to poll - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @sleep_us: Maximum time to sleep between reads in us (0 - * tight-loops). Should be less than ~20ms since usleep_range - * is used (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. Must not be called - * from atomic context if sleep_us or timeout_us are used. - * - * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. - */ -#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ -({ \ - int __ret, __tmp; \ - __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ - sleep_us, timeout_us, false, (map), (addr), &(val)); \ - __ret ?: __tmp; \ -}) - -/** - * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs - * - * @map: Regmap to read from - * @addr: Address to poll - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @delay_us: Time to udelay between reads in us (0 tight-loops). - * Should be less than ~10us since udelay is used - * (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. - * - * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. - * - * Note: In general regmap cannot be used in atomic context. If you want to use - * this macro then first setup your regmap for atomic use (flat or no cache - * and MMIO regmap). - */ -#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ -({ \ - u64 __timeout_us = (timeout_us); \ - unsigned long __delay_us = (delay_us); \ - ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ - int __ret; \ - for (;;) { \ - __ret = regmap_read((map), (addr), &(val)); \ - if (__ret) \ - break; \ - if (cond) \ - break; \ - if ((__timeout_us) && \ - ktime_compare(ktime_get(), __timeout) > 0) { \ - __ret = regmap_read((map), (addr), &(val)); \ - break; \ - } \ - if (__delay_us) \ - udelay(__delay_us); \ - } \ - __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ -}) - -/** - * regmap_field_read_poll_timeout - Poll until a condition is met or timeout - * - * @field: Regmap field to read from - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @sleep_us: Maximum time to sleep between reads in us (0 - * tight-loops). Should be less than ~20ms since usleep_range - * is used (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. Must not be called - * from atomic context if sleep_us or timeout_us are used. - * - * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. - */ -#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ -({ \ - int __ret, __tmp; \ - __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ - sleep_us, timeout_us, false, (field), &(val)); \ - __ret ?: __tmp; \ -}) - -#ifdef CONFIG_REGMAP - -enum regmap_endian { - /* Unspecified -> 0 -> Backwards compatible default */ - REGMAP_ENDIAN_DEFAULT = 0, - REGMAP_ENDIAN_BIG, - REGMAP_ENDIAN_LITTLE, - REGMAP_ENDIAN_NATIVE, -}; - -/** - * struct regmap_range - A register range, used for access related checks - * (readable/writeable/volatile/precious checks) - * - * @range_min: address of first register - * @range_max: address of last register - */ -struct regmap_range { - unsigned int range_min; - unsigned int range_max; -}; - -#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } - -/** - * struct regmap_access_table - A table of register ranges for access checks - * - * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" - * @n_yes_ranges: size of the above array - * @no_ranges: pointer to an array of regmap ranges used as "no ranges" - * @n_no_ranges: size of the above array - * - * A table of ranges including some yes ranges and some no ranges. - * If a register belongs to a no_range, the corresponding check function - * will return false. If a register belongs to a yes range, the corresponding - * check function will return true. "no_ranges" are searched first. - */ -struct regmap_access_table { - const struct regmap_range *yes_ranges; - unsigned int n_yes_ranges; - const struct regmap_range *no_ranges; - unsigned int n_no_ranges; -}; - -typedef void (*regmap_lock)(void *); -typedef void (*regmap_unlock)(void *); - -/** - * struct regmap_config - Configuration for the register map of a device. - * - * @name: Optional name of the regmap. Useful when a device has multiple - * register regions. - * - * @reg_bits: Number of bits in a register address, mandatory. - * @reg_stride: The register address stride. Valid register addresses are a - * multiple of this value. If set to 0, a value of 1 will be - * used. - * @pad_bits: Number of bits of padding between register and value. - * @val_bits: Number of bits in a register value, mandatory. - * - * @writeable_reg: Optional callback returning true if the register - * can be written to. If this field is NULL but wr_table - * (see below) is not, the check is performed on such table - * (a register is writeable if it belongs to one of the ranges - * specified by wr_table). - * @readable_reg: Optional callback returning true if the register - * can be read from. If this field is NULL but rd_table - * (see below) is not, the check is performed on such table - * (a register is readable if it belongs to one of the ranges - * specified by rd_table). - * @volatile_reg: Optional callback returning true if the register - * value can't be cached. If this field is NULL but - * volatile_table (see below) is not, the check is performed on - * such table (a register is volatile if it belongs to one of - * the ranges specified by volatile_table). - * @precious_reg: Optional callback returning true if the register - * should not be read outside of a call from the driver - * (e.g., a clear on read interrupt status register). If this - * field is NULL but precious_table (see below) is not, the - * check is performed on such table (a register is precious if - * it belongs to one of the ranges specified by precious_table). - * @writeable_noinc_reg: Optional callback returning true if the register - * supports multiple write operations without incrementing - * the register number. If this field is NULL but - * wr_noinc_table (see below) is not, the check is - * performed on such table (a register is no increment - * writeable if it belongs to one of the ranges specified - * by wr_noinc_table). - * @readable_noinc_reg: Optional callback returning true if the register - * supports multiple read operations without incrementing - * the register number. If this field is NULL but - * rd_noinc_table (see below) is not, the check is - * performed on such table (a register is no increment - * readable if it belongs to one of the ranges specified - * by rd_noinc_table). - * @disable_locking: This regmap is either protected by external means or - * is guaranteed not to be accessed from multiple threads. - * Don't use any locking mechanisms. - * @lock: Optional lock callback (overrides regmap's default lock - * function, based on spinlock or mutex). - * @unlock: As above for unlocking. - * @lock_arg: this field is passed as the only argument of lock/unlock - * functions (ignored in case regular lock/unlock functions - * are not overridden). - * @reg_read: Optional callback that if filled will be used to perform - * all the reads from the registers. Should only be provided for - * devices whose read operation cannot be represented as a simple - * read operation on a bus such as SPI, I2C, etc. Most of the - * devices do not need this. - * @reg_write: Same as above for writing. - * @fast_io: Register IO is fast. Use a spinlock instead of a mutex - * to perform locking. This field is ignored if custom lock/unlock - * functions are used (see fields lock/unlock of struct regmap_config). - * This field is a duplicate of a similar file in - * 'struct regmap_bus' and serves exact same purpose. - * Use it only for "no-bus" cases. - * @max_register: Optional, specifies the maximum valid register address. - * @wr_table: Optional, points to a struct regmap_access_table specifying - * valid ranges for write access. - * @rd_table: As above, for read access. - * @volatile_table: As above, for volatile registers. - * @precious_table: As above, for precious registers. - * @wr_noinc_table: As above, for no increment writeable registers. - * @rd_noinc_table: As above, for no increment readable registers. - * @reg_defaults: Power on reset values for registers (for use with - * register cache support). - * @num_reg_defaults: Number of elements in reg_defaults. - * - * @read_flag_mask: Mask to be set in the top bytes of the register when doing - * a read. - * @write_flag_mask: Mask to be set in the top bytes of the register when doing - * a write. If both read_flag_mask and write_flag_mask are - * empty and zero_flag_mask is not set the regmap_bus default - * masks are used. - * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even - * if they are both empty. - * @use_single_read: If set, converts the bulk read operation into a series of - * single read operations. This is useful for a device that - * does not support bulk read. - * @use_single_write: If set, converts the bulk write operation into a series of - * single write operations. This is useful for a device that - * does not support bulk write. - * @can_multi_write: If set, the device supports the multi write mode of bulk - * write operations, if clear multi write requests will be - * split into individual write operations - * - * @cache_type: The actual cache type. - * @reg_defaults_raw: Power on reset values for registers (for use with - * register cache support). - * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. - * @reg_format_endian: Endianness for formatted register addresses. If this is - * DEFAULT, the @reg_format_endian_default value from the - * regmap bus is used. - * @val_format_endian: Endianness for formatted register values. If this is - * DEFAULT, the @reg_format_endian_default value from the - * regmap bus is used. - * - * @ranges: Array of configuration entries for virtual address ranges. - * @num_ranges: Number of range configuration entries. - * @use_hwlock: Indicate if a hardware spinlock should be used. - * @hwlock_id: Specify the hardware spinlock id. - * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, - * HWLOCK_IRQ or 0. - * @can_sleep: Optional, specifies whether regmap operations can sleep. - */ -struct regmap_config { - const char *name; - - int reg_bits; - int reg_stride; - int pad_bits; - int val_bits; - - bool (*writeable_reg)(struct device *dev, unsigned int reg); - bool (*readable_reg)(struct device *dev, unsigned int reg); - bool (*volatile_reg)(struct device *dev, unsigned int reg); - bool (*precious_reg)(struct device *dev, unsigned int reg); - bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); - bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); - - bool disable_locking; - regmap_lock lock; - regmap_unlock unlock; - void *lock_arg; - - int (*reg_read)(void *context, unsigned int reg, unsigned int *val); - int (*reg_write)(void *context, unsigned int reg, unsigned int val); - - bool fast_io; - - unsigned int max_register; - const struct regmap_access_table *wr_table; - const struct regmap_access_table *rd_table; - const struct regmap_access_table *volatile_table; - const struct regmap_access_table *precious_table; - const struct regmap_access_table *wr_noinc_table; - const struct regmap_access_table *rd_noinc_table; - const struct reg_default *reg_defaults; - unsigned int num_reg_defaults; - enum regcache_type cache_type; - const void *reg_defaults_raw; - unsigned int num_reg_defaults_raw; - - unsigned long read_flag_mask; - unsigned long write_flag_mask; - bool zero_flag_mask; - - bool use_single_read; - bool use_single_write; - bool can_multi_write; - - enum regmap_endian reg_format_endian; - enum regmap_endian val_format_endian; - - const struct regmap_range_cfg *ranges; - unsigned int num_ranges; - - bool use_hwlock; - unsigned int hwlock_id; - unsigned int hwlock_mode; - - bool can_sleep; -}; - -/** - * struct regmap_range_cfg - Configuration for indirectly accessed or paged - * registers. - * - * @name: Descriptive name for diagnostics - * - * @range_min: Address of the lowest register address in virtual range. - * @range_max: Address of the highest register in virtual range. - * - * @selector_reg: Register with selector field. - * @selector_mask: Bit mask for selector value. - * @selector_shift: Bit shift for selector value. - * - * @window_start: Address of first (lowest) register in data window. - * @window_len: Number of registers in data window. - * - * Registers, mapped to this virtual range, are accessed in two steps: - * 1. page selector register update; - * 2. access through data window registers. - */ -struct regmap_range_cfg { - const char *name; - - /* Registers of virtual address range */ - unsigned int range_min; - unsigned int range_max; - - /* Page selector for indirect addressing */ - unsigned int selector_reg; - unsigned int selector_mask; - int selector_shift; - - /* Data window (per each page) */ - unsigned int window_start; - unsigned int window_len; -}; - -struct regmap_async; - -typedef int (*regmap_hw_write)(void *context, const void *data, - size_t count); -typedef int (*regmap_hw_gather_write)(void *context, - const void *reg, size_t reg_len, - const void *val, size_t val_len); -typedef int (*regmap_hw_async_write)(void *context, - const void *reg, size_t reg_len, - const void *val, size_t val_len, - struct regmap_async *async); -typedef int (*regmap_hw_read)(void *context, - const void *reg_buf, size_t reg_size, - void *val_buf, size_t val_size); -typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, - unsigned int *val); -typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, - unsigned int val); -typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, - unsigned int mask, unsigned int val); -typedef struct regmap_async *(*regmap_hw_async_alloc)(void); -typedef void (*regmap_hw_free_context)(void *context); - -/** - * struct regmap_bus - Description of a hardware bus for the register map - * infrastructure. - * - * @fast_io: Register IO is fast. Use a spinlock instead of a mutex - * to perform locking. This field is ignored if custom lock/unlock - * functions are used (see fields lock/unlock of - * struct regmap_config). - * @write: Write operation. - * @gather_write: Write operation with split register/value, return -ENOTSUPP - * if not implemented on a given device. - * @async_write: Write operation which completes asynchronously, optional and - * must serialise with respect to non-async I/O. - * @reg_write: Write a single register value to the given register address. This - * write operation has to complete when returning from the function. - * @reg_update_bits: Update bits operation to be used against volatile - * registers, intended for devices supporting some mechanism - * for setting clearing bits without having to - * read/modify/write. - * @read: Read operation. Data is returned in the buffer used to transmit - * data. - * @reg_read: Read a single register value from a given register address. - * @free_context: Free context. - * @async_alloc: Allocate a regmap_async() structure. - * @read_flag_mask: Mask to be set in the top byte of the register when doing - * a read. - * @reg_format_endian_default: Default endianness for formatted register - * addresses. Used when the regmap_config specifies DEFAULT. If this is - * DEFAULT, BIG is assumed. - * @val_format_endian_default: Default endianness for formatted register - * values. Used when the regmap_config specifies DEFAULT. If this is - * DEFAULT, BIG is assumed. - * @max_raw_read: Max raw read size that can be used on the bus. - * @max_raw_write: Max raw write size that can be used on the bus. - */ -struct regmap_bus { - bool fast_io; - regmap_hw_write write; - regmap_hw_gather_write gather_write; - regmap_hw_async_write async_write; - regmap_hw_reg_write reg_write; - regmap_hw_reg_update_bits reg_update_bits; - regmap_hw_read read; - regmap_hw_reg_read reg_read; - regmap_hw_free_context free_context; - regmap_hw_async_alloc async_alloc; - u8 read_flag_mask; - enum regmap_endian reg_format_endian_default; - enum regmap_endian val_format_endian_default; - size_t max_raw_read; - size_t max_raw_write; -}; - -/* - * __regmap_init functions. - * - * These functions take a lock key and name parameter, and should not be called - * directly. Instead, use the regmap_init macros that generate a key and name - * for each call. - */ -struct regmap *__regmap_init(struct device *dev, - const struct regmap_bus *bus, - void *bus_context, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_i2c(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_sccb(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spi(struct spi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_w1(struct device *w1_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, - void __iomem *regs, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spi_avmm(struct spi_device *spi, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); - -struct regmap *__devm_regmap_init(struct device *dev, - const struct regmap_bus *bus, - void *bus_context, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spi(struct spi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_w1(struct device *w1_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, - const char *clk_id, - void __iomem *regs, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -/* - * Wrapper for regmap_init macros to include a unique lockdep key and name - * for each call. No-op if CONFIG_LOCKDEP is not set. - * - * @fn: Real function to call (in the form __[*_]regmap_init[_*]) - * @name: Config variable name (#config in the calling macro) - **/ -#ifdef CONFIG_LOCKDEP -#define __regmap_lockdep_wrapper(fn, name, ...) \ -( \ - ({ \ - static struct lock_class_key _key; \ - fn(__VA_ARGS__, &_key, \ - KBUILD_BASENAME ":" \ - __stringify(__LINE__) ":" \ - "(" name ")->lock"); \ - }) \ -) -#else -#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) -#endif - -/** - * regmap_init() - Initialise register map - * - * @dev: Device that will be interacted with - * @bus: Bus-specific callbacks to use with device - * @bus_context: Data passed to bus-specific callbacks - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. This function should generally not be called - * directly, it should be called by bus-specific init functions. - */ -#define regmap_init(dev, bus, bus_context, config) \ - __regmap_lockdep_wrapper(__regmap_init, #config, \ - dev, bus, bus_context, config) -int regmap_attach_dev(struct device *dev, struct regmap *map, - const struct regmap_config *config); - -/** - * regmap_init_i2c() - Initialise register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_i2c(i2c, config) \ - __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ - i2c, config) - -/** - * regmap_init_sccb() - Initialise register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_sccb(i2c, config) \ - __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ - i2c, config) - -/** - * regmap_init_slimbus() - Initialise register map - * - * @slimbus: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_slimbus(slimbus, config) \ - __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ - slimbus, config) - -/** - * regmap_init_spi() - Initialise register map - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spi(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ - dev, config) - -/** - * regmap_init_spmi_base() - Create regmap for the Base register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spmi_base(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ - dev, config) - -/** - * regmap_init_spmi_ext() - Create regmap for Ext register space - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spmi_ext(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ - dev, config) - -/** - * regmap_init_w1() - Initialise register map - * - * @w1_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_w1(w1_dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ - w1_dev, config) - -/** - * regmap_init_mmio_clk() - Initialise register map with register clock - * - * @dev: Device that will be interacted with - * @clk_id: register clock consumer ID - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_mmio_clk(dev, clk_id, regs, config) \ - __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ - dev, clk_id, regs, config) - -/** - * regmap_init_mmio() - Initialise register map - * - * @dev: Device that will be interacted with - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_mmio(dev, regs, config) \ - regmap_init_mmio_clk(dev, NULL, regs, config) - -/** - * regmap_init_ac97() - Initialise AC'97 register map - * - * @ac97: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_ac97(ac97, config) \ - __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ - ac97, config) -bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); - -/** - * regmap_init_sdw() - Initialise register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_sdw(sdw, config) \ - __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ - sdw, config) - -/** - * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave - * to AVMM Bus Bridge - * - * @spi: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. - */ -#define regmap_init_spi_avmm(spi, config) \ - __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \ - spi, config) - -/** - * devm_regmap_init() - Initialise managed register map - * - * @dev: Device that will be interacted with - * @bus: Bus-specific callbacks to use with device - * @bus_context: Data passed to bus-specific callbacks - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. This function should generally not be called - * directly, it should be called by bus-specific init functions. The - * map will be automatically freed by the device management code. - */ -#define devm_regmap_init(dev, bus, bus_context, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ - dev, bus, bus_context, config) - -/** - * devm_regmap_init_i2c() - Initialise managed register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_i2c(i2c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ - i2c, config) - -/** - * devm_regmap_init_sccb() - Initialise managed register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_sccb(i2c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ - i2c, config) - -/** - * devm_regmap_init_spi() - Initialise register map - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The map will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spi(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ - dev, config) - -/** - * devm_regmap_init_spmi_base() - Create managed regmap for Base register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spmi_base(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ - dev, config) - -/** - * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spmi_ext(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ - dev, config) - -/** - * devm_regmap_init_w1() - Initialise managed register map - * - * @w1_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_w1(w1_dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ - w1_dev, config) -/** - * devm_regmap_init_mmio_clk() - Initialise managed register map with clock - * - * @dev: Device that will be interacted with - * @clk_id: register clock consumer ID - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ - dev, clk_id, regs, config) - -/** - * devm_regmap_init_mmio() - Initialise managed register map - * - * @dev: Device that will be interacted with - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_mmio(dev, regs, config) \ - devm_regmap_init_mmio_clk(dev, NULL, regs, config) - -/** - * devm_regmap_init_ac97() - Initialise AC'97 register map - * - * @ac97: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_ac97(ac97, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ - ac97, config) - -/** - * devm_regmap_init_sdw() - Initialise managed register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_sdw(sdw, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ - sdw, config) - -/** - * devm_regmap_init_slimbus() - Initialise managed register map - * - * @slimbus: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_slimbus(slimbus, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ - slimbus, config) - -/** - * devm_regmap_init_i3c() - Initialise managed register map - * - * @i3c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_i3c(i3c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ - i3c, config) - -/** - * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave - * to AVMM Bus Bridge - * - * @spi: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The map will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spi_avmm(spi, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \ - spi, config) - -int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); -void regmap_mmio_detach_clk(struct regmap *map); -void regmap_exit(struct regmap *map); -int regmap_reinit_cache(struct regmap *map, - const struct regmap_config *config); -struct regmap *dev_get_regmap(struct device *dev, const char *name); -struct device *regmap_get_device(struct regmap *map); -int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); -int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); -int regmap_raw_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_noinc_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, - size_t val_count); -int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, - int num_regs); -int regmap_multi_reg_write_bypassed(struct regmap *map, - const struct reg_sequence *regs, - int num_regs); -int regmap_raw_write_async(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); -int regmap_raw_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len); -int regmap_noinc_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len); -int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, - size_t val_count); -int regmap_update_bits_base(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); - -static inline int regmap_update_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); -} - -static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); -} - -static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - return regmap_update_bits_base(map, reg, mask, val, - change, false, false); -} - -static inline int -regmap_update_bits_check_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - return regmap_update_bits_base(map, reg, mask, val, - change, true, false); -} - -static inline int regmap_write_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); -} - -int regmap_get_val_bytes(struct regmap *map); -int regmap_get_max_register(struct regmap *map); -int regmap_get_reg_stride(struct regmap *map); -int regmap_async_complete(struct regmap *map); -bool regmap_can_raw_write(struct regmap *map); -size_t regmap_get_raw_read_max(struct regmap *map); -size_t regmap_get_raw_write_max(struct regmap *map); - -int regcache_sync(struct regmap *map); -int regcache_sync_region(struct regmap *map, unsigned int min, - unsigned int max); -int regcache_drop_region(struct regmap *map, unsigned int min, - unsigned int max); -void regcache_cache_only(struct regmap *map, bool enable); -void regcache_cache_bypass(struct regmap *map, bool enable); -void regcache_mark_dirty(struct regmap *map); - -bool regmap_check_range_table(struct regmap *map, unsigned int reg, - const struct regmap_access_table *table); - -int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, - int num_regs); -int regmap_parse_val(struct regmap *map, const void *buf, - unsigned int *val); - -static inline bool regmap_reg_in_range(unsigned int reg, - const struct regmap_range *range) -{ - return reg >= range->range_min && reg <= range->range_max; -} - -bool regmap_reg_in_ranges(unsigned int reg, - const struct regmap_range *ranges, - unsigned int nranges); - -static inline int regmap_set_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - return regmap_update_bits_base(map, reg, bits, bits, - NULL, false, false); -} - -static inline int regmap_clear_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); -} - -int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); - -/** - * struct reg_field - Description of an register field - * - * @reg: Offset of the register within the regmap bank - * @lsb: lsb of the register field. - * @msb: msb of the register field. - * @id_size: port size if it has some ports - * @id_offset: address offset for each ports - */ -struct reg_field { - unsigned int reg; - unsigned int lsb; - unsigned int msb; - unsigned int id_size; - unsigned int id_offset; -}; - -#define REG_FIELD(_reg, _lsb, _msb) { \ - .reg = _reg, \ - .lsb = _lsb, \ - .msb = _msb, \ - } - -#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ - .reg = _reg, \ - .lsb = _lsb, \ - .msb = _msb, \ - .id_size = _size, \ - .id_offset = _offset, \ - } - -struct regmap_field *regmap_field_alloc(struct regmap *regmap, - struct reg_field reg_field); -void regmap_field_free(struct regmap_field *field); - -struct regmap_field *devm_regmap_field_alloc(struct device *dev, - struct regmap *regmap, struct reg_field reg_field); -void devm_regmap_field_free(struct device *dev, struct regmap_field *field); - -int regmap_field_bulk_alloc(struct regmap *regmap, - struct regmap_field **rm_field, - struct reg_field *reg_field, - int num_fields); -void regmap_field_bulk_free(struct regmap_field *field); -int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap, - struct regmap_field **field, - struct reg_field *reg_field, int num_fields); -void devm_regmap_field_bulk_free(struct device *dev, - struct regmap_field *field); - -int regmap_field_read(struct regmap_field *field, unsigned int *val); -int regmap_field_update_bits_base(struct regmap_field *field, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); -int regmap_fields_read(struct regmap_field *field, unsigned int id, - unsigned int *val); -int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); - -static inline int regmap_field_write(struct regmap_field *field, - unsigned int val) -{ - return regmap_field_update_bits_base(field, ~0, val, - NULL, false, false); -} - -static inline int regmap_field_force_write(struct regmap_field *field, - unsigned int val) -{ - return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); -} - -static inline int regmap_field_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - return regmap_field_update_bits_base(field, mask, val, - NULL, false, false); -} - -static inline int -regmap_field_force_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - return regmap_field_update_bits_base(field, mask, val, - NULL, false, true); -} - -static inline int regmap_fields_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, ~0, val, - NULL, false, false); -} - -static inline int regmap_fields_force_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, ~0, val, - NULL, false, true); -} - -static inline int -regmap_fields_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, mask, val, - NULL, false, false); -} - -static inline int -regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, mask, val, - NULL, false, true); -} - -/** - * struct regmap_irq_type - IRQ type definitions. - * - * @type_reg_offset: Offset register for the irq type setting. - * @type_rising_val: Register value to configure RISING type irq. - * @type_falling_val: Register value to configure FALLING type irq. - * @type_level_low_val: Register value to configure LEVEL_LOW type irq. - * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. - * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. - */ -struct regmap_irq_type { - unsigned int type_reg_offset; - unsigned int type_reg_mask; - unsigned int type_rising_val; - unsigned int type_falling_val; - unsigned int type_level_low_val; - unsigned int type_level_high_val; - unsigned int types_supported; -}; - -/** - * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. - * - * @reg_offset: Offset of the status/mask register within the bank - * @mask: Mask used to flag/control the register. - * @type: IRQ trigger type setting details if supported. - */ -struct regmap_irq { - unsigned int reg_offset; - unsigned int mask; - struct regmap_irq_type type; -}; - -#define REGMAP_IRQ_REG(_irq, _off, _mask) \ - [_irq] = { .reg_offset = (_off), .mask = (_mask) } - -#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ - [_id] = { \ - .mask = BIT((_id) % (_reg_bits)), \ - .reg_offset = (_id) / (_reg_bits), \ - } - -#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ - { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } - -struct regmap_irq_sub_irq_map { - unsigned int num_regs; - unsigned int *offset; -}; - -/** - * struct regmap_irq_chip - Description of a generic regmap irq_chip. - * - * @name: Descriptive name for IRQ controller. - * - * @main_status: Base main status register address. For chips which have - * interrupts arranged in separate sub-irq blocks with own IRQ - * registers and which have a main IRQ registers indicating - * sub-irq blocks with unhandled interrupts. For such chips fill - * sub-irq register information in status_base, mask_base and - * ack_base. - * @num_main_status_bits: Should be given to chips where number of meaningfull - * main status bits differs from num_regs. - * @sub_reg_offsets: arrays of mappings from main register bits to sub irq - * registers. First item in array describes the registers - * for first main status bit. Second array for second bit etc. - * Offset is given as sub register status offset to - * status_base. Should contain num_regs arrays. - * Can be provided for chips with more complex mapping than - * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... - * @num_main_regs: Number of 'main status' irq registers for chips which have - * main_status set. - * - * @status_base: Base status register address. - * @mask_base: Base mask register address. - * @mask_writeonly: Base mask register is write only. - * @unmask_base: Base unmask register address. for chips who have - * separate mask and unmask registers - * @ack_base: Base ack address. If zero then the chip is clear on read. - * Using zero value is possible with @use_ack bit. - * @wake_base: Base address for wake enables. If zero unsupported. - * @type_base: Base address for irq type. If zero unsupported. - * @irq_reg_stride: Stride to use for chips where registers are not contiguous. - * @init_ack_masked: Ack all masked interrupts once during initalization. - * @mask_invert: Inverted mask register: cleared bits are masked out. - * @use_ack: Use @ack register even if it is zero. - * @ack_invert: Inverted ack register: cleared bits for ack. - * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts. - * @wake_invert: Inverted wake register: cleared bits are wake enabled. - * @type_invert: Invert the type flags. - * @type_in_mask: Use the mask registers for controlling irq type. For - * interrupts defining type_rising/falling_mask use mask_base - * for edge configuration and never update bits in type_base. - * @clear_on_unmask: For chips with interrupts cleared on read: read the status - * registers before unmasking interrupts to clear any bits - * set when they were masked. - * @runtime_pm: Hold a runtime PM lock on the device when accessing it. - * - * @num_regs: Number of registers in each control bank. - * @irqs: Descriptors for individual IRQs. Interrupt numbers are - * assigned based on the index in the array of the interrupt. - * @num_irqs: Number of descriptors. - * @num_type_reg: Number of type registers. - * @type_reg_stride: Stride to use for chips where type registers are not - * contiguous. - * @handle_pre_irq: Driver specific callback to handle interrupt from device - * before regmap_irq_handler process the interrupts. - * @handle_post_irq: Driver specific callback to handle interrupt from device - * after handling the interrupts in regmap_irq_handler(). - * @irq_drv_data: Driver specific IRQ data which is passed as parameter when - * driver specific pre/post interrupt handler is called. - * - * This is not intended to handle every possible interrupt controller, but - * it should handle a substantial proportion of those that are found in the - * wild. - */ -struct regmap_irq_chip { - const char *name; - - unsigned int main_status; - unsigned int num_main_status_bits; - struct regmap_irq_sub_irq_map *sub_reg_offsets; - int num_main_regs; - - unsigned int status_base; - unsigned int mask_base; - unsigned int unmask_base; - unsigned int ack_base; - unsigned int wake_base; - unsigned int type_base; - unsigned int irq_reg_stride; - bool mask_writeonly:1; - bool init_ack_masked:1; - bool mask_invert:1; - bool use_ack:1; - bool ack_invert:1; - bool clear_ack:1; - bool wake_invert:1; - bool runtime_pm:1; - bool type_invert:1; - bool type_in_mask:1; - bool clear_on_unmask:1; - - int num_regs; - - const struct regmap_irq *irqs; - int num_irqs; - - int num_type_reg; - unsigned int type_reg_stride; - - int (*handle_pre_irq)(void *irq_drv_data); - int (*handle_post_irq)(void *irq_drv_data); - void *irq_drv_data; -}; - -struct regmap_irq_chip_data; - -int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, - int irq_base, const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, - struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); - -int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -int devm_regmap_add_irq_chip_fwnode(struct device *dev, - struct fwnode_handle *fwnode, - struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -void devm_regmap_del_irq_chip(struct device *dev, int irq, - struct regmap_irq_chip_data *data); - -int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); -int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); -struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); - -#else - -/* - * These stubs should only ever be called by generic code which has - * regmap based facilities, if they ever get called at runtime - * something is going wrong and something probably needs to select - * REGMAP. - */ - -static inline int regmap_write(struct regmap *map, unsigned int reg, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_write_async(struct regmap *map, unsigned int reg, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_count) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_read(struct regmap *map, unsigned int reg, - unsigned int *val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, - void *val, size_t val_count) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_set_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_clear_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_test_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_update_bits_base(struct regmap_field *field, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_update_bits_base(struct regmap_field *field, - unsigned int id, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_update_bits_check_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_write_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_write(struct regmap_field *field, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_force_write(struct regmap_field *field, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_field_force_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_force_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_fields_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_val_bytes(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_max_register(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_reg_stride(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regcache_sync(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regcache_sync_region(struct regmap *map, unsigned int min, - unsigned int max) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regcache_drop_region(struct regmap *map, unsigned int min, - unsigned int max) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline void regcache_cache_only(struct regmap *map, bool enable) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regcache_cache_bypass(struct regmap *map, bool enable) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regcache_mark_dirty(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regmap_async_complete(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline int regmap_register_patch(struct regmap *map, - const struct reg_sequence *regs, - int num_regs) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_parse_val(struct regmap *map, const void *buf, - unsigned int *val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline struct regmap *dev_get_regmap(struct device *dev, - const char *name) -{ - return NULL; -} - -static inline struct device *regmap_get_device(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return NULL; -} - -#endif - -#endif diff --git a/snd-alpx/include/5.14/regmap.h b/snd-alpx/include/5.14/regmap.h deleted file mode 100644 index 8eb7922..0000000 --- a/snd-alpx/include/5.14/regmap.h +++ /dev/null @@ -1,2041 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef __LINUX_REGMAP_H -#define __LINUX_REGMAP_H - -/* - * Register map access API - * - * Copyright 2011 Wolfson Microelectronics plc - * - * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> - */ - -#include <linux/list.h> -#include <linux/rbtree.h> -#include <linux/ktime.h> -#include <linux/delay.h> -#include <linux/err.h> -#include <linux/bug.h> -#include <linux/lockdep.h> -#include <linux/iopoll.h> -#include <linux/fwnode.h> - -struct module; -struct clk; -struct device; -struct device_node; -struct fsi_device; -struct i2c_client; -struct i3c_device; -struct irq_domain; -struct mdio_device; -struct slim_device; -struct spi_device; -struct spmi_device; -struct regmap; -struct regmap_range_cfg; -struct regmap_field; -struct snd_ac97; -struct sdw_slave; - -/* - * regmap_mdio address encoding. IEEE 802.3ae clause 45 addresses consist of a - * device address and a register address. - */ -#define REGMAP_MDIO_C45_DEVAD_SHIFT 16 -#define REGMAP_MDIO_C45_DEVAD_MASK GENMASK(20, 16) -#define REGMAP_MDIO_C45_REGNUM_MASK GENMASK(15, 0) - -/* - * regmap.reg_shift indicates by how much we must shift registers prior to - * performing any operation. It's a signed value, positive numbers means - * downshifting the register's address, while negative numbers means upshifting. - */ -#define REGMAP_UPSHIFT(s) (-(s)) -#define REGMAP_DOWNSHIFT(s) (s) - -/* An enum of all the supported cache types */ -enum regcache_type { - REGCACHE_NONE, - REGCACHE_RBTREE, - REGCACHE_FLAT, - REGCACHE_MAPLE, -}; - -/** - * struct reg_default - Default value for a register. - * - * @reg: Register address. - * @def: Register default value. - * - * We use an array of structs rather than a simple array as many modern devices - * have very sparse register maps. - */ -struct reg_default { - unsigned int reg; - unsigned int def; -}; - -/** - * struct reg_sequence - An individual write from a sequence of writes. - * - * @reg: Register address. - * @def: Register value. - * @delay_us: Delay to be applied after the register write in microseconds - * - * Register/value pairs for sequences of writes with an optional delay in - * microseconds to be applied after each write. - */ -struct reg_sequence { - unsigned int reg; - unsigned int def; - unsigned int delay_us; -}; - -#define REG_SEQ(_reg, _def, _delay_us) { \ - .reg = _reg, \ - .def = _def, \ - .delay_us = _delay_us, \ - } -#define REG_SEQ0(_reg, _def) REG_SEQ(_reg, _def, 0) - -/** - * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs - * - * @map: Regmap to read from - * @addr: Address to poll - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @sleep_us: Maximum time to sleep between reads in us (0 - * tight-loops). Should be less than ~20ms since usleep_range - * is used (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. Must not be called - * from atomic context if sleep_us or timeout_us are used. - * - * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. - */ -#define regmap_read_poll_timeout(map, addr, val, cond, sleep_us, timeout_us) \ -({ \ - int __ret, __tmp; \ - __tmp = read_poll_timeout(regmap_read, __ret, __ret || (cond), \ - sleep_us, timeout_us, false, (map), (addr), &(val)); \ - __ret ?: __tmp; \ -}) - -/** - * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs - * - * @map: Regmap to read from - * @addr: Address to poll - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @delay_us: Time to udelay between reads in us (0 tight-loops). - * Should be less than ~10us since udelay is used - * (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. - * - * This is modelled after the readx_poll_timeout_atomic macros in linux/iopoll.h. - * - * Note: In general regmap cannot be used in atomic context. If you want to use - * this macro then first setup your regmap for atomic use (flat or no cache - * and MMIO regmap). - */ -#define regmap_read_poll_timeout_atomic(map, addr, val, cond, delay_us, timeout_us) \ -({ \ - u64 __timeout_us = (timeout_us); \ - unsigned long __delay_us = (delay_us); \ - ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \ - int __ret; \ - for (;;) { \ - __ret = regmap_read((map), (addr), &(val)); \ - if (__ret) \ - break; \ - if (cond) \ - break; \ - if ((__timeout_us) && \ - ktime_compare(ktime_get(), __timeout) > 0) { \ - __ret = regmap_read((map), (addr), &(val)); \ - break; \ - } \ - if (__delay_us) \ - udelay(__delay_us); \ - } \ - __ret ?: ((cond) ? 0 : -ETIMEDOUT); \ -}) - -/** - * regmap_field_read_poll_timeout - Poll until a condition is met or timeout - * - * @field: Regmap field to read from - * @val: Unsigned integer variable to read the value into - * @cond: Break condition (usually involving @val) - * @sleep_us: Maximum time to sleep between reads in us (0 - * tight-loops). Should be less than ~20ms since usleep_range - * is used (see Documentation/timers/timers-howto.rst). - * @timeout_us: Timeout in us, 0 means never timeout - * - * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_field_read - * error return value in case of a error read. In the two former cases, - * the last read value at @addr is stored in @val. Must not be called - * from atomic context if sleep_us or timeout_us are used. - * - * This is modelled after the readx_poll_timeout macros in linux/iopoll.h. - */ -#define regmap_field_read_poll_timeout(field, val, cond, sleep_us, timeout_us) \ -({ \ - int __ret, __tmp; \ - __tmp = read_poll_timeout(regmap_field_read, __ret, __ret || (cond), \ - sleep_us, timeout_us, false, (field), &(val)); \ - __ret ?: __tmp; \ -}) - -#ifdef CONFIG_REGMAP - -enum regmap_endian { - /* Unspecified -> 0 -> Backwards compatible default */ - REGMAP_ENDIAN_DEFAULT = 0, - REGMAP_ENDIAN_BIG, - REGMAP_ENDIAN_LITTLE, - REGMAP_ENDIAN_NATIVE, -}; - -/** - * struct regmap_range - A register range, used for access related checks - * (readable/writeable/volatile/precious checks) - * - * @range_min: address of first register - * @range_max: address of last register - */ -struct regmap_range { - unsigned int range_min; - unsigned int range_max; -}; - -#define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } - -/** - * struct regmap_access_table - A table of register ranges for access checks - * - * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" - * @n_yes_ranges: size of the above array - * @no_ranges: pointer to an array of regmap ranges used as "no ranges" - * @n_no_ranges: size of the above array - * - * A table of ranges including some yes ranges and some no ranges. - * If a register belongs to a no_range, the corresponding check function - * will return false. If a register belongs to a yes range, the corresponding - * check function will return true. "no_ranges" are searched first. - */ -struct regmap_access_table { - const struct regmap_range *yes_ranges; - unsigned int n_yes_ranges; - const struct regmap_range *no_ranges; - unsigned int n_no_ranges; -}; - -typedef void (*regmap_lock)(void *); -typedef void (*regmap_unlock)(void *); - -/** - * struct regmap_config - Configuration for the register map of a device. - * - * @name: Optional name of the regmap. Useful when a device has multiple - * register regions. - * - * @reg_bits: Number of bits in a register address, mandatory. - * @reg_stride: The register address stride. Valid register addresses are a - * multiple of this value. If set to 0, a value of 1 will be - * used. - * @reg_shift: The number of bits to shift the register before performing any - * operations. Any positive number will be downshifted, and negative - * values will be upshifted - * @reg_base: Value to be added to every register address before performing any - * operation. - * @pad_bits: Number of bits of padding between register and value. - * @val_bits: Number of bits in a register value, mandatory. - * - * @writeable_reg: Optional callback returning true if the register - * can be written to. If this field is NULL but wr_table - * (see below) is not, the check is performed on such table - * (a register is writeable if it belongs to one of the ranges - * specified by wr_table). - * @readable_reg: Optional callback returning true if the register - * can be read from. If this field is NULL but rd_table - * (see below) is not, the check is performed on such table - * (a register is readable if it belongs to one of the ranges - * specified by rd_table). - * @volatile_reg: Optional callback returning true if the register - * value can't be cached. If this field is NULL but - * volatile_table (see below) is not, the check is performed on - * such table (a register is volatile if it belongs to one of - * the ranges specified by volatile_table). - * @precious_reg: Optional callback returning true if the register - * should not be read outside of a call from the driver - * (e.g., a clear on read interrupt status register). If this - * field is NULL but precious_table (see below) is not, the - * check is performed on such table (a register is precious if - * it belongs to one of the ranges specified by precious_table). - * @writeable_noinc_reg: Optional callback returning true if the register - * supports multiple write operations without incrementing - * the register number. If this field is NULL but - * wr_noinc_table (see below) is not, the check is - * performed on such table (a register is no increment - * writeable if it belongs to one of the ranges specified - * by wr_noinc_table). - * @readable_noinc_reg: Optional callback returning true if the register - * supports multiple read operations without incrementing - * the register number. If this field is NULL but - * rd_noinc_table (see below) is not, the check is - * performed on such table (a register is no increment - * readable if it belongs to one of the ranges specified - * by rd_noinc_table). - * @disable_locking: This regmap is either protected by external means or - * is guaranteed not to be accessed from multiple threads. - * Don't use any locking mechanisms. - * @lock: Optional lock callback (overrides regmap's default lock - * function, based on spinlock or mutex). - * @unlock: As above for unlocking. - * @lock_arg: this field is passed as the only argument of lock/unlock - * functions (ignored in case regular lock/unlock functions - * are not overridden). - * @reg_read: Optional callback that if filled will be used to perform - * all the reads from the registers. Should only be provided for - * devices whose read operation cannot be represented as a simple - * read operation on a bus such as SPI, I2C, etc. Most of the - * devices do not need this. - * @reg_write: Same as above for writing. - * @reg_update_bits: Optional callback that if filled will be used to perform - * all the update_bits(rmw) operation. Should only be provided - * if the function require special handling with lock and reg - * handling and the operation cannot be represented as a simple - * update_bits operation on a bus such as SPI, I2C, etc. - * @read: Optional callback that if filled will be used to perform all the - * bulk reads from the registers. Data is returned in the buffer used - * to transmit data. - * @write: Same as above for writing. - * @max_raw_read: Max raw read size that can be used on the device. - * @max_raw_write: Max raw write size that can be used on the device. - * @fast_io: Register IO is fast. Use a spinlock instead of a mutex - * to perform locking. This field is ignored if custom lock/unlock - * functions are used (see fields lock/unlock of struct regmap_config). - * This field is a duplicate of a similar file in - * 'struct regmap_bus' and serves exact same purpose. - * Use it only for "no-bus" cases. - * @io_port: Support IO port accessors. Makes sense only when MMIO vs. IO port - * access can be distinguished. - * @max_register: Optional, specifies the maximum valid register address. - * @wr_table: Optional, points to a struct regmap_access_table specifying - * valid ranges for write access. - * @rd_table: As above, for read access. - * @volatile_table: As above, for volatile registers. - * @precious_table: As above, for precious registers. - * @wr_noinc_table: As above, for no increment writeable registers. - * @rd_noinc_table: As above, for no increment readable registers. - * @reg_defaults: Power on reset values for registers (for use with - * register cache support). - * @num_reg_defaults: Number of elements in reg_defaults. - * - * @read_flag_mask: Mask to be set in the top bytes of the register when doing - * a read. - * @write_flag_mask: Mask to be set in the top bytes of the register when doing - * a write. If both read_flag_mask and write_flag_mask are - * empty and zero_flag_mask is not set the regmap_bus default - * masks are used. - * @zero_flag_mask: If set, read_flag_mask and write_flag_mask are used even - * if they are both empty. - * @use_relaxed_mmio: If set, MMIO R/W operations will not use memory barriers. - * This can avoid load on devices which don't require strict - * orderings, but drivers should carefully add any explicit - * memory barriers when they may require them. - * @use_single_read: If set, converts the bulk read operation into a series of - * single read operations. This is useful for a device that - * does not support bulk read. - * @use_single_write: If set, converts the bulk write operation into a series of - * single write operations. This is useful for a device that - * does not support bulk write. - * @can_multi_write: If set, the device supports the multi write mode of bulk - * write operations, if clear multi write requests will be - * split into individual write operations - * - * @cache_type: The actual cache type. - * @reg_defaults_raw: Power on reset values for registers (for use with - * register cache support). - * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. - * @reg_format_endian: Endianness for formatted register addresses. If this is - * DEFAULT, the @reg_format_endian_default value from the - * regmap bus is used. - * @val_format_endian: Endianness for formatted register values. If this is - * DEFAULT, the @reg_format_endian_default value from the - * regmap bus is used. - * - * @ranges: Array of configuration entries for virtual address ranges. - * @num_ranges: Number of range configuration entries. - * @use_hwlock: Indicate if a hardware spinlock should be used. - * @use_raw_spinlock: Indicate if a raw spinlock should be used. - * @hwlock_id: Specify the hardware spinlock id. - * @hwlock_mode: The hardware spinlock mode, should be HWLOCK_IRQSTATE, - * HWLOCK_IRQ or 0. - * @can_sleep: Optional, specifies whether regmap operations can sleep. - */ -struct regmap_config { - const char *name; - - int reg_bits; - int reg_stride; - int reg_shift; - unsigned int reg_base; - int pad_bits; - int val_bits; - - bool (*writeable_reg)(struct device *dev, unsigned int reg); - bool (*readable_reg)(struct device *dev, unsigned int reg); - bool (*volatile_reg)(struct device *dev, unsigned int reg); - bool (*precious_reg)(struct device *dev, unsigned int reg); - bool (*writeable_noinc_reg)(struct device *dev, unsigned int reg); - bool (*readable_noinc_reg)(struct device *dev, unsigned int reg); - - bool disable_locking; - regmap_lock lock; - regmap_unlock unlock; - void *lock_arg; - - int (*reg_read)(void *context, unsigned int reg, unsigned int *val); - int (*reg_write)(void *context, unsigned int reg, unsigned int val); - int (*reg_update_bits)(void *context, unsigned int reg, - unsigned int mask, unsigned int val); - /* Bulk read/write */ - int (*read)(void *context, const void *reg_buf, size_t reg_size, - void *val_buf, size_t val_size); - int (*write)(void *context, const void *data, size_t count); - size_t max_raw_read; - size_t max_raw_write; - - bool fast_io; - bool io_port; - - unsigned int max_register; - const struct regmap_access_table *wr_table; - const struct regmap_access_table *rd_table; - const struct regmap_access_table *volatile_table; - const struct regmap_access_table *precious_table; - const struct regmap_access_table *wr_noinc_table; - const struct regmap_access_table *rd_noinc_table; - const struct reg_default *reg_defaults; - unsigned int num_reg_defaults; - enum regcache_type cache_type; - const void *reg_defaults_raw; - unsigned int num_reg_defaults_raw; - - unsigned long read_flag_mask; - unsigned long write_flag_mask; - bool zero_flag_mask; - - bool use_single_read; - bool use_single_write; - bool use_relaxed_mmio; - bool can_multi_write; - - enum regmap_endian reg_format_endian; - enum regmap_endian val_format_endian; - - const struct regmap_range_cfg *ranges; - unsigned int num_ranges; - - bool use_hwlock; - bool use_raw_spinlock; - unsigned int hwlock_id; - unsigned int hwlock_mode; - - bool can_sleep; -}; - -/** - * struct regmap_range_cfg - Configuration for indirectly accessed or paged - * registers. - * - * @name: Descriptive name for diagnostics - * - * @range_min: Address of the lowest register address in virtual range. - * @range_max: Address of the highest register in virtual range. - * - * @selector_reg: Register with selector field. - * @selector_mask: Bit mask for selector value. - * @selector_shift: Bit shift for selector value. - * - * @window_start: Address of first (lowest) register in data window. - * @window_len: Number of registers in data window. - * - * Registers, mapped to this virtual range, are accessed in two steps: - * 1. page selector register update; - * 2. access through data window registers. - */ -struct regmap_range_cfg { - const char *name; - - /* Registers of virtual address range */ - unsigned int range_min; - unsigned int range_max; - - /* Page selector for indirect addressing */ - unsigned int selector_reg; - unsigned int selector_mask; - int selector_shift; - - /* Data window (per each page) */ - unsigned int window_start; - unsigned int window_len; -}; - -struct regmap_async; - -typedef int (*regmap_hw_write)(void *context, const void *data, - size_t count); -typedef int (*regmap_hw_gather_write)(void *context, - const void *reg, size_t reg_len, - const void *val, size_t val_len); -typedef int (*regmap_hw_async_write)(void *context, - const void *reg, size_t reg_len, - const void *val, size_t val_len, - struct regmap_async *async); -typedef int (*regmap_hw_read)(void *context, - const void *reg_buf, size_t reg_size, - void *val_buf, size_t val_size); -typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, - unsigned int *val); -typedef int (*regmap_hw_reg_noinc_read)(void *context, unsigned int reg, - void *val, size_t val_count); -typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, - unsigned int val); -typedef int (*regmap_hw_reg_noinc_write)(void *context, unsigned int reg, - const void *val, size_t val_count); -typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, - unsigned int mask, unsigned int val); -typedef struct regmap_async *(*regmap_hw_async_alloc)(void); -typedef void (*regmap_hw_free_context)(void *context); - -/** - * struct regmap_bus - Description of a hardware bus for the register map - * infrastructure. - * - * @fast_io: Register IO is fast. Use a spinlock instead of a mutex - * to perform locking. This field is ignored if custom lock/unlock - * functions are used (see fields lock/unlock of - * struct regmap_config). - * @free_on_exit: kfree this on exit of regmap - * @write: Write operation. - * @gather_write: Write operation with split register/value, return -ENOTSUPP - * if not implemented on a given device. - * @async_write: Write operation which completes asynchronously, optional and - * must serialise with respect to non-async I/O. - * @reg_write: Write a single register value to the given register address. This - * write operation has to complete when returning from the function. - * @reg_write_noinc: Write multiple register value to the same register. This - * write operation has to complete when returning from the function. - * @reg_update_bits: Update bits operation to be used against volatile - * registers, intended for devices supporting some mechanism - * for setting clearing bits without having to - * read/modify/write. - * @read: Read operation. Data is returned in the buffer used to transmit - * data. - * @reg_read: Read a single register value from a given register address. - * @free_context: Free context. - * @async_alloc: Allocate a regmap_async() structure. - * @read_flag_mask: Mask to be set in the top byte of the register when doing - * a read. - * @reg_format_endian_default: Default endianness for formatted register - * addresses. Used when the regmap_config specifies DEFAULT. If this is - * DEFAULT, BIG is assumed. - * @val_format_endian_default: Default endianness for formatted register - * values. Used when the regmap_config specifies DEFAULT. If this is - * DEFAULT, BIG is assumed. - * @max_raw_read: Max raw read size that can be used on the bus. - * @max_raw_write: Max raw write size that can be used on the bus. - */ -struct regmap_bus { - bool fast_io; - bool free_on_exit; - regmap_hw_write write; - regmap_hw_gather_write gather_write; - regmap_hw_async_write async_write; - regmap_hw_reg_write reg_write; - regmap_hw_reg_noinc_write reg_noinc_write; - regmap_hw_reg_update_bits reg_update_bits; - regmap_hw_read read; - regmap_hw_reg_read reg_read; - regmap_hw_reg_noinc_read reg_noinc_read; - regmap_hw_free_context free_context; - regmap_hw_async_alloc async_alloc; - u8 read_flag_mask; - enum regmap_endian reg_format_endian_default; - enum regmap_endian val_format_endian_default; - size_t max_raw_read; - size_t max_raw_write; -}; - -/* - * __regmap_init functions. - * - * These functions take a lock key and name parameter, and should not be called - * directly. Instead, use the regmap_init macros that generate a key and name - * for each call. - */ -struct regmap *__regmap_init(struct device *dev, - const struct regmap_bus *bus, - void *bus_context, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_i2c(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_mdio(struct mdio_device *mdio_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_sccb(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_slimbus(struct slim_device *slimbus, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spi(struct spi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_w1(struct device *w1_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, - void __iomem *regs, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_sdw(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_sdw_mbq(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_spi_avmm(struct spi_device *spi, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__regmap_init_fsi(struct fsi_device *fsi_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); - -struct regmap *__devm_regmap_init(struct device *dev, - const struct regmap_bus *bus, - void *bus_context, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_mdio(struct mdio_device *mdio_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_sccb(struct i2c_client *i2c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spi(struct spi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_w1(struct device *w1_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, - const char *clk_id, - void __iomem *regs, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_sdw(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_sdw_mbq(struct sdw_slave *sdw, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_slimbus(struct slim_device *slimbus, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_i3c(struct i3c_device *i3c, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_spi_avmm(struct spi_device *spi, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); -struct regmap *__devm_regmap_init_fsi(struct fsi_device *fsi_dev, - const struct regmap_config *config, - struct lock_class_key *lock_key, - const char *lock_name); - -/* - * Wrapper for regmap_init macros to include a unique lockdep key and name - * for each call. No-op if CONFIG_LOCKDEP is not set. - * - * @fn: Real function to call (in the form __[*_]regmap_init[_*]) - * @name: Config variable name (#config in the calling macro) - **/ -#ifdef CONFIG_LOCKDEP -#define __regmap_lockdep_wrapper(fn, name, ...) \ -( \ - ({ \ - static struct lock_class_key _key; \ - fn(__VA_ARGS__, &_key, \ - KBUILD_BASENAME ":" \ - __stringify(__LINE__) ":" \ - "(" name ")->lock"); \ - }) \ -) -#else -#define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) -#endif - -/** - * regmap_init() - Initialise register map - * - * @dev: Device that will be interacted with - * @bus: Bus-specific callbacks to use with device - * @bus_context: Data passed to bus-specific callbacks - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. This function should generally not be called - * directly, it should be called by bus-specific init functions. - */ -#define regmap_init(dev, bus, bus_context, config) \ - __regmap_lockdep_wrapper(__regmap_init, #config, \ - dev, bus, bus_context, config) -int regmap_attach_dev(struct device *dev, struct regmap *map, - const struct regmap_config *config); - -/** - * regmap_init_i2c() - Initialise register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_i2c(i2c, config) \ - __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ - i2c, config) - -/** - * regmap_init_mdio() - Initialise register map - * - * @mdio_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_mdio(mdio_dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_mdio, #config, \ - mdio_dev, config) - -/** - * regmap_init_sccb() - Initialise register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_sccb(i2c, config) \ - __regmap_lockdep_wrapper(__regmap_init_sccb, #config, \ - i2c, config) - -/** - * regmap_init_slimbus() - Initialise register map - * - * @slimbus: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_slimbus(slimbus, config) \ - __regmap_lockdep_wrapper(__regmap_init_slimbus, #config, \ - slimbus, config) - -/** - * regmap_init_spi() - Initialise register map - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spi(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ - dev, config) - -/** - * regmap_init_spmi_base() - Create regmap for the Base register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spmi_base(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ - dev, config) - -/** - * regmap_init_spmi_ext() - Create regmap for Ext register space - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_spmi_ext(dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ - dev, config) - -/** - * regmap_init_w1() - Initialise register map - * - * @w1_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_w1(w1_dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_w1, #config, \ - w1_dev, config) - -/** - * regmap_init_mmio_clk() - Initialise register map with register clock - * - * @dev: Device that will be interacted with - * @clk_id: register clock consumer ID - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_mmio_clk(dev, clk_id, regs, config) \ - __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ - dev, clk_id, regs, config) - -/** - * regmap_init_mmio() - Initialise register map - * - * @dev: Device that will be interacted with - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_mmio(dev, regs, config) \ - regmap_init_mmio_clk(dev, NULL, regs, config) - -/** - * regmap_init_ac97() - Initialise AC'97 register map - * - * @ac97: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_ac97(ac97, config) \ - __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ - ac97, config) -bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); - -/** - * regmap_init_sdw() - Initialise register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_sdw(sdw, config) \ - __regmap_lockdep_wrapper(__regmap_init_sdw, #config, \ - sdw, config) - -/** - * regmap_init_sdw_mbq() - Initialise register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_sdw_mbq(sdw, config) \ - __regmap_lockdep_wrapper(__regmap_init_sdw_mbq, #config, \ - sdw, config) - -/** - * regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave - * to AVMM Bus Bridge - * - * @spi: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. - */ -#define regmap_init_spi_avmm(spi, config) \ - __regmap_lockdep_wrapper(__regmap_init_spi_avmm, #config, \ - spi, config) - -/** - * regmap_init_fsi() - Initialise register map - * - * @fsi_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer to - * a struct regmap. - */ -#define regmap_init_fsi(fsi_dev, config) \ - __regmap_lockdep_wrapper(__regmap_init_fsi, #config, fsi_dev, \ - config) - -/** - * devm_regmap_init() - Initialise managed register map - * - * @dev: Device that will be interacted with - * @bus: Bus-specific callbacks to use with device - * @bus_context: Data passed to bus-specific callbacks - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. This function should generally not be called - * directly, it should be called by bus-specific init functions. The - * map will be automatically freed by the device management code. - */ -#define devm_regmap_init(dev, bus, bus_context, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ - dev, bus, bus_context, config) - -/** - * devm_regmap_init_i2c() - Initialise managed register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_i2c(i2c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ - i2c, config) - -/** - * devm_regmap_init_mdio() - Initialise managed register map - * - * @mdio_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_mdio(mdio_dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_mdio, #config, \ - mdio_dev, config) - -/** - * devm_regmap_init_sccb() - Initialise managed register map - * - * @i2c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_sccb(i2c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_sccb, #config, \ - i2c, config) - -/** - * devm_regmap_init_spi() - Initialise register map - * - * @dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The map will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spi(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ - dev, config) - -/** - * devm_regmap_init_spmi_base() - Create managed regmap for Base register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spmi_base(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ - dev, config) - -/** - * devm_regmap_init_spmi_ext() - Create managed regmap for Ext register space - * - * @dev: SPMI device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spmi_ext(dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ - dev, config) - -/** - * devm_regmap_init_w1() - Initialise managed register map - * - * @w1_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_w1(w1_dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_w1, #config, \ - w1_dev, config) -/** - * devm_regmap_init_mmio_clk() - Initialise managed register map with clock - * - * @dev: Device that will be interacted with - * @clk_id: register clock consumer ID - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ - dev, clk_id, regs, config) - -/** - * devm_regmap_init_mmio() - Initialise managed register map - * - * @dev: Device that will be interacted with - * @regs: Pointer to memory-mapped IO region - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_mmio(dev, regs, config) \ - devm_regmap_init_mmio_clk(dev, NULL, regs, config) - -/** - * devm_regmap_init_ac97() - Initialise AC'97 register map - * - * @ac97: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_ac97(ac97, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ - ac97, config) - -/** - * devm_regmap_init_sdw() - Initialise managed register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_sdw(sdw, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_sdw, #config, \ - sdw, config) - -/** - * devm_regmap_init_sdw_mbq() - Initialise managed register map - * - * @sdw: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_sdw_mbq(sdw, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_sdw_mbq, #config, \ - sdw, config) - -/** - * devm_regmap_init_slimbus() - Initialise managed register map - * - * @slimbus: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_slimbus(slimbus, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_slimbus, #config, \ - slimbus, config) - -/** - * devm_regmap_init_i3c() - Initialise managed register map - * - * @i3c: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_i3c(i3c, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_i3c, #config, \ - i3c, config) - -/** - * devm_regmap_init_spi_avmm() - Initialize register map for Intel SPI Slave - * to AVMM Bus Bridge - * - * @spi: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The map will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_spi_avmm(spi, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_spi_avmm, #config, \ - spi, config) - -/** - * devm_regmap_init_fsi() - Initialise managed register map - * - * @fsi_dev: Device that will be interacted with - * @config: Configuration for register map - * - * The return value will be an ERR_PTR() on error or a valid pointer - * to a struct regmap. The regmap will be automatically freed by the - * device management code. - */ -#define devm_regmap_init_fsi(fsi_dev, config) \ - __regmap_lockdep_wrapper(__devm_regmap_init_fsi, #config, \ - fsi_dev, config) - -int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk); -void regmap_mmio_detach_clk(struct regmap *map); -void regmap_exit(struct regmap *map); -int regmap_reinit_cache(struct regmap *map, - const struct regmap_config *config); -struct regmap *dev_get_regmap(struct device *dev, const char *name); -struct device *regmap_get_device(struct regmap *map); -int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); -int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); -int regmap_raw_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_noinc_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, - size_t val_count); -int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, - int num_regs); -int regmap_multi_reg_write_bypassed(struct regmap *map, - const struct reg_sequence *regs, - int num_regs); -int regmap_raw_write_async(struct regmap *map, unsigned int reg, - const void *val, size_t val_len); -int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); -int regmap_raw_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len); -int regmap_noinc_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len); -int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, - size_t val_count); -int regmap_update_bits_base(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); - -static inline int regmap_update_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, false, false); -} - -static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, true, false); -} - -static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - return regmap_update_bits_base(map, reg, mask, val, - change, false, false); -} - -static inline int -regmap_update_bits_check_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - return regmap_update_bits_base(map, reg, mask, val, - change, true, false); -} - -static inline int regmap_write_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - return regmap_update_bits_base(map, reg, mask, val, NULL, false, true); -} - -int regmap_get_val_bytes(struct regmap *map); -int regmap_get_max_register(struct regmap *map); -int regmap_get_reg_stride(struct regmap *map); -bool regmap_might_sleep(struct regmap *map); -int regmap_async_complete(struct regmap *map); -bool regmap_can_raw_write(struct regmap *map); -size_t regmap_get_raw_read_max(struct regmap *map); -size_t regmap_get_raw_write_max(struct regmap *map); - -int regcache_sync(struct regmap *map); -int regcache_sync_region(struct regmap *map, unsigned int min, - unsigned int max); -int regcache_drop_region(struct regmap *map, unsigned int min, - unsigned int max); -void regcache_cache_only(struct regmap *map, bool enable); -void regcache_cache_bypass(struct regmap *map, bool enable); -void regcache_mark_dirty(struct regmap *map); -bool regcache_reg_cached(struct regmap *map, unsigned int reg); - -bool regmap_check_range_table(struct regmap *map, unsigned int reg, - const struct regmap_access_table *table); - -int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, - int num_regs); -int regmap_parse_val(struct regmap *map, const void *buf, - unsigned int *val); - -static inline bool regmap_reg_in_range(unsigned int reg, - const struct regmap_range *range) -{ - return reg >= range->range_min && reg <= range->range_max; -} - -bool regmap_reg_in_ranges(unsigned int reg, - const struct regmap_range *ranges, - unsigned int nranges); - -static inline int regmap_set_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - return regmap_update_bits_base(map, reg, bits, bits, - NULL, false, false); -} - -static inline int regmap_clear_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - return regmap_update_bits_base(map, reg, bits, 0, NULL, false, false); -} - -int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits); - -/** - * struct reg_field - Description of an register field - * - * @reg: Offset of the register within the regmap bank - * @lsb: lsb of the register field. - * @msb: msb of the register field. - * @id_size: port size if it has some ports - * @id_offset: address offset for each ports - */ -struct reg_field { - unsigned int reg; - unsigned int lsb; - unsigned int msb; - unsigned int id_size; - unsigned int id_offset; -}; - -#define REG_FIELD(_reg, _lsb, _msb) { \ - .reg = _reg, \ - .lsb = _lsb, \ - .msb = _msb, \ - } - -#define REG_FIELD_ID(_reg, _lsb, _msb, _size, _offset) { \ - .reg = _reg, \ - .lsb = _lsb, \ - .msb = _msb, \ - .id_size = _size, \ - .id_offset = _offset, \ - } - -struct regmap_field *regmap_field_alloc(struct regmap *regmap, - struct reg_field reg_field); -void regmap_field_free(struct regmap_field *field); - -struct regmap_field *devm_regmap_field_alloc(struct device *dev, - struct regmap *regmap, struct reg_field reg_field); -void devm_regmap_field_free(struct device *dev, struct regmap_field *field); - -int regmap_field_bulk_alloc(struct regmap *regmap, - struct regmap_field **rm_field, - const struct reg_field *reg_field, - int num_fields); -void regmap_field_bulk_free(struct regmap_field *field); -int devm_regmap_field_bulk_alloc(struct device *dev, struct regmap *regmap, - struct regmap_field **field, - const struct reg_field *reg_field, - int num_fields); -void devm_regmap_field_bulk_free(struct device *dev, - struct regmap_field *field); - -int regmap_field_read(struct regmap_field *field, unsigned int *val); -int regmap_field_update_bits_base(struct regmap_field *field, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); -int regmap_fields_read(struct regmap_field *field, unsigned int id, - unsigned int *val); -int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force); - -static inline int regmap_field_write(struct regmap_field *field, - unsigned int val) -{ - return regmap_field_update_bits_base(field, ~0, val, - NULL, false, false); -} - -static inline int regmap_field_force_write(struct regmap_field *field, - unsigned int val) -{ - return regmap_field_update_bits_base(field, ~0, val, NULL, false, true); -} - -static inline int regmap_field_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - return regmap_field_update_bits_base(field, mask, val, - NULL, false, false); -} - -static inline int regmap_field_set_bits(struct regmap_field *field, - unsigned int bits) -{ - return regmap_field_update_bits_base(field, bits, bits, NULL, false, - false); -} - -static inline int regmap_field_clear_bits(struct regmap_field *field, - unsigned int bits) -{ - return regmap_field_update_bits_base(field, bits, 0, NULL, false, - false); -} - -int regmap_field_test_bits(struct regmap_field *field, unsigned int bits); - -static inline int -regmap_field_force_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - return regmap_field_update_bits_base(field, mask, val, - NULL, false, true); -} - -static inline int regmap_fields_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, ~0, val, - NULL, false, false); -} - -static inline int regmap_fields_force_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, ~0, val, - NULL, false, true); -} - -static inline int -regmap_fields_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, mask, val, - NULL, false, false); -} - -static inline int -regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - return regmap_fields_update_bits_base(field, id, mask, val, - NULL, false, true); -} - -/** - * struct regmap_irq_type - IRQ type definitions. - * - * @type_reg_offset: Offset register for the irq type setting. - * @type_rising_val: Register value to configure RISING type irq. - * @type_falling_val: Register value to configure FALLING type irq. - * @type_level_low_val: Register value to configure LEVEL_LOW type irq. - * @type_level_high_val: Register value to configure LEVEL_HIGH type irq. - * @types_supported: logical OR of IRQ_TYPE_* flags indicating supported types. - */ -struct regmap_irq_type { - unsigned int type_reg_offset; - unsigned int type_reg_mask; - unsigned int type_rising_val; - unsigned int type_falling_val; - unsigned int type_level_low_val; - unsigned int type_level_high_val; - unsigned int types_supported; -}; - -/** - * struct regmap_irq - Description of an IRQ for the generic regmap irq_chip. - * - * @reg_offset: Offset of the status/mask register within the bank - * @mask: Mask used to flag/control the register. - * @type: IRQ trigger type setting details if supported. - */ -struct regmap_irq { - unsigned int reg_offset; - unsigned int mask; - struct regmap_irq_type type; -}; - -#define REGMAP_IRQ_REG(_irq, _off, _mask) \ - [_irq] = { .reg_offset = (_off), .mask = (_mask) } - -#define REGMAP_IRQ_REG_LINE(_id, _reg_bits) \ - [_id] = { \ - .mask = BIT((_id) % (_reg_bits)), \ - .reg_offset = (_id) / (_reg_bits), \ - } - -#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ - { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } - -struct regmap_irq_sub_irq_map { - unsigned int num_regs; - unsigned int *offset; -}; - -struct regmap_irq_chip_data; - -/** - * struct regmap_irq_chip - Description of a generic regmap irq_chip. - * - * @name: Descriptive name for IRQ controller. - * - * @main_status: Base main status register address. For chips which have - * interrupts arranged in separate sub-irq blocks with own IRQ - * registers and which have a main IRQ registers indicating - * sub-irq blocks with unhandled interrupts. For such chips fill - * sub-irq register information in status_base, mask_base and - * ack_base. - * @num_main_status_bits: Should be given to chips where number of meaningfull - * main status bits differs from num_regs. - * @sub_reg_offsets: arrays of mappings from main register bits to sub irq - * registers. First item in array describes the registers - * for first main status bit. Second array for second bit etc. - * Offset is given as sub register status offset to - * status_base. Should contain num_regs arrays. - * Can be provided for chips with more complex mapping than - * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... - * When used with not_fixed_stride, each one-element array - * member contains offset calculated as address from each - * peripheral to first peripheral. - * @num_main_regs: Number of 'main status' irq registers for chips which have - * main_status set. - * - * @status_base: Base status register address. - * @mask_base: Base mask register address. Mask bits are set to 1 when an - * interrupt is masked, 0 when unmasked. - * @unmask_base: Base unmask register address. Unmask bits are set to 1 when - * an interrupt is unmasked and 0 when masked. - * @ack_base: Base ack address. If zero then the chip is clear on read. - * Using zero value is possible with @use_ack bit. - * @wake_base: Base address for wake enables. If zero unsupported. - * @type_base: Base address for irq type. If zero unsupported. Deprecated, - * use @config_base instead. - * @virt_reg_base: Base addresses for extra config regs. Deprecated, use - * @config_base instead. - * @config_base: Base address for IRQ type config regs. If null unsupported. - * @irq_reg_stride: Stride to use for chips where registers are not contiguous. - * @init_ack_masked: Ack all masked interrupts once during initalization. - * @mask_unmask_non_inverted: Controls mask bit inversion for chips that set - * both @mask_base and @unmask_base. If false, mask and unmask bits are - * inverted (which is deprecated behavior); if true, bits will not be - * inverted and the registers keep their normal behavior. Note that if - * you use only one of @mask_base or @unmask_base, this flag has no - * effect and is unnecessary. Any new drivers that set both @mask_base - * and @unmask_base should set this to true to avoid relying on the - * deprecated behavior. - * @use_ack: Use @ack register even if it is zero. - * @ack_invert: Inverted ack register: cleared bits for ack. - * @clear_ack: Use this to set 1 and 0 or vice-versa to clear interrupts. - * @wake_invert: Inverted wake register: cleared bits are wake enabled. - * @type_in_mask: Use the mask registers for controlling irq type. Use this if - * the hardware provides separate bits for rising/falling edge - * or low/high level interrupts and they should be combined into - * a single logical interrupt. Use &struct regmap_irq_type data - * to define the mask bit for each irq type. - * @clear_on_unmask: For chips with interrupts cleared on read: read the status - * registers before unmasking interrupts to clear any bits - * set when they were masked. - * @not_fixed_stride: Used when chip peripherals are not laid out with fixed - * stride. Must be used with sub_reg_offsets containing the - * offsets to each peripheral. Deprecated; the same thing - * can be accomplished with a @get_irq_reg callback, without - * the need for a @sub_reg_offsets table. - * @status_invert: Inverted status register: cleared bits are active interrupts. - * @runtime_pm: Hold a runtime PM lock on the device when accessing it. - * @no_status: No status register: all interrupts assumed generated by device. - * - * @num_regs: Number of registers in each control bank. - * @irqs: Descriptors for individual IRQs. Interrupt numbers are - * assigned based on the index in the array of the interrupt. - * @num_irqs: Number of descriptors. - * @num_type_reg: Number of type registers. Deprecated, use config registers - * instead. - * @num_virt_regs: Number of non-standard irq configuration registers. - * If zero unsupported. Deprecated, use config registers - * instead. - * @num_config_bases: Number of config base registers. - * @num_config_regs: Number of config registers for each config base register. - * @handle_pre_irq: Driver specific callback to handle interrupt from device - * before regmap_irq_handler process the interrupts. - * @handle_post_irq: Driver specific callback to handle interrupt from device - * after handling the interrupts in regmap_irq_handler(). - * @handle_mask_sync: Callback used to handle IRQ mask syncs. The index will be - * in the range [0, num_regs) - * @set_type_virt: Driver specific callback to extend regmap_irq_set_type() - * and configure virt regs. Deprecated, use @set_type_config - * callback and config registers instead. - * @set_type_config: Callback used for configuring irq types. - * @get_irq_reg: Callback for mapping (base register, index) pairs to register - * addresses. The base register will be one of @status_base, - * @mask_base, etc., @main_status, or any of @config_base. - * The index will be in the range [0, num_main_regs[ for the - * main status base, [0, num_type_settings[ for any config - * register base, and [0, num_regs[ for any other base. - * If unspecified then regmap_irq_get_irq_reg_linear() is used. - * @irq_drv_data: Driver specific IRQ data which is passed as parameter when - * driver specific pre/post interrupt handler is called. - * - * This is not intended to handle every possible interrupt controller, but - * it should handle a substantial proportion of those that are found in the - * wild. - */ -struct regmap_irq_chip { - const char *name; - - unsigned int main_status; - unsigned int num_main_status_bits; - struct regmap_irq_sub_irq_map *sub_reg_offsets; - int num_main_regs; - - unsigned int status_base; - unsigned int mask_base; - unsigned int unmask_base; - unsigned int ack_base; - unsigned int wake_base; - unsigned int type_base; - unsigned int *virt_reg_base; - const unsigned int *config_base; - unsigned int irq_reg_stride; - unsigned int init_ack_masked:1; - unsigned int mask_unmask_non_inverted:1; - unsigned int use_ack:1; - unsigned int ack_invert:1; - unsigned int clear_ack:1; - unsigned int wake_invert:1; - unsigned int runtime_pm:1; - unsigned int type_in_mask:1; - unsigned int clear_on_unmask:1; - unsigned int not_fixed_stride:1; - unsigned int status_invert:1; - unsigned int no_status:1; - - int num_regs; - - const struct regmap_irq *irqs; - int num_irqs; - - int num_type_reg; - int num_virt_regs; - int num_config_bases; - int num_config_regs; - - int (*handle_pre_irq)(void *irq_drv_data); - int (*handle_post_irq)(void *irq_drv_data); - int (*handle_mask_sync)(struct regmap *map, int index, - unsigned int mask_buf_def, - unsigned int mask_buf, void *irq_drv_data); - int (*set_type_virt)(unsigned int **buf, unsigned int type, - unsigned long hwirq, int reg); - int (*set_type_config)(unsigned int **buf, unsigned int type, - const struct regmap_irq *irq_data, int idx, - void *irq_drv_data); - unsigned int (*get_irq_reg)(struct regmap_irq_chip_data *data, - unsigned int base, int index); - void *irq_drv_data; -}; - -unsigned int regmap_irq_get_irq_reg_linear(struct regmap_irq_chip_data *data, - unsigned int base, int index); -int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type, - const struct regmap_irq *irq_data, - int idx, void *irq_drv_data); - -int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, - int irq_base, const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode, - struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); - -int devm_regmap_add_irq_chip(struct device *dev, struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -int devm_regmap_add_irq_chip_fwnode(struct device *dev, - struct fwnode_handle *fwnode, - struct regmap *map, int irq, - int irq_flags, int irq_base, - const struct regmap_irq_chip *chip, - struct regmap_irq_chip_data **data); -void devm_regmap_del_irq_chip(struct device *dev, int irq, - struct regmap_irq_chip_data *data); - -int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); -int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); -struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); - -#else - -/* - * These stubs should only ever be called by generic code which has - * regmap based facilities, if they ever get called at runtime - * something is going wrong and something probably needs to select - * REGMAP. - */ - -static inline int regmap_write(struct regmap *map, unsigned int reg, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_write_async(struct regmap *map, unsigned int reg, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_noinc_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, - const void *val, size_t val_count) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_read(struct regmap *map, unsigned int reg, - unsigned int *val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_raw_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_noinc_read(struct regmap *map, unsigned int reg, - void *val, size_t val_len) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, - void *val, size_t val_count) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_set_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_clear_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_test_bits(struct regmap *map, - unsigned int reg, unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_update_bits_base(struct regmap_field *field, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_update_bits_base(struct regmap_field *field, - unsigned int id, - unsigned int mask, unsigned int val, - bool *change, bool async, bool force) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_update_bits_check(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_update_bits_check_async(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val, - bool *change) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_write_bits(struct regmap *map, unsigned int reg, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_write(struct regmap_field *field, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_force_write(struct regmap_field *field, - unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_field_force_update_bits(struct regmap_field *field, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_set_bits(struct regmap_field *field, - unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_clear_bits(struct regmap_field *field, - unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_field_test_bits(struct regmap_field *field, - unsigned int bits) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_fields_force_write(struct regmap_field *field, - unsigned int id, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_fields_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int -regmap_fields_force_update_bits(struct regmap_field *field, unsigned int id, - unsigned int mask, unsigned int val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_val_bytes(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_max_register(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_get_reg_stride(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline bool regmap_might_sleep(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return true; -} - -static inline int regcache_sync(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regcache_sync_region(struct regmap *map, unsigned int min, - unsigned int max) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regcache_drop_region(struct regmap *map, unsigned int min, - unsigned int max) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline void regcache_cache_only(struct regmap *map, bool enable) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regcache_cache_bypass(struct regmap *map, bool enable) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regcache_mark_dirty(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline void regmap_async_complete(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); -} - -static inline int regmap_register_patch(struct regmap *map, - const struct reg_sequence *regs, - int num_regs) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline int regmap_parse_val(struct regmap *map, const void *buf, - unsigned int *val) -{ - WARN_ONCE(1, "regmap API is disabled"); - return -EINVAL; -} - -static inline struct regmap *dev_get_regmap(struct device *dev, - const char *name) -{ - return NULL; -} - -static inline struct device *regmap_get_device(struct regmap *map) -{ - WARN_ONCE(1, "regmap API is disabled"); - return NULL; -} - -#endif - -#endif diff --git a/snd-alpx/include/5.3/dmaengine.h b/snd-alpx/include/5.3/dmaengine.h deleted file mode 100644 index 501c0b0..0000000 --- a/snd-alpx/include/5.3/dmaengine.h +++ /dev/null @@ -1,174 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * The contents of this file are private to DMA engine drivers, and is not - * part of the API to be used by DMA engine users. - */ -#ifndef DMAENGINE_H -#define DMAENGINE_H - -#include <linux/bug.h> -#include <linux/dmaengine.h> - -/** - * dma_cookie_init - initialize the cookies for a DMA channel - * @chan: dma channel to initialize - */ -static inline void dma_cookie_init(struct dma_chan *chan) -{ - chan->cookie = DMA_MIN_COOKIE; - chan->completed_cookie = DMA_MIN_COOKIE; -} - -/** - * dma_cookie_assign - assign a DMA engine cookie to the descriptor - * @tx: descriptor needing cookie - * - * Assign a unique non-zero per-channel cookie to the descriptor. - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx) -{ - struct dma_chan *chan = tx->chan; - dma_cookie_t cookie; - - cookie = chan->cookie + 1; - if (cookie < DMA_MIN_COOKIE) - cookie = DMA_MIN_COOKIE; - tx->cookie = chan->cookie = cookie; - - return cookie; -} - -/** - * dma_cookie_complete - complete a descriptor - * @tx: descriptor to complete - * - * Mark this descriptor complete by updating the channels completed - * cookie marker. Zero the descriptors cookie to prevent accidental - * repeated completions. - * - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline void dma_cookie_complete(struct dma_async_tx_descriptor *tx) -{ - BUG_ON(tx->cookie < DMA_MIN_COOKIE); - tx->chan->completed_cookie = tx->cookie; - tx->cookie = 0; -} - -/** - * dma_cookie_status - report cookie status - * @chan: dma channel - * @cookie: cookie we are interested in - * @state: dma_tx_state structure to return last/used cookies - * - * Report the status of the cookie, filling in the state structure if - * non-NULL. No locking is required. - */ -static inline enum dma_status dma_cookie_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *state) -{ - dma_cookie_t used, complete; - - used = chan->cookie; - complete = chan->completed_cookie; - barrier(); - if (state) { - state->last = complete; - state->used = used; - state->residue = 0; - } - return dma_async_is_complete(cookie, complete, used); -} - -static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) -{ - if (state) - state->residue = residue; -} - -struct dmaengine_desc_callback { - dma_async_tx_callback callback; - dma_async_tx_callback_result callback_result; - void *callback_param; -}; - -/** - * dmaengine_desc_get_callback - get the passed in callback function - * @tx: tx descriptor - * @cb: temp struct to hold the callback info - * - * Fill the passed in cb struct with what's available in the passed in - * tx descriptor struct - * No locking is required. - */ -static inline void -dmaengine_desc_get_callback(struct dma_async_tx_descriptor *tx, - struct dmaengine_desc_callback *cb) -{ - cb->callback = tx->callback; - cb->callback_result = tx->callback_result; - cb->callback_param = tx->callback_param; -} - -/** - * dmaengine_desc_callback_invoke - call the callback function in cb struct - * @cb: temp struct that is holding the callback info - * @result: transaction result - * - * Call the callback function provided in the cb struct with the parameter - * in the cb struct. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_callback_invoke(struct dmaengine_desc_callback *cb, - const struct dmaengine_result *result) -{ - struct dmaengine_result dummy_result = { - .result = DMA_TRANS_NOERROR, - .residue = 0 - }; - - if (cb->callback_result) { - if (!result) - result = &dummy_result; - cb->callback_result(cb->callback_param, result); - } else if (cb->callback) { - cb->callback(cb->callback_param); - } -} - -/** - * dmaengine_desc_get_callback_invoke - get the callback in tx descriptor and - * then immediately call the callback. - * @tx: dma async tx descriptor - * @result: transaction result - * - * Call dmaengine_desc_get_callback() and dmaengine_desc_callback_invoke() - * in a single function since no work is necessary in between for the driver. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_get_callback_invoke(struct dma_async_tx_descriptor *tx, - const struct dmaengine_result *result) -{ - struct dmaengine_desc_callback cb; - - dmaengine_desc_get_callback(tx, &cb); - dmaengine_desc_callback_invoke(&cb, result); -} - -/** - * dmaengine_desc_callback_valid - verify the callback is valid in cb - * @cb: callback info struct - * - * Return a bool that verifies whether callback in cb is valid or not. - * No locking is required. - */ -static inline bool -dmaengine_desc_callback_valid(struct dmaengine_desc_callback *cb) -{ - return (cb->callback) ? true : false; -} - -#endif diff --git a/snd-alpx/include/5.3/virt-dma.h b/snd-alpx/include/5.3/virt-dma.h deleted file mode 100644 index ab158ba..0000000 --- a/snd-alpx/include/5.3/virt-dma.h +++ /dev/null @@ -1,222 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Virtual DMA channel support for DMAengine - * - * Copyright (C) 2012 Russell King - */ -#ifndef VIRT_DMA_H -#define VIRT_DMA_H - -#include <linux/dmaengine.h> -#include <linux/interrupt.h> - -#include "dmaengine.h" - -struct virt_dma_desc { - struct dma_async_tx_descriptor tx; - struct dmaengine_result tx_result; - /* protected by vc.lock */ - struct list_head node; -}; - -struct virt_dma_chan { - struct dma_chan chan; - struct tasklet_struct task; - void (*desc_free)(struct virt_dma_desc *); - - spinlock_t lock; - - /* protected by vc.lock */ - struct list_head desc_allocated; - struct list_head desc_submitted; - struct list_head desc_issued; - struct list_head desc_completed; - - struct virt_dma_desc *cyclic; - struct virt_dma_desc *vd_terminated; -}; - -static inline struct virt_dma_chan *to_virt_chan(struct dma_chan *chan) -{ - return container_of(chan, struct virt_dma_chan, chan); -} - -void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head); -void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev); -struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *, dma_cookie_t); -extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *); -extern int vchan_tx_desc_free(struct dma_async_tx_descriptor *); - -/** - * vchan_tx_prep - prepare a descriptor - * @vc: virtual channel allocating this descriptor - * @vd: virtual descriptor to prepare - * @tx_flags: flags argument passed in to prepare function - */ -static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan *vc, - struct virt_dma_desc *vd, unsigned long tx_flags) -{ - unsigned long flags; - - dma_async_tx_descriptor_init(&vd->tx, &vc->chan); - vd->tx.flags = tx_flags; - vd->tx.tx_submit = vchan_tx_submit; - vd->tx.desc_free = vchan_tx_desc_free; - - vd->tx_result.result = DMA_TRANS_NOERROR; - vd->tx_result.residue = 0; - - spin_lock_irqsave(&vc->lock, flags); - list_add_tail(&vd->node, &vc->desc_allocated); - spin_unlock_irqrestore(&vc->lock, flags); - - return &vd->tx; -} - -/** - * vchan_issue_pending - move submitted descriptors to issued list - * @vc: virtual channel to update - * - * vc.lock must be held by caller - */ -static inline bool vchan_issue_pending(struct virt_dma_chan *vc) -{ - list_splice_tail_init(&vc->desc_submitted, &vc->desc_issued); - return !list_empty(&vc->desc_issued); -} - -/** - * vchan_cookie_complete - report completion of a descriptor - * @vd: virtual descriptor to update - * - * vc.lock must be held by caller - */ -static inline void vchan_cookie_complete(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - dma_cookie_t cookie; - - cookie = vd->tx.cookie; - dma_cookie_complete(&vd->tx); - dev_vdbg(vc->chan.device->dev, "txd %p[%x]: marked complete\n", - vd, cookie); - list_add_tail(&vd->node, &vc->desc_completed); - - tasklet_schedule(&vc->task); -} - -/** - * vchan_vdesc_fini - Free or reuse a descriptor - * @vd: virtual descriptor to free/reuse - */ -static inline void vchan_vdesc_fini(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - if (dmaengine_desc_test_reuse(&vd->tx)) - list_add(&vd->node, &vc->desc_allocated); - else - vc->desc_free(vd); -} - -/** - * vchan_cyclic_callback - report the completion of a period - * @vd: virtual descriptor - */ -static inline void vchan_cyclic_callback(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - vc->cyclic = vd; - tasklet_schedule(&vc->task); -} - -/** - * vchan_terminate_vdesc - Disable pending cyclic callback - * @vd: virtual descriptor to be terminated - * - * vc.lock must be held by caller - */ -static inline void vchan_terminate_vdesc(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - /* free up stuck descriptor */ - if (vc->vd_terminated) - vchan_vdesc_fini(vc->vd_terminated); - - vc->vd_terminated = vd; - if (vc->cyclic == vd) - vc->cyclic = NULL; -} - -/** - * vchan_next_desc - peek at the next descriptor to be processed - * @vc: virtual channel to obtain descriptor from - * - * vc.lock must be held by caller - */ -static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc) -{ - return list_first_entry_or_null(&vc->desc_issued, - struct virt_dma_desc, node); -} - -/** - * vchan_get_all_descriptors - obtain all submitted and issued descriptors - * @vc: virtual channel to get descriptors from - * @head: list of descriptors found - * - * vc.lock must be held by caller - * - * Removes all submitted and issued descriptors from internal lists, and - * provides a list of all descriptors found - */ -static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc, - struct list_head *head) -{ - list_splice_tail_init(&vc->desc_allocated, head); - list_splice_tail_init(&vc->desc_submitted, head); - list_splice_tail_init(&vc->desc_issued, head); - list_splice_tail_init(&vc->desc_completed, head); -} - -static inline void vchan_free_chan_resources(struct virt_dma_chan *vc) -{ - struct virt_dma_desc *vd; - unsigned long flags; - LIST_HEAD(head); - - spin_lock_irqsave(&vc->lock, flags); - vchan_get_all_descriptors(vc, &head); - list_for_each_entry(vd, &head, node) - dmaengine_desc_clear_reuse(&vd->tx); - spin_unlock_irqrestore(&vc->lock, flags); - - vchan_dma_desc_free_list(vc, &head); -} - -/** - * vchan_synchronize() - synchronize callback execution to the current context - * @vc: virtual channel to synchronize - * - * Makes sure that all scheduled or active callbacks have finished running. For - * proper operation the caller has to ensure that no new callbacks are scheduled - * after the invocation of this function started. - * Free up the terminated cyclic descriptor to prevent memory leakage. - */ -static inline void vchan_synchronize(struct virt_dma_chan *vc) -{ - unsigned long flags; - - tasklet_kill(&vc->task); - - spin_lock_irqsave(&vc->lock, flags); - if (vc->vd_terminated) { - vchan_vdesc_fini(vc->vd_terminated); - vc->vd_terminated = NULL; - } - spin_unlock_irqrestore(&vc->lock, flags); -} - -#endif diff --git a/snd-alpx/include/5.6/dmaengine.h b/snd-alpx/include/5.6/dmaengine.h deleted file mode 100644 index e8a320c..0000000 --- a/snd-alpx/include/5.6/dmaengine.h +++ /dev/null @@ -1,185 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * The contents of this file are private to DMA engine drivers, and is not - * part of the API to be used by DMA engine users. - */ -#ifndef DMAENGINE_H -#define DMAENGINE_H - -#include <linux/bug.h> -#include <linux/dmaengine.h> - -/** - * dma_cookie_init - initialize the cookies for a DMA channel - * @chan: dma channel to initialize - */ -static inline void dma_cookie_init(struct dma_chan *chan) -{ - chan->cookie = DMA_MIN_COOKIE; - chan->completed_cookie = DMA_MIN_COOKIE; -} - -/** - * dma_cookie_assign - assign a DMA engine cookie to the descriptor - * @tx: descriptor needing cookie - * - * Assign a unique non-zero per-channel cookie to the descriptor. - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx) -{ - struct dma_chan *chan = tx->chan; - dma_cookie_t cookie; - - cookie = chan->cookie + 1; - if (cookie < DMA_MIN_COOKIE) - cookie = DMA_MIN_COOKIE; - tx->cookie = chan->cookie = cookie; - - return cookie; -} - -/** - * dma_cookie_complete - complete a descriptor - * @tx: descriptor to complete - * - * Mark this descriptor complete by updating the channels completed - * cookie marker. Zero the descriptors cookie to prevent accidental - * repeated completions. - * - * Note: caller is expected to hold a lock to prevent concurrency. - */ -static inline void dma_cookie_complete(struct dma_async_tx_descriptor *tx) -{ - BUG_ON(tx->cookie < DMA_MIN_COOKIE); - tx->chan->completed_cookie = tx->cookie; - tx->cookie = 0; -} - -/** - * dma_cookie_status - report cookie status - * @chan: dma channel - * @cookie: cookie we are interested in - * @state: dma_tx_state structure to return last/used cookies - * - * Report the status of the cookie, filling in the state structure if - * non-NULL. No locking is required. - */ -static inline enum dma_status dma_cookie_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *state) -{ - dma_cookie_t used, complete; - - used = chan->cookie; - complete = chan->completed_cookie; - barrier(); - if (state) { - state->last = complete; - state->used = used; - state->residue = 0; - state->in_flight_bytes = 0; - } - return dma_async_is_complete(cookie, complete, used); -} - -static inline void dma_set_residue(struct dma_tx_state *state, u32 residue) -{ - if (state) - state->residue = residue; -} - -static inline void dma_set_in_flight_bytes(struct dma_tx_state *state, - u32 in_flight_bytes) -{ - if (state) - state->in_flight_bytes = in_flight_bytes; -} - -struct dmaengine_desc_callback { - dma_async_tx_callback callback; - dma_async_tx_callback_result callback_result; - void *callback_param; -}; - -/** - * dmaengine_desc_get_callback - get the passed in callback function - * @tx: tx descriptor - * @cb: temp struct to hold the callback info - * - * Fill the passed in cb struct with what's available in the passed in - * tx descriptor struct - * No locking is required. - */ -static inline void -dmaengine_desc_get_callback(struct dma_async_tx_descriptor *tx, - struct dmaengine_desc_callback *cb) -{ - cb->callback = tx->callback; - cb->callback_result = tx->callback_result; - cb->callback_param = tx->callback_param; -} - -/** - * dmaengine_desc_callback_invoke - call the callback function in cb struct - * @cb: temp struct that is holding the callback info - * @result: transaction result - * - * Call the callback function provided in the cb struct with the parameter - * in the cb struct. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_callback_invoke(struct dmaengine_desc_callback *cb, - const struct dmaengine_result *result) -{ - struct dmaengine_result dummy_result = { - .result = DMA_TRANS_NOERROR, - .residue = 0 - }; - - if (cb->callback_result) { - if (!result) - result = &dummy_result; - cb->callback_result(cb->callback_param, result); - } else if (cb->callback) { - cb->callback(cb->callback_param); - } -} - -/** - * dmaengine_desc_get_callback_invoke - get the callback in tx descriptor and - * then immediately call the callback. - * @tx: dma async tx descriptor - * @result: transaction result - * - * Call dmaengine_desc_get_callback() and dmaengine_desc_callback_invoke() - * in a single function since no work is necessary in between for the driver. - * Locking is dependent on the driver. - */ -static inline void -dmaengine_desc_get_callback_invoke(struct dma_async_tx_descriptor *tx, - const struct dmaengine_result *result) -{ - struct dmaengine_desc_callback cb; - - dmaengine_desc_get_callback(tx, &cb); - dmaengine_desc_callback_invoke(&cb, result); -} - -/** - * dmaengine_desc_callback_valid - verify the callback is valid in cb - * @cb: callback info struct - * - * Return a bool that verifies whether callback in cb is valid or not. - * No locking is required. - */ -static inline bool -dmaengine_desc_callback_valid(struct dmaengine_desc_callback *cb) -{ - return (cb->callback) ? true : false; -} - -struct dma_chan *dma_get_slave_channel(struct dma_chan *chan); -struct dma_chan *dma_get_any_slave_channel(struct dma_device *device); - -#endif diff --git a/snd-alpx/include/5.6/virt-dma.h b/snd-alpx/include/5.6/virt-dma.h deleted file mode 100644 index e9f5250..0000000 --- a/snd-alpx/include/5.6/virt-dma.h +++ /dev/null @@ -1,227 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Virtual DMA channel support for DMAengine - * - * Copyright (C) 2012 Russell King - */ -#ifndef VIRT_DMA_H -#define VIRT_DMA_H - -#include <linux/dmaengine.h> -#include <linux/interrupt.h> - -#include "dmaengine.h" - -struct virt_dma_desc { - struct dma_async_tx_descriptor tx; - struct dmaengine_result tx_result; - /* protected by vc.lock */ - struct list_head node; -}; - -struct virt_dma_chan { - struct dma_chan chan; - struct tasklet_struct task; - void (*desc_free)(struct virt_dma_desc *); - - spinlock_t lock; - - /* protected by vc.lock */ - struct list_head desc_allocated; - struct list_head desc_submitted; - struct list_head desc_issued; - struct list_head desc_completed; - struct list_head desc_terminated; - - struct virt_dma_desc *cyclic; -}; - -static inline struct virt_dma_chan *to_virt_chan(struct dma_chan *chan) -{ - return container_of(chan, struct virt_dma_chan, chan); -} - -void vchan_dma_desc_free_list(struct virt_dma_chan *vc, struct list_head *head); -void vchan_init(struct virt_dma_chan *vc, struct dma_device *dmadev); -struct virt_dma_desc *vchan_find_desc(struct virt_dma_chan *, dma_cookie_t); -extern dma_cookie_t vchan_tx_submit(struct dma_async_tx_descriptor *); -extern int vchan_tx_desc_free(struct dma_async_tx_descriptor *); - -/** - * vchan_tx_prep - prepare a descriptor - * @vc: virtual channel allocating this descriptor - * @vd: virtual descriptor to prepare - * @tx_flags: flags argument passed in to prepare function - */ -static inline struct dma_async_tx_descriptor *vchan_tx_prep(struct virt_dma_chan *vc, - struct virt_dma_desc *vd, unsigned long tx_flags) -{ - unsigned long flags; - - dma_async_tx_descriptor_init(&vd->tx, &vc->chan); - vd->tx.flags = tx_flags; - vd->tx.tx_submit = vchan_tx_submit; - vd->tx.desc_free = vchan_tx_desc_free; - - vd->tx_result.result = DMA_TRANS_NOERROR; - vd->tx_result.residue = 0; - - spin_lock_irqsave(&vc->lock, flags); - list_add_tail(&vd->node, &vc->desc_allocated); - spin_unlock_irqrestore(&vc->lock, flags); - - return &vd->tx; -} - -/** - * vchan_issue_pending - move submitted descriptors to issued list - * @vc: virtual channel to update - * - * vc.lock must be held by caller - */ -static inline bool vchan_issue_pending(struct virt_dma_chan *vc) -{ - list_splice_tail_init(&vc->desc_submitted, &vc->desc_issued); - return !list_empty(&vc->desc_issued); -} - -/** - * vchan_cookie_complete - report completion of a descriptor - * @vd: virtual descriptor to update - * - * vc.lock must be held by caller - */ -static inline void vchan_cookie_complete(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - dma_cookie_t cookie; - - cookie = vd->tx.cookie; - dma_cookie_complete(&vd->tx); - dev_vdbg(vc->chan.device->dev, "txd %p[%x]: marked complete\n", - vd, cookie); - list_add_tail(&vd->node, &vc->desc_completed); - - tasklet_schedule(&vc->task); -} - -/** - * vchan_vdesc_fini - Free or reuse a descriptor - * @vd: virtual descriptor to free/reuse - */ -static inline void vchan_vdesc_fini(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - if (dmaengine_desc_test_reuse(&vd->tx)) { - unsigned long flags; - - spin_lock_irqsave(&vc->lock, flags); - list_add(&vd->node, &vc->desc_allocated); - spin_unlock_irqrestore(&vc->lock, flags); - } else { - vc->desc_free(vd); - } -} - -/** - * vchan_cyclic_callback - report the completion of a period - * @vd: virtual descriptor - */ -static inline void vchan_cyclic_callback(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - vc->cyclic = vd; - tasklet_schedule(&vc->task); -} - -/** - * vchan_terminate_vdesc - Disable pending cyclic callback - * @vd: virtual descriptor to be terminated - * - * vc.lock must be held by caller - */ -static inline void vchan_terminate_vdesc(struct virt_dma_desc *vd) -{ - struct virt_dma_chan *vc = to_virt_chan(vd->tx.chan); - - list_add_tail(&vd->node, &vc->desc_terminated); - - if (vc->cyclic == vd) - vc->cyclic = NULL; -} - -/** - * vchan_next_desc - peek at the next descriptor to be processed - * @vc: virtual channel to obtain descriptor from - * - * vc.lock must be held by caller - */ -static inline struct virt_dma_desc *vchan_next_desc(struct virt_dma_chan *vc) -{ - return list_first_entry_or_null(&vc->desc_issued, - struct virt_dma_desc, node); -} - -/** - * vchan_get_all_descriptors - obtain all submitted and issued descriptors - * @vc: virtual channel to get descriptors from - * @head: list of descriptors found - * - * vc.lock must be held by caller - * - * Removes all submitted and issued descriptors from internal lists, and - * provides a list of all descriptors found - */ -static inline void vchan_get_all_descriptors(struct virt_dma_chan *vc, - struct list_head *head) -{ - list_splice_tail_init(&vc->desc_allocated, head); - list_splice_tail_init(&vc->desc_submitted, head); - list_splice_tail_init(&vc->desc_issued, head); - list_splice_tail_init(&vc->desc_completed, head); - list_splice_tail_init(&vc->desc_terminated, head); -} - -static inline void vchan_free_chan_resources(struct virt_dma_chan *vc) -{ - struct virt_dma_desc *vd; - unsigned long flags; - LIST_HEAD(head); - - spin_lock_irqsave(&vc->lock, flags); - vchan_get_all_descriptors(vc, &head); - list_for_each_entry(vd, &head, node) - dmaengine_desc_clear_reuse(&vd->tx); - spin_unlock_irqrestore(&vc->lock, flags); - - vchan_dma_desc_free_list(vc, &head); -} - -/** - * vchan_synchronize() - synchronize callback execution to the current context - * @vc: virtual channel to synchronize - * - * Makes sure that all scheduled or active callbacks have finished running. For - * proper operation the caller has to ensure that no new callbacks are scheduled - * after the invocation of this function started. - * Free up the terminated cyclic descriptor to prevent memory leakage. - */ -static inline void vchan_synchronize(struct virt_dma_chan *vc) -{ - LIST_HEAD(head); - unsigned long flags; - - tasklet_kill(&vc->task); - - spin_lock_irqsave(&vc->lock, flags); - - list_splice_tail_init(&vc->desc_terminated, &head); - - spin_unlock_irqrestore(&vc->lock, flags); - - vchan_dma_desc_free_list(vc, &head); -} - -#endif diff --git a/snd-alpx/include/6.2/amd_xdma.h b/snd-alpx/include/6.2/amd_xdma.h deleted file mode 100644 index ceba69e..0000000 --- a/snd-alpx/include/6.2/amd_xdma.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2022, Advanced Micro Devices, Inc. - */ - -#ifndef _DMAENGINE_AMD_XDMA_H -#define _DMAENGINE_AMD_XDMA_H - -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -int xdma_enable_user_irq(struct platform_device *pdev, u32 irq_num); -void xdma_disable_user_irq(struct platform_device *pdev, u32 irq_num); -int xdma_get_user_irq(struct platform_device *pdev, u32 user_irq_index); - -#endif /* _DMAENGINE_AMD_XDMA_H */ diff --git a/snd-alpx/include/6.2/dmaengine.h b/snd-alpx/include/6.2/dmaengine.h deleted file mode 100644 index c3656e5..0000000 --- a/snd-alpx/include/6.2/dmaengine.h +++ /dev/null @@ -1,1637 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. - */ -#ifndef LINUX_DMAENGINE_H -#define LINUX_DMAENGINE_H - -#include <linux/device.h> -#include <linux/err.h> -#include <linux/uio.h> -#include <linux/bug.h> -#include <linux/scatterlist.h> -#include <linux/bitmap.h> -#include <linux/types.h> -#include <asm/page.h> - -/** - * typedef dma_cookie_t - an opaque DMA cookie - * - * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code - */ -typedef s32 dma_cookie_t; -#define DMA_MIN_COOKIE 1 - -static inline int dma_submit_error(dma_cookie_t cookie) -{ - return cookie < 0 ? cookie : 0; -} - -/** - * enum dma_status - DMA transaction status - * @DMA_COMPLETE: transaction completed - * @DMA_IN_PROGRESS: transaction not yet processed - * @DMA_PAUSED: transaction is paused - * @DMA_ERROR: transaction failed - */ -enum dma_status { - DMA_COMPLETE, - DMA_IN_PROGRESS, - DMA_PAUSED, - DMA_ERROR, - DMA_OUT_OF_ORDER, -}; - -/** - * enum dma_transaction_type - DMA transaction types/indexes - * - * Note: The DMA_ASYNC_TX capability is not to be set by drivers. It is - * automatically set as dma devices are registered. - */ -enum dma_transaction_type { - DMA_MEMCPY, - DMA_XOR, - DMA_PQ, - DMA_XOR_VAL, - DMA_PQ_VAL, - DMA_MEMSET, - DMA_MEMSET_SG, - DMA_INTERRUPT, - DMA_PRIVATE, - DMA_ASYNC_TX, - DMA_SLAVE, - DMA_CYCLIC, - DMA_INTERLEAVE, - DMA_COMPLETION_NO_ORDER, - DMA_REPEAT, - DMA_LOAD_EOT, -/* last transaction type for creation of the capabilities mask */ - DMA_TX_TYPE_END, -}; - -/** - * enum dma_transfer_direction - dma transfer mode and direction indicator - * @DMA_MEM_TO_MEM: Async/Memcpy mode - * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device - * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory - * @DMA_DEV_TO_DEV: Slave mode & From Device to Device - */ -enum dma_transfer_direction { - DMA_MEM_TO_MEM, - DMA_MEM_TO_DEV, - DMA_DEV_TO_MEM, - DMA_DEV_TO_DEV, - DMA_TRANS_NONE, -}; - -/** - * Interleaved Transfer Request - * ---------------------------- - * A chunk is collection of contiguous bytes to be transferred. - * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). - * ICGs may or may not change between chunks. - * A FRAME is the smallest series of contiguous {chunk,icg} pairs, - * that when repeated an integral number of times, specifies the transfer. - * A transfer template is specification of a Frame, the number of times - * it is to be repeated and other per-transfer attributes. - * - * Practically, a client driver would have ready a template for each - * type of transfer it is going to need during its lifetime and - * set only 'src_start' and 'dst_start' before submitting the requests. - * - * - * | Frame-1 | Frame-2 | ~ | Frame-'numf' | - * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| - * - * == Chunk size - * ... ICG - */ - -/** - * struct data_chunk - Element of scatter-gather list that makes a frame. - * @size: Number of bytes to read from source. - * size_dst := fn(op, size_src), so doesn't mean much for destination. - * @icg: Number of bytes to jump after last src/dst address of this - * chunk and before first src/dst address for next chunk. - * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. - * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. - * @dst_icg: Number of bytes to jump after last dst address of this - * chunk and before the first dst address for next chunk. - * Ignored if dst_inc is true and dst_sgl is false. - * @src_icg: Number of bytes to jump after last src address of this - * chunk and before the first src address for next chunk. - * Ignored if src_inc is true and src_sgl is false. - */ -struct data_chunk { - size_t size; - size_t icg; - size_t dst_icg; - size_t src_icg; -}; - -/** - * struct dma_interleaved_template - Template to convey DMAC the transfer pattern - * and attributes. - * @src_start: Bus address of source for the first chunk. - * @dst_start: Bus address of destination for the first chunk. - * @dir: Specifies the type of Source and Destination. - * @src_inc: If the source address increments after reading from it. - * @dst_inc: If the destination address increments after writing to it. - * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). - * Otherwise, source is read contiguously (icg ignored). - * Ignored if src_inc is false. - * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). - * Otherwise, destination is filled contiguously (icg ignored). - * Ignored if dst_inc is false. - * @numf: Number of frames in this template. - * @frame_size: Number of chunks in a frame i.e, size of sgl[]. - * @sgl: Array of {chunk,icg} pairs that make up a frame. - */ -struct dma_interleaved_template { - dma_addr_t src_start; - dma_addr_t dst_start; - enum dma_transfer_direction dir; - bool src_inc; - bool dst_inc; - bool src_sgl; - bool dst_sgl; - size_t numf; - size_t frame_size; - struct data_chunk sgl[]; -}; - -/** - * enum dma_ctrl_flags - DMA flags to augment operation preparation, - * control completion, and communicate status. - * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of - * this transaction - * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client - * acknowledges receipt, i.e. has a chance to establish any dependency - * chains - * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q - * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P - * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as - * sources that were the result of a previous operation, in the case of a PQ - * operation it continues the calculation with new sources - * @DMA_PREP_FENCE - tell the driver that subsequent operations depend - * on the result of this operation - * @DMA_CTRL_REUSE: client can reuse the descriptor and submit again till - * cleared or freed - * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is command - * data and the descriptor should be in different format from normal - * data descriptors. - * @DMA_PREP_REPEAT: tell the driver that the transaction shall be automatically - * repeated when it ends until a transaction is issued on the same channel - * with the DMA_PREP_LOAD_EOT flag set. This flag is only applicable to - * interleaved transactions and is ignored for all other transaction types. - * @DMA_PREP_LOAD_EOT: tell the driver that the transaction shall replace any - * active repeated (as indicated by DMA_PREP_REPEAT) transaction when the - * repeated transaction ends. Not setting this flag when the previously queued - * transaction is marked with DMA_PREP_REPEAT will cause the new transaction - * to never be processed and stay in the issued queue forever. The flag is - * ignored if the previous transaction is not a repeated transaction. - */ -enum dma_ctrl_flags { - DMA_PREP_INTERRUPT = (1 << 0), - DMA_CTRL_ACK = (1 << 1), - DMA_PREP_PQ_DISABLE_P = (1 << 2), - DMA_PREP_PQ_DISABLE_Q = (1 << 3), - DMA_PREP_CONTINUE = (1 << 4), - DMA_PREP_FENCE = (1 << 5), - DMA_CTRL_REUSE = (1 << 6), - DMA_PREP_CMD = (1 << 7), - DMA_PREP_REPEAT = (1 << 8), - DMA_PREP_LOAD_EOT = (1 << 9), -}; - -/** - * enum sum_check_bits - bit position of pq_check_flags - */ -enum sum_check_bits { - SUM_CHECK_P = 0, - SUM_CHECK_Q = 1, -}; - -/** - * enum pq_check_flags - result of async_{xor,pq}_zero_sum operations - * @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise - * @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise - */ -enum sum_check_flags { - SUM_CHECK_P_RESULT = (1 << SUM_CHECK_P), - SUM_CHECK_Q_RESULT = (1 << SUM_CHECK_Q), -}; - - -/** - * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. - * See linux/cpumask.h - */ -typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; - -/** - * enum dma_desc_metadata_mode - per descriptor metadata mode types supported - * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the - * client driver and it is attached (via the dmaengine_desc_attach_metadata() - * helper) to the descriptor. - * - * Client drivers interested to use this mode can follow: - * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * construct the metadata in the client's buffer - * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the - * descriptor - * 3. submit the transfer - * - DMA_DEV_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the - * descriptor - * 3. submit the transfer - * 4. when the transfer is completed, the metadata should be available in the - * attached buffer - * - * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA - * driver. The client driver can ask for the pointer, maximum size and the - * currently used size of the metadata and can directly update or read it. - * dmaengine_desc_get_metadata_ptr() and dmaengine_desc_set_metadata_len() is - * provided as helper functions. - * - * Note: the metadata area for the descriptor is no longer valid after the - * transfer has been completed (valid up to the point when the completion - * callback returns if used). - * - * Client drivers interested to use this mode can follow: - * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the engine's - * metadata area - * 3. update the metadata at the pointer - * 4. use dmaengine_desc_set_metadata_len() to tell the DMA engine the amount - * of data the client has placed into the metadata buffer - * 5. submit the transfer - * - DMA_DEV_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. submit the transfer - * 3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get the - * pointer to the engine's metadata area - * 4. Read out the metadata from the pointer - * - * Note: the two mode is not compatible and clients must use one mode for a - * descriptor. - */ -enum dma_desc_metadata_mode { - DESC_METADATA_NONE = 0, - DESC_METADATA_CLIENT = BIT(0), - DESC_METADATA_ENGINE = BIT(1), -}; - -/** - * struct dma_chan_percpu - the per-CPU part of struct dma_chan - * @memcpy_count: transaction counter - * @bytes_transferred: byte counter - */ -struct dma_chan_percpu { - /* stats */ - unsigned long memcpy_count; - unsigned long bytes_transferred; -}; - -/** - * struct dma_router - DMA router structure - * @dev: pointer to the DMA router device - * @route_free: function to be called when the route can be disconnected - */ -struct dma_router { - struct device *dev; - void (*route_free)(struct device *dev, void *route_data); -}; - -/** - * struct dma_chan - devices supply DMA channels, clients use them - * @device: ptr to the dma device who supplies this channel, always !%NULL - * @slave: ptr to the device using this channel - * @cookie: last cookie value returned to client - * @completed_cookie: last completed cookie for this channel - * @chan_id: channel ID for sysfs - * @dev: class device for sysfs - * @name: backlink name for sysfs - * @dbg_client_name: slave name for debugfs in format: - * dev_name(requester's dev):channel name, for example: "2b00000.mcasp:tx" - * @device_node: used to add this to the device chan list - * @local: per-cpu pointer to a struct dma_chan_percpu - * @client_count: how many clients are using this channel - * @table_count: number of appearances in the mem-to-mem allocation table - * @router: pointer to the DMA router structure - * @route_data: channel specific data for the router - * @private: private data for certain client-channel associations - */ -struct dma_chan { - struct dma_device *device; - struct device *slave; - dma_cookie_t cookie; - dma_cookie_t completed_cookie; - - /* sysfs */ - int chan_id; - struct dma_chan_dev *dev; - const char *name; -#ifdef CONFIG_DEBUG_FS - char *dbg_client_name; -#endif - - struct list_head device_node; - struct dma_chan_percpu __percpu *local; - int client_count; - int table_count; - - /* DMA router */ - struct dma_router *router; - void *route_data; - - void *private; -}; - -/** - * struct dma_chan_dev - relate sysfs device node to backing channel device - * @chan: driver channel device - * @device: sysfs device - * @dev_id: parent dma_device dev_id - * @chan_dma_dev: The channel is using custom/different dma-mapping - * compared to the parent dma_device - */ -struct dma_chan_dev { - struct dma_chan *chan; - struct device device; - int dev_id; - bool chan_dma_dev; -}; - -/** - * enum dma_slave_buswidth - defines bus width of the DMA slave - * device, source or target buses - */ -enum dma_slave_buswidth { - DMA_SLAVE_BUSWIDTH_UNDEFINED = 0, - DMA_SLAVE_BUSWIDTH_1_BYTE = 1, - DMA_SLAVE_BUSWIDTH_2_BYTES = 2, - DMA_SLAVE_BUSWIDTH_3_BYTES = 3, - DMA_SLAVE_BUSWIDTH_4_BYTES = 4, - DMA_SLAVE_BUSWIDTH_8_BYTES = 8, - DMA_SLAVE_BUSWIDTH_16_BYTES = 16, - DMA_SLAVE_BUSWIDTH_32_BYTES = 32, - DMA_SLAVE_BUSWIDTH_64_BYTES = 64, - DMA_SLAVE_BUSWIDTH_128_BYTES = 128, -}; - -/** - * struct dma_slave_config - dma slave channel runtime config - * @direction: whether the data shall go in or out on this slave - * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are - * legal values. DEPRECATED, drivers should use the direction argument - * to the device_prep_slave_sg and device_prep_dma_cyclic functions or - * the dir field in the dma_interleaved_template structure. - * @src_addr: this is the physical address where DMA slave data - * should be read (RX), if the source is memory this argument is - * ignored. - * @dst_addr: this is the physical address where DMA slave data - * should be written (TX), if the destination is memory this argument - * is ignored. - * @src_addr_width: this is the width in bytes of the source (RX) - * register where DMA data shall be read. If the source - * is memory this may be ignored depending on architecture. - * Legal values: 1, 2, 3, 4, 8, 16, 32, 64, 128. - * @dst_addr_width: same as src_addr_width but for destination - * target (TX) mutatis mutandis. - * @src_maxburst: the maximum number of words (note: words, as in - * units of the src_addr_width member, not bytes) that can be sent - * in one burst to the device. Typically something like half the - * FIFO depth on I/O peripherals so you don't overflow it. This - * may or may not be applicable on memory sources. - * @dst_maxburst: same as src_maxburst but for destination target - * mutatis mutandis. - * @src_port_window_size: The length of the register area in words the data need - * to be accessed on the device side. It is only used for devices which is using - * an area instead of a single register to receive the data. Typically the DMA - * loops in this area in order to transfer the data. - * @dst_port_window_size: same as src_port_window_size but for the destination - * port. - * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill - * with 'true' if peripheral should be flow controller. Direction will be - * selected at Runtime. - * @peripheral_config: peripheral configuration for programming peripheral - * for dmaengine transfer - * @peripheral_size: peripheral configuration buffer size - * - * This struct is passed in as configuration data to a DMA engine - * in order to set up a certain channel for DMA transport at runtime. - * The DMA device/engine has to provide support for an additional - * callback in the dma_device structure, device_config and this struct - * will then be passed in as an argument to the function. - * - * The rationale for adding configuration information to this struct is as - * follows: if it is likely that more than one DMA slave controllers in - * the world will support the configuration option, then make it generic. - * If not: if it is fixed so that it be sent in static from the platform - * data, then prefer to do that. - */ -struct dma_slave_config { - enum dma_transfer_direction direction; - phys_addr_t src_addr; - phys_addr_t dst_addr; - enum dma_slave_buswidth src_addr_width; - enum dma_slave_buswidth dst_addr_width; - u32 src_maxburst; - u32 dst_maxburst; - u32 src_port_window_size; - u32 dst_port_window_size; - bool device_fc; - void *peripheral_config; - size_t peripheral_size; -}; - -/** - * enum dma_residue_granularity - Granularity of the reported transfer residue - * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The - * DMA channel is only able to tell whether a descriptor has been completed or - * not, which means residue reporting is not supported by this channel. The - * residue field of the dma_tx_state field will always be 0. - * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully - * completed segment of the transfer (For cyclic transfers this is after each - * period). This is typically implemented by having the hardware generate an - * interrupt after each transferred segment and then the drivers updates the - * outstanding residue by the size of the segment. Another possibility is if - * the hardware supports scatter-gather and the segment descriptor has a field - * which gets set after the segment has been completed. The driver then counts - * the number of segments without the flag set to compute the residue. - * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred - * burst. This is typically only supported if the hardware has a progress - * register of some sort (E.g. a register with the current read/write address - * or a register with the amount of bursts/beats/bytes that have been - * transferred or still need to be transferred). - */ -enum dma_residue_granularity { - DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0, - DMA_RESIDUE_GRANULARITY_SEGMENT = 1, - DMA_RESIDUE_GRANULARITY_BURST = 2, -}; - -/** - * struct dma_slave_caps - expose capabilities of a slave channel only - * @src_addr_widths: bit mask of src addr widths the channel supports. - * Width is specified in bytes, e.g. for a channel supporting - * a width of 4 the mask should have BIT(4) set. - * @dst_addr_widths: bit mask of dst addr widths the channel supports - * @directions: bit mask of slave directions the channel supports. - * Since the enum dma_transfer_direction is not defined as bit flag for - * each type, the dma controller should set BIT(<TYPE>) and same - * should be checked by controller as well - * @min_burst: min burst capability per-transfer - * @max_burst: max burst capability per-transfer - * @max_sg_burst: max number of SG list entries executed in a single burst - * DMA tansaction with no software intervention for reinitialization. - * Zero value means unlimited number of entries. - * @cmd_pause: true, if pause is supported (i.e. for reading residue or - * for resume later) - * @cmd_resume: true, if resume is supported - * @cmd_terminate: true, if terminate cmd is supported - * @residue_granularity: granularity of the reported transfer residue - * @descriptor_reuse: if a descriptor can be reused by client and - * resubmitted multiple times - */ -struct dma_slave_caps { - u32 src_addr_widths; - u32 dst_addr_widths; - u32 directions; - u32 min_burst; - u32 max_burst; - u32 max_sg_burst; - bool cmd_pause; - bool cmd_resume; - bool cmd_terminate; - enum dma_residue_granularity residue_granularity; - bool descriptor_reuse; -}; - -static inline const char *dma_chan_name(struct dma_chan *chan) -{ - return dev_name(&chan->dev->device); -} - -void dma_chan_cleanup(struct kref *kref); - -/** - * typedef dma_filter_fn - callback filter for dma_request_channel - * @chan: channel to be reviewed - * @filter_param: opaque parameter passed through dma_request_channel - * - * When this optional parameter is specified in a call to dma_request_channel a - * suitable channel is passed to this routine for further dispositioning before - * being returned. Where 'suitable' indicates a non-busy channel that - * satisfies the given capability mask. It returns 'true' to indicate that the - * channel is suitable. - */ -typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); - -typedef void (*dma_async_tx_callback)(void *dma_async_param); - -enum dmaengine_tx_result { - DMA_TRANS_NOERROR = 0, /* SUCCESS */ - DMA_TRANS_READ_FAILED, /* Source DMA read failed */ - DMA_TRANS_WRITE_FAILED, /* Destination DMA write failed */ - DMA_TRANS_ABORTED, /* Op never submitted / aborted */ -}; - -struct dmaengine_result { - enum dmaengine_tx_result result; - u32 residue; -}; - -typedef void (*dma_async_tx_callback_result)(void *dma_async_param, - const struct dmaengine_result *result); - -struct dmaengine_unmap_data { -#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) - u16 map_cnt; -#else - u8 map_cnt; -#endif - u8 to_cnt; - u8 from_cnt; - u8 bidi_cnt; - struct device *dev; - struct kref kref; - size_t len; - dma_addr_t addr[]; -}; - -struct dma_async_tx_descriptor; - -struct dma_descriptor_metadata_ops { - int (*attach)(struct dma_async_tx_descriptor *desc, void *data, - size_t len); - - void *(*get_ptr)(struct dma_async_tx_descriptor *desc, - size_t *payload_len, size_t *max_len); - int (*set_len)(struct dma_async_tx_descriptor *desc, - size_t payload_len); -}; - -/** - * struct dma_async_tx_descriptor - async transaction descriptor - * ---dma generic offload fields--- - * @cookie: tracking cookie for this transaction, set to -EBUSY if - * this tx is sitting on a dependency list - * @flags: flags to augment operation preparation, control completion, and - * communicate status - * @phys: physical address of the descriptor - * @chan: target channel for this operation - * @tx_submit: accept the descriptor, assign ordered cookie and mark the - * descriptor pending. To be pushed on .issue_pending() call - * @callback: routine to call after this operation is complete - * @callback_param: general parameter to pass to the callback routine - * @desc_metadata_mode: core managed metadata mode to protect mixed use of - * DESC_METADATA_CLIENT or DESC_METADATA_ENGINE. Otherwise - * DESC_METADATA_NONE - * @metadata_ops: DMA driver provided metadata mode ops, need to be set by the - * DMA driver if metadata mode is supported with the descriptor - * ---async_tx api specific fields--- - * @next: at completion submit this descriptor - * @parent: pointer to the next level up in the dependency chain - * @lock: protect the parent and next pointers - */ -struct dma_async_tx_descriptor { - dma_cookie_t cookie; - enum dma_ctrl_flags flags; /* not a 'long' to pack with cookie */ - dma_addr_t phys; - struct dma_chan *chan; - dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); - int (*desc_free)(struct dma_async_tx_descriptor *tx); - dma_async_tx_callback callback; - dma_async_tx_callback_result callback_result; - void *callback_param; - struct dmaengine_unmap_data *unmap; - enum dma_desc_metadata_mode desc_metadata_mode; - struct dma_descriptor_metadata_ops *metadata_ops; -#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH - struct dma_async_tx_descriptor *next; - struct dma_async_tx_descriptor *parent; - spinlock_t lock; -#endif -}; - -#ifdef CONFIG_DMA_ENGINE -static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, - struct dmaengine_unmap_data *unmap) -{ - kref_get(&unmap->kref); - tx->unmap = unmap; -} - -struct dmaengine_unmap_data * -dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags); -void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap); -#else -static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, - struct dmaengine_unmap_data *unmap) -{ -} -static inline struct dmaengine_unmap_data * -dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) -{ - return NULL; -} -static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) -{ -} -#endif - -static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx) -{ - if (!tx->unmap) - return; - - dmaengine_unmap_put(tx->unmap); - tx->unmap = NULL; -} - -#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH -static inline void txd_lock(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_unlock(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) -{ - BUG(); -} -static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) -{ -} -static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) -{ - return NULL; -} -static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) -{ - return NULL; -} - -#else -static inline void txd_lock(struct dma_async_tx_descriptor *txd) -{ - spin_lock_bh(&txd->lock); -} -static inline void txd_unlock(struct dma_async_tx_descriptor *txd) -{ - spin_unlock_bh(&txd->lock); -} -static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) -{ - txd->next = next; - next->parent = txd; -} -static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) -{ - txd->parent = NULL; -} -static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) -{ - txd->next = NULL; -} -static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) -{ - return txd->parent; -} -static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) -{ - return txd->next; -} -#endif - -/** - * struct dma_tx_state - filled in to report the status of - * a transfer. - * @last: last completed DMA cookie - * @used: last issued DMA cookie (i.e. the one in progress) - * @residue: the remaining number of bytes left to transmit - * on the selected transfer for states DMA_IN_PROGRESS and - * DMA_PAUSED if this is implemented in the driver, else 0 - * @in_flight_bytes: amount of data in bytes cached by the DMA. - */ -struct dma_tx_state { - dma_cookie_t last; - dma_cookie_t used; - u32 residue; - u32 in_flight_bytes; -}; - -/** - * enum dmaengine_alignment - defines alignment of the DMA async tx - * buffers - */ -enum dmaengine_alignment { - DMAENGINE_ALIGN_1_BYTE = 0, - DMAENGINE_ALIGN_2_BYTES = 1, - DMAENGINE_ALIGN_4_BYTES = 2, - DMAENGINE_ALIGN_8_BYTES = 3, - DMAENGINE_ALIGN_16_BYTES = 4, - DMAENGINE_ALIGN_32_BYTES = 5, - DMAENGINE_ALIGN_64_BYTES = 6, - DMAENGINE_ALIGN_128_BYTES = 7, - DMAENGINE_ALIGN_256_BYTES = 8, -}; - -/** - * struct dma_slave_map - associates slave device and it's slave channel with - * parameter to be used by a filter function - * @devname: name of the device - * @slave: slave channel name - * @param: opaque parameter to pass to struct dma_filter.fn - */ -struct dma_slave_map { - const char *devname; - const char *slave; - void *param; -}; - -/** - * struct dma_filter - information for slave device/channel to filter_fn/param - * mapping - * @fn: filter function callback - * @mapcnt: number of slave device/channel in the map - * @map: array of channel to filter mapping data - */ -struct dma_filter { - dma_filter_fn fn; - int mapcnt; - const struct dma_slave_map *map; -}; - -/** - * struct dma_device - info on the entity supplying DMA services - * @ref: reference is taken and put every time a channel is allocated or freed - * @chancnt: how many DMA channels are supported - * @privatecnt: how many DMA channels are requested by dma_request_channel - * @channels: the list of struct dma_chan - * @global_node: list_head for global dma_device_list - * @filter: information for device/slave to filter function/param mapping - * @cap_mask: one or more dma_capability flags - * @desc_metadata_modes: supported metadata modes by the DMA device - * @max_xor: maximum number of xor sources, 0 if no capability - * @max_pq: maximum number of PQ sources and PQ-continue capability - * @copy_align: alignment shift for memcpy operations - * @xor_align: alignment shift for xor operations - * @pq_align: alignment shift for pq operations - * @fill_align: alignment shift for memset operations - * @dev_id: unique device ID - * @dev: struct device reference for dma mapping api - * @owner: owner module (automatically set based on the provided dev) - * @chan_ida: unique channel ID - * @src_addr_widths: bit mask of src addr widths the device supports - * Width is specified in bytes, e.g. for a device supporting - * a width of 4 the mask should have BIT(4) set. - * @dst_addr_widths: bit mask of dst addr widths the device supports - * @directions: bit mask of slave directions the device supports. - * Since the enum dma_transfer_direction is not defined as bit flag for - * each type, the dma controller should set BIT(<TYPE>) and same - * should be checked by controller as well - * @min_burst: min burst capability per-transfer - * @max_burst: max burst capability per-transfer - * @max_sg_burst: max number of SG list entries executed in a single burst - * DMA tansaction with no software intervention for reinitialization. - * Zero value means unlimited number of entries. - * @descriptor_reuse: a submitted transfer can be resubmitted after completion - * @residue_granularity: granularity of the transfer residue reported - * by tx_status - * @device_alloc_chan_resources: allocate resources and return the - * number of allocated descriptors - * @device_router_config: optional callback for DMA router configuration - * @device_free_chan_resources: release DMA channel's resources - * @device_prep_dma_memcpy: prepares a memcpy operation - * @device_prep_dma_xor: prepares a xor operation - * @device_prep_dma_xor_val: prepares a xor validation operation - * @device_prep_dma_pq: prepares a pq operation - * @device_prep_dma_pq_val: prepares a pqzero_sum operation - * @device_prep_dma_memset: prepares a memset operation - * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list - * @device_prep_dma_interrupt: prepares an end of chain interrupt operation - * @device_prep_slave_sg: prepares a slave dma operation - * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. - * The function takes a buffer of size buf_len. The callback function will - * be called after period_len bytes have been transferred. - * @device_prep_interleaved_dma: Transfer expression in a generic way. - * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address - * @device_caps: May be used to override the generic DMA slave capabilities - * with per-channel specific ones - * @device_config: Pushes a new configuration to a channel, return 0 or an error - * code - * @device_pause: Pauses any transfer happening on a channel. Returns - * 0 or an error code - * @device_resume: Resumes any transfer on a channel previously - * paused. Returns 0 or an error code - * @device_terminate_all: Aborts all transfers on a channel. Returns 0 - * or an error code - * @device_synchronize: Synchronizes the termination of a transfers to the - * current context. - * @device_tx_status: poll for transaction completion, the optional - * txstate parameter can be supplied with a pointer to get a - * struct with auxiliary transfer status information, otherwise the call - * will just return a simple status code - * @device_issue_pending: push pending transactions to hardware - * @device_release: called sometime atfer dma_async_device_unregister() is - * called and there are no further references to this structure. This - * must be implemented to free resources however many existing drivers - * do not and are therefore not safe to unbind while in use. - * @dbg_summary_show: optional routine to show contents in debugfs; default code - * will be used when this is omitted, but custom code can show extra, - * controller specific information. - * @dbg_dev_root: the root folder in debugfs for this device - */ -struct dma_device { - struct kref ref; - unsigned int chancnt; - unsigned int privatecnt; - struct list_head channels; - struct list_head global_node; - struct dma_filter filter; - dma_cap_mask_t cap_mask; - enum dma_desc_metadata_mode desc_metadata_modes; - unsigned short max_xor; - unsigned short max_pq; - enum dmaengine_alignment copy_align; - enum dmaengine_alignment xor_align; - enum dmaengine_alignment pq_align; - enum dmaengine_alignment fill_align; - #define DMA_HAS_PQ_CONTINUE (1 << 15) - - int dev_id; - struct device *dev; - struct module *owner; - struct ida chan_ida; - - u32 src_addr_widths; - u32 dst_addr_widths; - u32 directions; - u32 min_burst; - u32 max_burst; - u32 max_sg_burst; - bool descriptor_reuse; - enum dma_residue_granularity residue_granularity; - - int (*device_alloc_chan_resources)(struct dma_chan *chan); - int (*device_router_config)(struct dma_chan *chan); - void (*device_free_chan_resources)(struct dma_chan *chan); - - struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( - struct dma_chan *chan, dma_addr_t dst, dma_addr_t src, - size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_xor)( - struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, - unsigned int src_cnt, size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)( - struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, - size_t len, enum sum_check_flags *result, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_pq)( - struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src, - unsigned int src_cnt, const unsigned char *scf, - size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_pq_val)( - struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, - unsigned int src_cnt, const unsigned char *scf, size_t len, - enum sum_check_flags *pqres, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_memset)( - struct dma_chan *chan, dma_addr_t dest, int value, size_t len, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)( - struct dma_chan *chan, struct scatterlist *sg, - unsigned int nents, int value, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( - struct dma_chan *chan, unsigned long flags); - - struct dma_async_tx_descriptor *(*device_prep_slave_sg)( - struct dma_chan *chan, struct scatterlist *sgl, - unsigned int sg_len, enum dma_transfer_direction direction, - unsigned long flags, void *context); - struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( - struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction direction, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( - struct dma_chan *chan, struct dma_interleaved_template *xt, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)( - struct dma_chan *chan, dma_addr_t dst, u64 data, - unsigned long flags); - - void (*device_caps)(struct dma_chan *chan, struct dma_slave_caps *caps); - int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config); - int (*device_pause)(struct dma_chan *chan); - int (*device_resume)(struct dma_chan *chan); - int (*device_terminate_all)(struct dma_chan *chan); - void (*device_synchronize)(struct dma_chan *chan); - - enum dma_status (*device_tx_status)(struct dma_chan *chan, - dma_cookie_t cookie, - struct dma_tx_state *txstate); - void (*device_issue_pending)(struct dma_chan *chan); - void (*device_release)(struct dma_device *dev); - /* debugfs support */ - void (*dbg_summary_show)(struct seq_file *s, struct dma_device *dev); - struct dentry *dbg_dev_root; -}; - -static inline int dmaengine_slave_config(struct dma_chan *chan, - struct dma_slave_config *config) -{ - if (chan->device->device_config) - return chan->device->device_config(chan, config); - - return -ENOSYS; -} - -static inline bool is_slave_direction(enum dma_transfer_direction direction) -{ - return (direction == DMA_MEM_TO_DEV) || (direction == DMA_DEV_TO_MEM); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single( - struct dma_chan *chan, dma_addr_t buf, size_t len, - enum dma_transfer_direction dir, unsigned long flags) -{ - struct scatterlist sg; - sg_init_table(&sg, 1); - sg_dma_address(&sg) = buf; - sg_dma_len(&sg) = len; - - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, &sg, 1, - dir, flags, NULL); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg( - struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, - enum dma_transfer_direction dir, unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, sgl, sg_len, - dir, flags, NULL); -} - -#ifdef CONFIG_RAPIDIO_DMA_ENGINE -struct rio_dma_ext; -static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg( - struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, - enum dma_transfer_direction dir, unsigned long flags, - struct rio_dma_ext *rio_ext) -{ - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, sgl, sg_len, - dir, flags, rio_ext); -} -#endif - -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic( - struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction dir, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic) - return NULL; - - return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, - period_len, dir, flags); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma( - struct dma_chan *chan, struct dma_interleaved_template *xt, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma) - return NULL; - if (flags & DMA_PREP_REPEAT && - !test_bit(DMA_REPEAT, chan->device->cap_mask.bits)) - return NULL; - - return chan->device->device_prep_interleaved_dma(chan, xt, flags); -} - -/** - * dmaengine_prep_dma_memset() - Prepare a DMA memset descriptor. - * @chan: The channel to be used for this descriptor - * @dest: Address of buffer to be set - * @value: Treated as a single byte value that fills the destination buffer - * @len: The total size of dest - * @flags: DMA engine flags - */ -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset( - struct dma_chan *chan, dma_addr_t dest, int value, size_t len, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_memset) - return NULL; - - return chan->device->device_prep_dma_memset(chan, dest, value, - len, flags); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memcpy( - struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, - size_t len, unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_memcpy) - return NULL; - - return chan->device->device_prep_dma_memcpy(chan, dest, src, - len, flags); -} - -static inline bool dmaengine_is_metadata_mode_supported(struct dma_chan *chan, - enum dma_desc_metadata_mode mode) -{ - if (!chan) - return false; - - return !!(chan->device->desc_metadata_modes & mode); -} - -#ifdef CONFIG_DMA_ENGINE -int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc, - void *data, size_t len); -void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc, - size_t *payload_len, size_t *max_len); -int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc, - size_t payload_len); -#else /* CONFIG_DMA_ENGINE */ -static inline int dmaengine_desc_attach_metadata( - struct dma_async_tx_descriptor *desc, void *data, size_t len) -{ - return -EINVAL; -} -static inline void *dmaengine_desc_get_metadata_ptr( - struct dma_async_tx_descriptor *desc, size_t *payload_len, - size_t *max_len) -{ - return NULL; -} -static inline int dmaengine_desc_set_metadata_len( - struct dma_async_tx_descriptor *desc, size_t payload_len) -{ - return -EINVAL; -} -#endif /* CONFIG_DMA_ENGINE */ - -/** - * dmaengine_terminate_all() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * This function is DEPRECATED use either dmaengine_terminate_sync() or - * dmaengine_terminate_async() instead. - */ -static inline int dmaengine_terminate_all(struct dma_chan *chan) -{ - if (chan->device->device_terminate_all) - return chan->device->device_terminate_all(chan); - - return -ENOSYS; -} - -/** - * dmaengine_terminate_async() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * Calling this function will terminate all active and pending descriptors - * that have previously been submitted to the channel. It is not guaranteed - * though that the transfer for the active descriptor has stopped when the - * function returns. Furthermore it is possible the complete callback of a - * submitted transfer is still running when this function returns. - * - * dmaengine_synchronize() needs to be called before it is safe to free - * any memory that is accessed by previously submitted descriptors or before - * freeing any resources accessed from within the completion callback of any - * previously submitted descriptors. - * - * This function can be called from atomic context as well as from within a - * complete callback of a descriptor submitted on the same channel. - * - * If none of the two conditions above apply consider using - * dmaengine_terminate_sync() instead. - */ -static inline int dmaengine_terminate_async(struct dma_chan *chan) -{ - if (chan->device->device_terminate_all) - return chan->device->device_terminate_all(chan); - - return -EINVAL; -} - -/** - * dmaengine_synchronize() - Synchronize DMA channel termination - * @chan: The channel to synchronize - * - * Synchronizes to the DMA channel termination to the current context. When this - * function returns it is guaranteed that all transfers for previously issued - * descriptors have stopped and it is safe to free the memory associated - * with them. Furthermore it is guaranteed that all complete callback functions - * for a previously submitted descriptor have finished running and it is safe to - * free resources accessed from within the complete callbacks. - * - * The behavior of this function is undefined if dma_async_issue_pending() has - * been called between dmaengine_terminate_async() and this function. - * - * This function must only be called from non-atomic context and must not be - * called from within a complete callback of a descriptor submitted on the same - * channel. - */ -static inline void dmaengine_synchronize(struct dma_chan *chan) -{ - might_sleep(); - - if (chan->device->device_synchronize) - chan->device->device_synchronize(chan); -} - -/** - * dmaengine_terminate_sync() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * Calling this function will terminate all active and pending transfers - * that have previously been submitted to the channel. It is similar to - * dmaengine_terminate_async() but guarantees that the DMA transfer has actually - * stopped and that all complete callbacks have finished running when the - * function returns. - * - * This function must only be called from non-atomic context and must not be - * called from within a complete callback of a descriptor submitted on the same - * channel. - */ -static inline int dmaengine_terminate_sync(struct dma_chan *chan) -{ - int ret; - - ret = dmaengine_terminate_async(chan); - if (ret) - return ret; - - dmaengine_synchronize(chan); - - return 0; -} - -static inline int dmaengine_pause(struct dma_chan *chan) -{ - if (chan->device->device_pause) - return chan->device->device_pause(chan); - - return -ENOSYS; -} - -static inline int dmaengine_resume(struct dma_chan *chan) -{ - if (chan->device->device_resume) - return chan->device->device_resume(chan); - - return -ENOSYS; -} - -static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *state) -{ - return chan->device->device_tx_status(chan, cookie, state); -} - -static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) -{ - return desc->tx_submit(desc); -} - -static inline bool dmaengine_check_align(enum dmaengine_alignment align, - size_t off1, size_t off2, size_t len) -{ - return !(((1 << align) - 1) & (off1 | off2 | len)); -} - -static inline bool is_dma_copy_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->copy_align, off1, off2, len); -} - -static inline bool is_dma_xor_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->xor_align, off1, off2, len); -} - -static inline bool is_dma_pq_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->pq_align, off1, off2, len); -} - -static inline bool is_dma_fill_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->fill_align, off1, off2, len); -} - -static inline void -dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue) -{ - dma->max_pq = maxpq; - if (has_pq_continue) - dma->max_pq |= DMA_HAS_PQ_CONTINUE; -} - -static inline bool dmaf_continue(enum dma_ctrl_flags flags) -{ - return (flags & DMA_PREP_CONTINUE) == DMA_PREP_CONTINUE; -} - -static inline bool dmaf_p_disabled_continue(enum dma_ctrl_flags flags) -{ - enum dma_ctrl_flags mask = DMA_PREP_CONTINUE | DMA_PREP_PQ_DISABLE_P; - - return (flags & mask) == mask; -} - -static inline bool dma_dev_has_pq_continue(struct dma_device *dma) -{ - return (dma->max_pq & DMA_HAS_PQ_CONTINUE) == DMA_HAS_PQ_CONTINUE; -} - -static inline unsigned short dma_dev_to_maxpq(struct dma_device *dma) -{ - return dma->max_pq & ~DMA_HAS_PQ_CONTINUE; -} - -/* dma_maxpq - reduce maxpq in the face of continued operations - * @dma - dma device with PQ capability - * @flags - to check if DMA_PREP_CONTINUE and DMA_PREP_PQ_DISABLE_P are set - * - * When an engine does not support native continuation we need 3 extra - * source slots to reuse P and Q with the following coefficients: - * 1/ {00} * P : remove P from Q', but use it as a source for P' - * 2/ {01} * Q : use Q to continue Q' calculation - * 3/ {00} * Q : subtract Q from P' to cancel (2) - * - * In the case where P is disabled we only need 1 extra source: - * 1/ {01} * Q : use Q to continue Q' calculation - */ -static inline int dma_maxpq(struct dma_device *dma, enum dma_ctrl_flags flags) -{ - if (dma_dev_has_pq_continue(dma) || !dmaf_continue(flags)) - return dma_dev_to_maxpq(dma); - if (dmaf_p_disabled_continue(flags)) - return dma_dev_to_maxpq(dma) - 1; - if (dmaf_continue(flags)) - return dma_dev_to_maxpq(dma) - 3; - BUG(); -} - -static inline size_t dmaengine_get_icg(bool inc, bool sgl, size_t icg, - size_t dir_icg) -{ - if (inc) { - if (dir_icg) - return dir_icg; - if (sgl) - return icg; - } - - return 0; -} - -static inline size_t dmaengine_get_dst_icg(struct dma_interleaved_template *xt, - struct data_chunk *chunk) -{ - return dmaengine_get_icg(xt->dst_inc, xt->dst_sgl, - chunk->icg, chunk->dst_icg); -} - -static inline size_t dmaengine_get_src_icg(struct dma_interleaved_template *xt, - struct data_chunk *chunk) -{ - return dmaengine_get_icg(xt->src_inc, xt->src_sgl, - chunk->icg, chunk->src_icg); -} - -/* --- public DMA engine API --- */ - -#ifdef CONFIG_DMA_ENGINE -void dmaengine_get(void); -void dmaengine_put(void); -#else -static inline void dmaengine_get(void) -{ -} -static inline void dmaengine_put(void) -{ -} -#endif - -#ifdef CONFIG_ASYNC_TX_DMA -#define async_dmaengine_get() dmaengine_get() -#define async_dmaengine_put() dmaengine_put() -#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH -#define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX) -#else -#define async_dma_find_channel(type) dma_find_channel(type) -#endif /* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH */ -#else -static inline void async_dmaengine_get(void) -{ -} -static inline void async_dmaengine_put(void) -{ -} -static inline struct dma_chan * -async_dma_find_channel(enum dma_transaction_type type) -{ - return NULL; -} -#endif /* CONFIG_ASYNC_TX_DMA */ -void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, - struct dma_chan *chan); - -static inline void async_tx_ack(struct dma_async_tx_descriptor *tx) -{ - tx->flags |= DMA_CTRL_ACK; -} - -static inline void async_tx_clear_ack(struct dma_async_tx_descriptor *tx) -{ - tx->flags &= ~DMA_CTRL_ACK; -} - -static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) -{ - return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; -} - -#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) -static inline void -__dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) -{ - set_bit(tx_type, dstp->bits); -} - -#define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask)) -static inline void -__dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) -{ - clear_bit(tx_type, dstp->bits); -} - -#define dma_cap_zero(mask) __dma_cap_zero(&(mask)) -static inline void __dma_cap_zero(dma_cap_mask_t *dstp) -{ - bitmap_zero(dstp->bits, DMA_TX_TYPE_END); -} - -#define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask)) -static inline int -__dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp) -{ - return test_bit(tx_type, srcp->bits); -} - -#define for_each_dma_cap_mask(cap, mask) \ - for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END) - -/** - * dma_async_issue_pending - flush pending transactions to HW - * @chan: target DMA channel - * - * This allows drivers to push copies to HW in batches, - * reducing MMIO writes where possible. - */ -static inline void dma_async_issue_pending(struct dma_chan *chan) -{ - chan->device->device_issue_pending(chan); -} - -/** - * dma_async_is_tx_complete - poll for transaction completion - * @chan: DMA channel - * @cookie: transaction identifier to check status of - * @last: returns last completed cookie, can be NULL - * @used: returns last issued cookie, can be NULL - * - * If @last and @used are passed in, upon return they reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. - */ -static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) -{ - struct dma_tx_state state; - enum dma_status status; - - status = chan->device->device_tx_status(chan, cookie, &state); - if (last) - *last = state.last; - if (used) - *used = state.used; - return status; -} - -/** - * dma_async_is_complete - test a cookie against chan state - * @cookie: transaction identifier to test status of - * @last_complete: last know completed transaction - * @last_used: last cookie value handed out - * - * dma_async_is_complete() is used in dma_async_is_tx_complete() - * the test logic is separated for lightweight testing of multiple cookies - */ -static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, - dma_cookie_t last_complete, dma_cookie_t last_used) -{ - if (last_complete <= last_used) { - if ((cookie <= last_complete) || (cookie > last_used)) - return DMA_COMPLETE; - } else { - if ((cookie <= last_complete) && (cookie > last_used)) - return DMA_COMPLETE; - } - return DMA_IN_PROGRESS; -} - -static inline void -dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->last = last; - st->used = used; - st->residue = residue; -} - -#ifdef CONFIG_DMA_ENGINE -struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); -enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); -enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); -void dma_issue_pending_all(void); -struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, - dma_filter_fn fn, void *fn_param, - struct device_node *np); - -struct dma_chan *dma_request_chan(struct device *dev, const char *name); -struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask); - -void dma_release_channel(struct dma_chan *chan); -int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps); -#else -static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) -{ - return NULL; -} -static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) -{ - return DMA_COMPLETE; -} -static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) -{ - return DMA_COMPLETE; -} -static inline void dma_issue_pending_all(void) -{ -} -static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, - dma_filter_fn fn, - void *fn_param, - struct device_node *np) -{ - return NULL; -} -static inline struct dma_chan *dma_request_chan(struct device *dev, - const char *name) -{ - return ERR_PTR(-ENODEV); -} -static inline struct dma_chan *dma_request_chan_by_mask( - const dma_cap_mask_t *mask) -{ - return ERR_PTR(-ENODEV); -} -static inline void dma_release_channel(struct dma_chan *chan) -{ -} -static inline int dma_get_slave_caps(struct dma_chan *chan, - struct dma_slave_caps *caps) -{ - return -ENXIO; -} -#endif - -static inline int dmaengine_desc_set_reuse(struct dma_async_tx_descriptor *tx) -{ - struct dma_slave_caps caps; - int ret; - - ret = dma_get_slave_caps(tx->chan, &caps); - if (ret) - return ret; - - if (!caps.descriptor_reuse) - return -EPERM; - - tx->flags |= DMA_CTRL_REUSE; - return 0; -} - -static inline void dmaengine_desc_clear_reuse(struct dma_async_tx_descriptor *tx) -{ - tx->flags &= ~DMA_CTRL_REUSE; -} - -static inline bool dmaengine_desc_test_reuse(struct dma_async_tx_descriptor *tx) -{ - return (tx->flags & DMA_CTRL_REUSE) == DMA_CTRL_REUSE; -} - -static inline int dmaengine_desc_free(struct dma_async_tx_descriptor *desc) -{ - /* this is supported for reusable desc, so check that */ - if (!dmaengine_desc_test_reuse(desc)) - return -EPERM; - - return desc->desc_free(desc); -} - -/* --- DMA device --- */ - -int dma_async_device_register(struct dma_device *device); -int dmaenginem_async_device_register(struct dma_device *device); -void dma_async_device_unregister(struct dma_device *device); -int dma_async_device_channel_register(struct dma_device *device, - struct dma_chan *chan); -void dma_async_device_channel_unregister(struct dma_device *device, - struct dma_chan *chan); -void dma_run_dependencies(struct dma_async_tx_descriptor *tx); -#define dma_request_channel(mask, x, y) \ - __dma_request_channel(&(mask), x, y, NULL) - -/* Deprecated, please use dma_request_chan() directly */ -static inline struct dma_chan * __deprecated -dma_request_slave_channel(struct device *dev, const char *name) -{ - struct dma_chan *ch = dma_request_chan(dev, name); - - return IS_ERR(ch) ? NULL : ch; -} - -static inline struct dma_chan -*dma_request_slave_channel_compat(const dma_cap_mask_t mask, - dma_filter_fn fn, void *fn_param, - struct device *dev, const char *name) -{ - struct dma_chan *chan; - - chan = dma_request_slave_channel(dev, name); - if (chan) - return chan; - - if (!fn || !fn_param) - return NULL; - - return __dma_request_channel(&mask, fn, fn_param, NULL); -} - -static inline char * -dmaengine_get_direction_text(enum dma_transfer_direction dir) -{ - switch (dir) { - case DMA_DEV_TO_MEM: - return "DEV_TO_MEM"; - case DMA_MEM_TO_DEV: - return "MEM_TO_DEV"; - case DMA_MEM_TO_MEM: - return "MEM_TO_MEM"; - case DMA_DEV_TO_DEV: - return "DEV_TO_DEV"; - default: - return "invalid"; - } -} - -static inline struct device *dmaengine_get_dma_device(struct dma_chan *chan) -{ - if (chan->dev->chan_dma_dev) - return &chan->dev->device; - - return chan->device->dev; -} - -#endif /* DMAENGINE_H */ diff --git a/snd-alpx/include/6.3/amd_xdma.h b/snd-alpx/include/6.3/amd_xdma.h deleted file mode 100644 index ceba69e..0000000 --- a/snd-alpx/include/6.3/amd_xdma.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright (C) 2022, Advanced Micro Devices, Inc. - */ - -#ifndef _DMAENGINE_AMD_XDMA_H -#define _DMAENGINE_AMD_XDMA_H - -#include <linux/interrupt.h> -#include <linux/platform_device.h> - -int xdma_enable_user_irq(struct platform_device *pdev, u32 irq_num); -void xdma_disable_user_irq(struct platform_device *pdev, u32 irq_num); -int xdma_get_user_irq(struct platform_device *pdev, u32 user_irq_index); - -#endif /* _DMAENGINE_AMD_XDMA_H */ diff --git a/snd-alpx/include/6.3/dmaengine.h b/snd-alpx/include/6.3/dmaengine.h deleted file mode 100644 index c3656e5..0000000 --- a/snd-alpx/include/6.3/dmaengine.h +++ /dev/null @@ -1,1637 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved. - */ -#ifndef LINUX_DMAENGINE_H -#define LINUX_DMAENGINE_H - -#include <linux/device.h> -#include <linux/err.h> -#include <linux/uio.h> -#include <linux/bug.h> -#include <linux/scatterlist.h> -#include <linux/bitmap.h> -#include <linux/types.h> -#include <asm/page.h> - -/** - * typedef dma_cookie_t - an opaque DMA cookie - * - * if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code - */ -typedef s32 dma_cookie_t; -#define DMA_MIN_COOKIE 1 - -static inline int dma_submit_error(dma_cookie_t cookie) -{ - return cookie < 0 ? cookie : 0; -} - -/** - * enum dma_status - DMA transaction status - * @DMA_COMPLETE: transaction completed - * @DMA_IN_PROGRESS: transaction not yet processed - * @DMA_PAUSED: transaction is paused - * @DMA_ERROR: transaction failed - */ -enum dma_status { - DMA_COMPLETE, - DMA_IN_PROGRESS, - DMA_PAUSED, - DMA_ERROR, - DMA_OUT_OF_ORDER, -}; - -/** - * enum dma_transaction_type - DMA transaction types/indexes - * - * Note: The DMA_ASYNC_TX capability is not to be set by drivers. It is - * automatically set as dma devices are registered. - */ -enum dma_transaction_type { - DMA_MEMCPY, - DMA_XOR, - DMA_PQ, - DMA_XOR_VAL, - DMA_PQ_VAL, - DMA_MEMSET, - DMA_MEMSET_SG, - DMA_INTERRUPT, - DMA_PRIVATE, - DMA_ASYNC_TX, - DMA_SLAVE, - DMA_CYCLIC, - DMA_INTERLEAVE, - DMA_COMPLETION_NO_ORDER, - DMA_REPEAT, - DMA_LOAD_EOT, -/* last transaction type for creation of the capabilities mask */ - DMA_TX_TYPE_END, -}; - -/** - * enum dma_transfer_direction - dma transfer mode and direction indicator - * @DMA_MEM_TO_MEM: Async/Memcpy mode - * @DMA_MEM_TO_DEV: Slave mode & From Memory to Device - * @DMA_DEV_TO_MEM: Slave mode & From Device to Memory - * @DMA_DEV_TO_DEV: Slave mode & From Device to Device - */ -enum dma_transfer_direction { - DMA_MEM_TO_MEM, - DMA_MEM_TO_DEV, - DMA_DEV_TO_MEM, - DMA_DEV_TO_DEV, - DMA_TRANS_NONE, -}; - -/** - * Interleaved Transfer Request - * ---------------------------- - * A chunk is collection of contiguous bytes to be transferred. - * The gap(in bytes) between two chunks is called inter-chunk-gap(ICG). - * ICGs may or may not change between chunks. - * A FRAME is the smallest series of contiguous {chunk,icg} pairs, - * that when repeated an integral number of times, specifies the transfer. - * A transfer template is specification of a Frame, the number of times - * it is to be repeated and other per-transfer attributes. - * - * Practically, a client driver would have ready a template for each - * type of transfer it is going to need during its lifetime and - * set only 'src_start' and 'dst_start' before submitting the requests. - * - * - * | Frame-1 | Frame-2 | ~ | Frame-'numf' | - * |====....==.===...=...|====....==.===...=...| ~ |====....==.===...=...| - * - * == Chunk size - * ... ICG - */ - -/** - * struct data_chunk - Element of scatter-gather list that makes a frame. - * @size: Number of bytes to read from source. - * size_dst := fn(op, size_src), so doesn't mean much for destination. - * @icg: Number of bytes to jump after last src/dst address of this - * chunk and before first src/dst address for next chunk. - * Ignored for dst(assumed 0), if dst_inc is true and dst_sgl is false. - * Ignored for src(assumed 0), if src_inc is true and src_sgl is false. - * @dst_icg: Number of bytes to jump after last dst address of this - * chunk and before the first dst address for next chunk. - * Ignored if dst_inc is true and dst_sgl is false. - * @src_icg: Number of bytes to jump after last src address of this - * chunk and before the first src address for next chunk. - * Ignored if src_inc is true and src_sgl is false. - */ -struct data_chunk { - size_t size; - size_t icg; - size_t dst_icg; - size_t src_icg; -}; - -/** - * struct dma_interleaved_template - Template to convey DMAC the transfer pattern - * and attributes. - * @src_start: Bus address of source for the first chunk. - * @dst_start: Bus address of destination for the first chunk. - * @dir: Specifies the type of Source and Destination. - * @src_inc: If the source address increments after reading from it. - * @dst_inc: If the destination address increments after writing to it. - * @src_sgl: If the 'icg' of sgl[] applies to Source (scattered read). - * Otherwise, source is read contiguously (icg ignored). - * Ignored if src_inc is false. - * @dst_sgl: If the 'icg' of sgl[] applies to Destination (scattered write). - * Otherwise, destination is filled contiguously (icg ignored). - * Ignored if dst_inc is false. - * @numf: Number of frames in this template. - * @frame_size: Number of chunks in a frame i.e, size of sgl[]. - * @sgl: Array of {chunk,icg} pairs that make up a frame. - */ -struct dma_interleaved_template { - dma_addr_t src_start; - dma_addr_t dst_start; - enum dma_transfer_direction dir; - bool src_inc; - bool dst_inc; - bool src_sgl; - bool dst_sgl; - size_t numf; - size_t frame_size; - struct data_chunk sgl[]; -}; - -/** - * enum dma_ctrl_flags - DMA flags to augment operation preparation, - * control completion, and communicate status. - * @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of - * this transaction - * @DMA_CTRL_ACK - if clear, the descriptor cannot be reused until the client - * acknowledges receipt, i.e. has a chance to establish any dependency - * chains - * @DMA_PREP_PQ_DISABLE_P - prevent generation of P while generating Q - * @DMA_PREP_PQ_DISABLE_Q - prevent generation of Q while generating P - * @DMA_PREP_CONTINUE - indicate to a driver that it is reusing buffers as - * sources that were the result of a previous operation, in the case of a PQ - * operation it continues the calculation with new sources - * @DMA_PREP_FENCE - tell the driver that subsequent operations depend - * on the result of this operation - * @DMA_CTRL_REUSE: client can reuse the descriptor and submit again till - * cleared or freed - * @DMA_PREP_CMD: tell the driver that the data passed to DMA API is command - * data and the descriptor should be in different format from normal - * data descriptors. - * @DMA_PREP_REPEAT: tell the driver that the transaction shall be automatically - * repeated when it ends until a transaction is issued on the same channel - * with the DMA_PREP_LOAD_EOT flag set. This flag is only applicable to - * interleaved transactions and is ignored for all other transaction types. - * @DMA_PREP_LOAD_EOT: tell the driver that the transaction shall replace any - * active repeated (as indicated by DMA_PREP_REPEAT) transaction when the - * repeated transaction ends. Not setting this flag when the previously queued - * transaction is marked with DMA_PREP_REPEAT will cause the new transaction - * to never be processed and stay in the issued queue forever. The flag is - * ignored if the previous transaction is not a repeated transaction. - */ -enum dma_ctrl_flags { - DMA_PREP_INTERRUPT = (1 << 0), - DMA_CTRL_ACK = (1 << 1), - DMA_PREP_PQ_DISABLE_P = (1 << 2), - DMA_PREP_PQ_DISABLE_Q = (1 << 3), - DMA_PREP_CONTINUE = (1 << 4), - DMA_PREP_FENCE = (1 << 5), - DMA_CTRL_REUSE = (1 << 6), - DMA_PREP_CMD = (1 << 7), - DMA_PREP_REPEAT = (1 << 8), - DMA_PREP_LOAD_EOT = (1 << 9), -}; - -/** - * enum sum_check_bits - bit position of pq_check_flags - */ -enum sum_check_bits { - SUM_CHECK_P = 0, - SUM_CHECK_Q = 1, -}; - -/** - * enum pq_check_flags - result of async_{xor,pq}_zero_sum operations - * @SUM_CHECK_P_RESULT - 1 if xor zero sum error, 0 otherwise - * @SUM_CHECK_Q_RESULT - 1 if reed-solomon zero sum error, 0 otherwise - */ -enum sum_check_flags { - SUM_CHECK_P_RESULT = (1 << SUM_CHECK_P), - SUM_CHECK_Q_RESULT = (1 << SUM_CHECK_Q), -}; - - -/** - * dma_cap_mask_t - capabilities bitmap modeled after cpumask_t. - * See linux/cpumask.h - */ -typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t; - -/** - * enum dma_desc_metadata_mode - per descriptor metadata mode types supported - * @DESC_METADATA_CLIENT - the metadata buffer is allocated/provided by the - * client driver and it is attached (via the dmaengine_desc_attach_metadata() - * helper) to the descriptor. - * - * Client drivers interested to use this mode can follow: - * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * construct the metadata in the client's buffer - * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the - * descriptor - * 3. submit the transfer - * - DMA_DEV_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. use dmaengine_desc_attach_metadata() to attach the buffer to the - * descriptor - * 3. submit the transfer - * 4. when the transfer is completed, the metadata should be available in the - * attached buffer - * - * @DESC_METADATA_ENGINE - the metadata buffer is allocated/managed by the DMA - * driver. The client driver can ask for the pointer, maximum size and the - * currently used size of the metadata and can directly update or read it. - * dmaengine_desc_get_metadata_ptr() and dmaengine_desc_set_metadata_len() is - * provided as helper functions. - * - * Note: the metadata area for the descriptor is no longer valid after the - * transfer has been completed (valid up to the point when the completion - * callback returns if used). - * - * Client drivers interested to use this mode can follow: - * - DMA_MEM_TO_DEV / DEV_MEM_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. use dmaengine_desc_get_metadata_ptr() to get the pointer to the engine's - * metadata area - * 3. update the metadata at the pointer - * 4. use dmaengine_desc_set_metadata_len() to tell the DMA engine the amount - * of data the client has placed into the metadata buffer - * 5. submit the transfer - * - DMA_DEV_TO_MEM: - * 1. prepare the descriptor (dmaengine_prep_*) - * 2. submit the transfer - * 3. on transfer completion, use dmaengine_desc_get_metadata_ptr() to get the - * pointer to the engine's metadata area - * 4. Read out the metadata from the pointer - * - * Note: the two mode is not compatible and clients must use one mode for a - * descriptor. - */ -enum dma_desc_metadata_mode { - DESC_METADATA_NONE = 0, - DESC_METADATA_CLIENT = BIT(0), - DESC_METADATA_ENGINE = BIT(1), -}; - -/** - * struct dma_chan_percpu - the per-CPU part of struct dma_chan - * @memcpy_count: transaction counter - * @bytes_transferred: byte counter - */ -struct dma_chan_percpu { - /* stats */ - unsigned long memcpy_count; - unsigned long bytes_transferred; -}; - -/** - * struct dma_router - DMA router structure - * @dev: pointer to the DMA router device - * @route_free: function to be called when the route can be disconnected - */ -struct dma_router { - struct device *dev; - void (*route_free)(struct device *dev, void *route_data); -}; - -/** - * struct dma_chan - devices supply DMA channels, clients use them - * @device: ptr to the dma device who supplies this channel, always !%NULL - * @slave: ptr to the device using this channel - * @cookie: last cookie value returned to client - * @completed_cookie: last completed cookie for this channel - * @chan_id: channel ID for sysfs - * @dev: class device for sysfs - * @name: backlink name for sysfs - * @dbg_client_name: slave name for debugfs in format: - * dev_name(requester's dev):channel name, for example: "2b00000.mcasp:tx" - * @device_node: used to add this to the device chan list - * @local: per-cpu pointer to a struct dma_chan_percpu - * @client_count: how many clients are using this channel - * @table_count: number of appearances in the mem-to-mem allocation table - * @router: pointer to the DMA router structure - * @route_data: channel specific data for the router - * @private: private data for certain client-channel associations - */ -struct dma_chan { - struct dma_device *device; - struct device *slave; - dma_cookie_t cookie; - dma_cookie_t completed_cookie; - - /* sysfs */ - int chan_id; - struct dma_chan_dev *dev; - const char *name; -#ifdef CONFIG_DEBUG_FS - char *dbg_client_name; -#endif - - struct list_head device_node; - struct dma_chan_percpu __percpu *local; - int client_count; - int table_count; - - /* DMA router */ - struct dma_router *router; - void *route_data; - - void *private; -}; - -/** - * struct dma_chan_dev - relate sysfs device node to backing channel device - * @chan: driver channel device - * @device: sysfs device - * @dev_id: parent dma_device dev_id - * @chan_dma_dev: The channel is using custom/different dma-mapping - * compared to the parent dma_device - */ -struct dma_chan_dev { - struct dma_chan *chan; - struct device device; - int dev_id; - bool chan_dma_dev; -}; - -/** - * enum dma_slave_buswidth - defines bus width of the DMA slave - * device, source or target buses - */ -enum dma_slave_buswidth { - DMA_SLAVE_BUSWIDTH_UNDEFINED = 0, - DMA_SLAVE_BUSWIDTH_1_BYTE = 1, - DMA_SLAVE_BUSWIDTH_2_BYTES = 2, - DMA_SLAVE_BUSWIDTH_3_BYTES = 3, - DMA_SLAVE_BUSWIDTH_4_BYTES = 4, - DMA_SLAVE_BUSWIDTH_8_BYTES = 8, - DMA_SLAVE_BUSWIDTH_16_BYTES = 16, - DMA_SLAVE_BUSWIDTH_32_BYTES = 32, - DMA_SLAVE_BUSWIDTH_64_BYTES = 64, - DMA_SLAVE_BUSWIDTH_128_BYTES = 128, -}; - -/** - * struct dma_slave_config - dma slave channel runtime config - * @direction: whether the data shall go in or out on this slave - * channel, right now. DMA_MEM_TO_DEV and DMA_DEV_TO_MEM are - * legal values. DEPRECATED, drivers should use the direction argument - * to the device_prep_slave_sg and device_prep_dma_cyclic functions or - * the dir field in the dma_interleaved_template structure. - * @src_addr: this is the physical address where DMA slave data - * should be read (RX), if the source is memory this argument is - * ignored. - * @dst_addr: this is the physical address where DMA slave data - * should be written (TX), if the destination is memory this argument - * is ignored. - * @src_addr_width: this is the width in bytes of the source (RX) - * register where DMA data shall be read. If the source - * is memory this may be ignored depending on architecture. - * Legal values: 1, 2, 3, 4, 8, 16, 32, 64, 128. - * @dst_addr_width: same as src_addr_width but for destination - * target (TX) mutatis mutandis. - * @src_maxburst: the maximum number of words (note: words, as in - * units of the src_addr_width member, not bytes) that can be sent - * in one burst to the device. Typically something like half the - * FIFO depth on I/O peripherals so you don't overflow it. This - * may or may not be applicable on memory sources. - * @dst_maxburst: same as src_maxburst but for destination target - * mutatis mutandis. - * @src_port_window_size: The length of the register area in words the data need - * to be accessed on the device side. It is only used for devices which is using - * an area instead of a single register to receive the data. Typically the DMA - * loops in this area in order to transfer the data. - * @dst_port_window_size: same as src_port_window_size but for the destination - * port. - * @device_fc: Flow Controller Settings. Only valid for slave channels. Fill - * with 'true' if peripheral should be flow controller. Direction will be - * selected at Runtime. - * @peripheral_config: peripheral configuration for programming peripheral - * for dmaengine transfer - * @peripheral_size: peripheral configuration buffer size - * - * This struct is passed in as configuration data to a DMA engine - * in order to set up a certain channel for DMA transport at runtime. - * The DMA device/engine has to provide support for an additional - * callback in the dma_device structure, device_config and this struct - * will then be passed in as an argument to the function. - * - * The rationale for adding configuration information to this struct is as - * follows: if it is likely that more than one DMA slave controllers in - * the world will support the configuration option, then make it generic. - * If not: if it is fixed so that it be sent in static from the platform - * data, then prefer to do that. - */ -struct dma_slave_config { - enum dma_transfer_direction direction; - phys_addr_t src_addr; - phys_addr_t dst_addr; - enum dma_slave_buswidth src_addr_width; - enum dma_slave_buswidth dst_addr_width; - u32 src_maxburst; - u32 dst_maxburst; - u32 src_port_window_size; - u32 dst_port_window_size; - bool device_fc; - void *peripheral_config; - size_t peripheral_size; -}; - -/** - * enum dma_residue_granularity - Granularity of the reported transfer residue - * @DMA_RESIDUE_GRANULARITY_DESCRIPTOR: Residue reporting is not support. The - * DMA channel is only able to tell whether a descriptor has been completed or - * not, which means residue reporting is not supported by this channel. The - * residue field of the dma_tx_state field will always be 0. - * @DMA_RESIDUE_GRANULARITY_SEGMENT: Residue is updated after each successfully - * completed segment of the transfer (For cyclic transfers this is after each - * period). This is typically implemented by having the hardware generate an - * interrupt after each transferred segment and then the drivers updates the - * outstanding residue by the size of the segment. Another possibility is if - * the hardware supports scatter-gather and the segment descriptor has a field - * which gets set after the segment has been completed. The driver then counts - * the number of segments without the flag set to compute the residue. - * @DMA_RESIDUE_GRANULARITY_BURST: Residue is updated after each transferred - * burst. This is typically only supported if the hardware has a progress - * register of some sort (E.g. a register with the current read/write address - * or a register with the amount of bursts/beats/bytes that have been - * transferred or still need to be transferred). - */ -enum dma_residue_granularity { - DMA_RESIDUE_GRANULARITY_DESCRIPTOR = 0, - DMA_RESIDUE_GRANULARITY_SEGMENT = 1, - DMA_RESIDUE_GRANULARITY_BURST = 2, -}; - -/** - * struct dma_slave_caps - expose capabilities of a slave channel only - * @src_addr_widths: bit mask of src addr widths the channel supports. - * Width is specified in bytes, e.g. for a channel supporting - * a width of 4 the mask should have BIT(4) set. - * @dst_addr_widths: bit mask of dst addr widths the channel supports - * @directions: bit mask of slave directions the channel supports. - * Since the enum dma_transfer_direction is not defined as bit flag for - * each type, the dma controller should set BIT(<TYPE>) and same - * should be checked by controller as well - * @min_burst: min burst capability per-transfer - * @max_burst: max burst capability per-transfer - * @max_sg_burst: max number of SG list entries executed in a single burst - * DMA tansaction with no software intervention for reinitialization. - * Zero value means unlimited number of entries. - * @cmd_pause: true, if pause is supported (i.e. for reading residue or - * for resume later) - * @cmd_resume: true, if resume is supported - * @cmd_terminate: true, if terminate cmd is supported - * @residue_granularity: granularity of the reported transfer residue - * @descriptor_reuse: if a descriptor can be reused by client and - * resubmitted multiple times - */ -struct dma_slave_caps { - u32 src_addr_widths; - u32 dst_addr_widths; - u32 directions; - u32 min_burst; - u32 max_burst; - u32 max_sg_burst; - bool cmd_pause; - bool cmd_resume; - bool cmd_terminate; - enum dma_residue_granularity residue_granularity; - bool descriptor_reuse; -}; - -static inline const char *dma_chan_name(struct dma_chan *chan) -{ - return dev_name(&chan->dev->device); -} - -void dma_chan_cleanup(struct kref *kref); - -/** - * typedef dma_filter_fn - callback filter for dma_request_channel - * @chan: channel to be reviewed - * @filter_param: opaque parameter passed through dma_request_channel - * - * When this optional parameter is specified in a call to dma_request_channel a - * suitable channel is passed to this routine for further dispositioning before - * being returned. Where 'suitable' indicates a non-busy channel that - * satisfies the given capability mask. It returns 'true' to indicate that the - * channel is suitable. - */ -typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param); - -typedef void (*dma_async_tx_callback)(void *dma_async_param); - -enum dmaengine_tx_result { - DMA_TRANS_NOERROR = 0, /* SUCCESS */ - DMA_TRANS_READ_FAILED, /* Source DMA read failed */ - DMA_TRANS_WRITE_FAILED, /* Destination DMA write failed */ - DMA_TRANS_ABORTED, /* Op never submitted / aborted */ -}; - -struct dmaengine_result { - enum dmaengine_tx_result result; - u32 residue; -}; - -typedef void (*dma_async_tx_callback_result)(void *dma_async_param, - const struct dmaengine_result *result); - -struct dmaengine_unmap_data { -#if IS_ENABLED(CONFIG_DMA_ENGINE_RAID) - u16 map_cnt; -#else - u8 map_cnt; -#endif - u8 to_cnt; - u8 from_cnt; - u8 bidi_cnt; - struct device *dev; - struct kref kref; - size_t len; - dma_addr_t addr[]; -}; - -struct dma_async_tx_descriptor; - -struct dma_descriptor_metadata_ops { - int (*attach)(struct dma_async_tx_descriptor *desc, void *data, - size_t len); - - void *(*get_ptr)(struct dma_async_tx_descriptor *desc, - size_t *payload_len, size_t *max_len); - int (*set_len)(struct dma_async_tx_descriptor *desc, - size_t payload_len); -}; - -/** - * struct dma_async_tx_descriptor - async transaction descriptor - * ---dma generic offload fields--- - * @cookie: tracking cookie for this transaction, set to -EBUSY if - * this tx is sitting on a dependency list - * @flags: flags to augment operation preparation, control completion, and - * communicate status - * @phys: physical address of the descriptor - * @chan: target channel for this operation - * @tx_submit: accept the descriptor, assign ordered cookie and mark the - * descriptor pending. To be pushed on .issue_pending() call - * @callback: routine to call after this operation is complete - * @callback_param: general parameter to pass to the callback routine - * @desc_metadata_mode: core managed metadata mode to protect mixed use of - * DESC_METADATA_CLIENT or DESC_METADATA_ENGINE. Otherwise - * DESC_METADATA_NONE - * @metadata_ops: DMA driver provided metadata mode ops, need to be set by the - * DMA driver if metadata mode is supported with the descriptor - * ---async_tx api specific fields--- - * @next: at completion submit this descriptor - * @parent: pointer to the next level up in the dependency chain - * @lock: protect the parent and next pointers - */ -struct dma_async_tx_descriptor { - dma_cookie_t cookie; - enum dma_ctrl_flags flags; /* not a 'long' to pack with cookie */ - dma_addr_t phys; - struct dma_chan *chan; - dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx); - int (*desc_free)(struct dma_async_tx_descriptor *tx); - dma_async_tx_callback callback; - dma_async_tx_callback_result callback_result; - void *callback_param; - struct dmaengine_unmap_data *unmap; - enum dma_desc_metadata_mode desc_metadata_mode; - struct dma_descriptor_metadata_ops *metadata_ops; -#ifdef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH - struct dma_async_tx_descriptor *next; - struct dma_async_tx_descriptor *parent; - spinlock_t lock; -#endif -}; - -#ifdef CONFIG_DMA_ENGINE -static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, - struct dmaengine_unmap_data *unmap) -{ - kref_get(&unmap->kref); - tx->unmap = unmap; -} - -struct dmaengine_unmap_data * -dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags); -void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap); -#else -static inline void dma_set_unmap(struct dma_async_tx_descriptor *tx, - struct dmaengine_unmap_data *unmap) -{ -} -static inline struct dmaengine_unmap_data * -dmaengine_get_unmap_data(struct device *dev, int nr, gfp_t flags) -{ - return NULL; -} -static inline void dmaengine_unmap_put(struct dmaengine_unmap_data *unmap) -{ -} -#endif - -static inline void dma_descriptor_unmap(struct dma_async_tx_descriptor *tx) -{ - if (!tx->unmap) - return; - - dmaengine_unmap_put(tx->unmap); - tx->unmap = NULL; -} - -#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH -static inline void txd_lock(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_unlock(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) -{ - BUG(); -} -static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) -{ -} -static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) -{ -} -static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) -{ - return NULL; -} -static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) -{ - return NULL; -} - -#else -static inline void txd_lock(struct dma_async_tx_descriptor *txd) -{ - spin_lock_bh(&txd->lock); -} -static inline void txd_unlock(struct dma_async_tx_descriptor *txd) -{ - spin_unlock_bh(&txd->lock); -} -static inline void txd_chain(struct dma_async_tx_descriptor *txd, struct dma_async_tx_descriptor *next) -{ - txd->next = next; - next->parent = txd; -} -static inline void txd_clear_parent(struct dma_async_tx_descriptor *txd) -{ - txd->parent = NULL; -} -static inline void txd_clear_next(struct dma_async_tx_descriptor *txd) -{ - txd->next = NULL; -} -static inline struct dma_async_tx_descriptor *txd_parent(struct dma_async_tx_descriptor *txd) -{ - return txd->parent; -} -static inline struct dma_async_tx_descriptor *txd_next(struct dma_async_tx_descriptor *txd) -{ - return txd->next; -} -#endif - -/** - * struct dma_tx_state - filled in to report the status of - * a transfer. - * @last: last completed DMA cookie - * @used: last issued DMA cookie (i.e. the one in progress) - * @residue: the remaining number of bytes left to transmit - * on the selected transfer for states DMA_IN_PROGRESS and - * DMA_PAUSED if this is implemented in the driver, else 0 - * @in_flight_bytes: amount of data in bytes cached by the DMA. - */ -struct dma_tx_state { - dma_cookie_t last; - dma_cookie_t used; - u32 residue; - u32 in_flight_bytes; -}; - -/** - * enum dmaengine_alignment - defines alignment of the DMA async tx - * buffers - */ -enum dmaengine_alignment { - DMAENGINE_ALIGN_1_BYTE = 0, - DMAENGINE_ALIGN_2_BYTES = 1, - DMAENGINE_ALIGN_4_BYTES = 2, - DMAENGINE_ALIGN_8_BYTES = 3, - DMAENGINE_ALIGN_16_BYTES = 4, - DMAENGINE_ALIGN_32_BYTES = 5, - DMAENGINE_ALIGN_64_BYTES = 6, - DMAENGINE_ALIGN_128_BYTES = 7, - DMAENGINE_ALIGN_256_BYTES = 8, -}; - -/** - * struct dma_slave_map - associates slave device and it's slave channel with - * parameter to be used by a filter function - * @devname: name of the device - * @slave: slave channel name - * @param: opaque parameter to pass to struct dma_filter.fn - */ -struct dma_slave_map { - const char *devname; - const char *slave; - void *param; -}; - -/** - * struct dma_filter - information for slave device/channel to filter_fn/param - * mapping - * @fn: filter function callback - * @mapcnt: number of slave device/channel in the map - * @map: array of channel to filter mapping data - */ -struct dma_filter { - dma_filter_fn fn; - int mapcnt; - const struct dma_slave_map *map; -}; - -/** - * struct dma_device - info on the entity supplying DMA services - * @ref: reference is taken and put every time a channel is allocated or freed - * @chancnt: how many DMA channels are supported - * @privatecnt: how many DMA channels are requested by dma_request_channel - * @channels: the list of struct dma_chan - * @global_node: list_head for global dma_device_list - * @filter: information for device/slave to filter function/param mapping - * @cap_mask: one or more dma_capability flags - * @desc_metadata_modes: supported metadata modes by the DMA device - * @max_xor: maximum number of xor sources, 0 if no capability - * @max_pq: maximum number of PQ sources and PQ-continue capability - * @copy_align: alignment shift for memcpy operations - * @xor_align: alignment shift for xor operations - * @pq_align: alignment shift for pq operations - * @fill_align: alignment shift for memset operations - * @dev_id: unique device ID - * @dev: struct device reference for dma mapping api - * @owner: owner module (automatically set based on the provided dev) - * @chan_ida: unique channel ID - * @src_addr_widths: bit mask of src addr widths the device supports - * Width is specified in bytes, e.g. for a device supporting - * a width of 4 the mask should have BIT(4) set. - * @dst_addr_widths: bit mask of dst addr widths the device supports - * @directions: bit mask of slave directions the device supports. - * Since the enum dma_transfer_direction is not defined as bit flag for - * each type, the dma controller should set BIT(<TYPE>) and same - * should be checked by controller as well - * @min_burst: min burst capability per-transfer - * @max_burst: max burst capability per-transfer - * @max_sg_burst: max number of SG list entries executed in a single burst - * DMA tansaction with no software intervention for reinitialization. - * Zero value means unlimited number of entries. - * @descriptor_reuse: a submitted transfer can be resubmitted after completion - * @residue_granularity: granularity of the transfer residue reported - * by tx_status - * @device_alloc_chan_resources: allocate resources and return the - * number of allocated descriptors - * @device_router_config: optional callback for DMA router configuration - * @device_free_chan_resources: release DMA channel's resources - * @device_prep_dma_memcpy: prepares a memcpy operation - * @device_prep_dma_xor: prepares a xor operation - * @device_prep_dma_xor_val: prepares a xor validation operation - * @device_prep_dma_pq: prepares a pq operation - * @device_prep_dma_pq_val: prepares a pqzero_sum operation - * @device_prep_dma_memset: prepares a memset operation - * @device_prep_dma_memset_sg: prepares a memset operation over a scatter list - * @device_prep_dma_interrupt: prepares an end of chain interrupt operation - * @device_prep_slave_sg: prepares a slave dma operation - * @device_prep_dma_cyclic: prepare a cyclic dma operation suitable for audio. - * The function takes a buffer of size buf_len. The callback function will - * be called after period_len bytes have been transferred. - * @device_prep_interleaved_dma: Transfer expression in a generic way. - * @device_prep_dma_imm_data: DMA's 8 byte immediate data to the dst address - * @device_caps: May be used to override the generic DMA slave capabilities - * with per-channel specific ones - * @device_config: Pushes a new configuration to a channel, return 0 or an error - * code - * @device_pause: Pauses any transfer happening on a channel. Returns - * 0 or an error code - * @device_resume: Resumes any transfer on a channel previously - * paused. Returns 0 or an error code - * @device_terminate_all: Aborts all transfers on a channel. Returns 0 - * or an error code - * @device_synchronize: Synchronizes the termination of a transfers to the - * current context. - * @device_tx_status: poll for transaction completion, the optional - * txstate parameter can be supplied with a pointer to get a - * struct with auxiliary transfer status information, otherwise the call - * will just return a simple status code - * @device_issue_pending: push pending transactions to hardware - * @device_release: called sometime atfer dma_async_device_unregister() is - * called and there are no further references to this structure. This - * must be implemented to free resources however many existing drivers - * do not and are therefore not safe to unbind while in use. - * @dbg_summary_show: optional routine to show contents in debugfs; default code - * will be used when this is omitted, but custom code can show extra, - * controller specific information. - * @dbg_dev_root: the root folder in debugfs for this device - */ -struct dma_device { - struct kref ref; - unsigned int chancnt; - unsigned int privatecnt; - struct list_head channels; - struct list_head global_node; - struct dma_filter filter; - dma_cap_mask_t cap_mask; - enum dma_desc_metadata_mode desc_metadata_modes; - unsigned short max_xor; - unsigned short max_pq; - enum dmaengine_alignment copy_align; - enum dmaengine_alignment xor_align; - enum dmaengine_alignment pq_align; - enum dmaengine_alignment fill_align; - #define DMA_HAS_PQ_CONTINUE (1 << 15) - - int dev_id; - struct device *dev; - struct module *owner; - struct ida chan_ida; - - u32 src_addr_widths; - u32 dst_addr_widths; - u32 directions; - u32 min_burst; - u32 max_burst; - u32 max_sg_burst; - bool descriptor_reuse; - enum dma_residue_granularity residue_granularity; - - int (*device_alloc_chan_resources)(struct dma_chan *chan); - int (*device_router_config)(struct dma_chan *chan); - void (*device_free_chan_resources)(struct dma_chan *chan); - - struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)( - struct dma_chan *chan, dma_addr_t dst, dma_addr_t src, - size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_xor)( - struct dma_chan *chan, dma_addr_t dst, dma_addr_t *src, - unsigned int src_cnt, size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_xor_val)( - struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt, - size_t len, enum sum_check_flags *result, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_pq)( - struct dma_chan *chan, dma_addr_t *dst, dma_addr_t *src, - unsigned int src_cnt, const unsigned char *scf, - size_t len, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_pq_val)( - struct dma_chan *chan, dma_addr_t *pq, dma_addr_t *src, - unsigned int src_cnt, const unsigned char *scf, size_t len, - enum sum_check_flags *pqres, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_memset)( - struct dma_chan *chan, dma_addr_t dest, int value, size_t len, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_memset_sg)( - struct dma_chan *chan, struct scatterlist *sg, - unsigned int nents, int value, unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)( - struct dma_chan *chan, unsigned long flags); - - struct dma_async_tx_descriptor *(*device_prep_slave_sg)( - struct dma_chan *chan, struct scatterlist *sgl, - unsigned int sg_len, enum dma_transfer_direction direction, - unsigned long flags, void *context); - struct dma_async_tx_descriptor *(*device_prep_dma_cyclic)( - struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction direction, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_interleaved_dma)( - struct dma_chan *chan, struct dma_interleaved_template *xt, - unsigned long flags); - struct dma_async_tx_descriptor *(*device_prep_dma_imm_data)( - struct dma_chan *chan, dma_addr_t dst, u64 data, - unsigned long flags); - - void (*device_caps)(struct dma_chan *chan, struct dma_slave_caps *caps); - int (*device_config)(struct dma_chan *chan, struct dma_slave_config *config); - int (*device_pause)(struct dma_chan *chan); - int (*device_resume)(struct dma_chan *chan); - int (*device_terminate_all)(struct dma_chan *chan); - void (*device_synchronize)(struct dma_chan *chan); - - enum dma_status (*device_tx_status)(struct dma_chan *chan, - dma_cookie_t cookie, - struct dma_tx_state *txstate); - void (*device_issue_pending)(struct dma_chan *chan); - void (*device_release)(struct dma_device *dev); - /* debugfs support */ - void (*dbg_summary_show)(struct seq_file *s, struct dma_device *dev); - struct dentry *dbg_dev_root; -}; - -static inline int dmaengine_slave_config(struct dma_chan *chan, - struct dma_slave_config *config) -{ - if (chan->device->device_config) - return chan->device->device_config(chan, config); - - return -ENOSYS; -} - -static inline bool is_slave_direction(enum dma_transfer_direction direction) -{ - return (direction == DMA_MEM_TO_DEV) || (direction == DMA_DEV_TO_MEM); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_single( - struct dma_chan *chan, dma_addr_t buf, size_t len, - enum dma_transfer_direction dir, unsigned long flags) -{ - struct scatterlist sg; - sg_init_table(&sg, 1); - sg_dma_address(&sg) = buf; - sg_dma_len(&sg) = len; - - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, &sg, 1, - dir, flags, NULL); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_slave_sg( - struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, - enum dma_transfer_direction dir, unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, sgl, sg_len, - dir, flags, NULL); -} - -#ifdef CONFIG_RAPIDIO_DMA_ENGINE -struct rio_dma_ext; -static inline struct dma_async_tx_descriptor *dmaengine_prep_rio_sg( - struct dma_chan *chan, struct scatterlist *sgl, unsigned int sg_len, - enum dma_transfer_direction dir, unsigned long flags, - struct rio_dma_ext *rio_ext) -{ - if (!chan || !chan->device || !chan->device->device_prep_slave_sg) - return NULL; - - return chan->device->device_prep_slave_sg(chan, sgl, sg_len, - dir, flags, rio_ext); -} -#endif - -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_cyclic( - struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len, - size_t period_len, enum dma_transfer_direction dir, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_cyclic) - return NULL; - - return chan->device->device_prep_dma_cyclic(chan, buf_addr, buf_len, - period_len, dir, flags); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_interleaved_dma( - struct dma_chan *chan, struct dma_interleaved_template *xt, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_interleaved_dma) - return NULL; - if (flags & DMA_PREP_REPEAT && - !test_bit(DMA_REPEAT, chan->device->cap_mask.bits)) - return NULL; - - return chan->device->device_prep_interleaved_dma(chan, xt, flags); -} - -/** - * dmaengine_prep_dma_memset() - Prepare a DMA memset descriptor. - * @chan: The channel to be used for this descriptor - * @dest: Address of buffer to be set - * @value: Treated as a single byte value that fills the destination buffer - * @len: The total size of dest - * @flags: DMA engine flags - */ -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memset( - struct dma_chan *chan, dma_addr_t dest, int value, size_t len, - unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_memset) - return NULL; - - return chan->device->device_prep_dma_memset(chan, dest, value, - len, flags); -} - -static inline struct dma_async_tx_descriptor *dmaengine_prep_dma_memcpy( - struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, - size_t len, unsigned long flags) -{ - if (!chan || !chan->device || !chan->device->device_prep_dma_memcpy) - return NULL; - - return chan->device->device_prep_dma_memcpy(chan, dest, src, - len, flags); -} - -static inline bool dmaengine_is_metadata_mode_supported(struct dma_chan *chan, - enum dma_desc_metadata_mode mode) -{ - if (!chan) - return false; - - return !!(chan->device->desc_metadata_modes & mode); -} - -#ifdef CONFIG_DMA_ENGINE -int dmaengine_desc_attach_metadata(struct dma_async_tx_descriptor *desc, - void *data, size_t len); -void *dmaengine_desc_get_metadata_ptr(struct dma_async_tx_descriptor *desc, - size_t *payload_len, size_t *max_len); -int dmaengine_desc_set_metadata_len(struct dma_async_tx_descriptor *desc, - size_t payload_len); -#else /* CONFIG_DMA_ENGINE */ -static inline int dmaengine_desc_attach_metadata( - struct dma_async_tx_descriptor *desc, void *data, size_t len) -{ - return -EINVAL; -} -static inline void *dmaengine_desc_get_metadata_ptr( - struct dma_async_tx_descriptor *desc, size_t *payload_len, - size_t *max_len) -{ - return NULL; -} -static inline int dmaengine_desc_set_metadata_len( - struct dma_async_tx_descriptor *desc, size_t payload_len) -{ - return -EINVAL; -} -#endif /* CONFIG_DMA_ENGINE */ - -/** - * dmaengine_terminate_all() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * This function is DEPRECATED use either dmaengine_terminate_sync() or - * dmaengine_terminate_async() instead. - */ -static inline int dmaengine_terminate_all(struct dma_chan *chan) -{ - if (chan->device->device_terminate_all) - return chan->device->device_terminate_all(chan); - - return -ENOSYS; -} - -/** - * dmaengine_terminate_async() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * Calling this function will terminate all active and pending descriptors - * that have previously been submitted to the channel. It is not guaranteed - * though that the transfer for the active descriptor has stopped when the - * function returns. Furthermore it is possible the complete callback of a - * submitted transfer is still running when this function returns. - * - * dmaengine_synchronize() needs to be called before it is safe to free - * any memory that is accessed by previously submitted descriptors or before - * freeing any resources accessed from within the completion callback of any - * previously submitted descriptors. - * - * This function can be called from atomic context as well as from within a - * complete callback of a descriptor submitted on the same channel. - * - * If none of the two conditions above apply consider using - * dmaengine_terminate_sync() instead. - */ -static inline int dmaengine_terminate_async(struct dma_chan *chan) -{ - if (chan->device->device_terminate_all) - return chan->device->device_terminate_all(chan); - - return -EINVAL; -} - -/** - * dmaengine_synchronize() - Synchronize DMA channel termination - * @chan: The channel to synchronize - * - * Synchronizes to the DMA channel termination to the current context. When this - * function returns it is guaranteed that all transfers for previously issued - * descriptors have stopped and it is safe to free the memory associated - * with them. Furthermore it is guaranteed that all complete callback functions - * for a previously submitted descriptor have finished running and it is safe to - * free resources accessed from within the complete callbacks. - * - * The behavior of this function is undefined if dma_async_issue_pending() has - * been called between dmaengine_terminate_async() and this function. - * - * This function must only be called from non-atomic context and must not be - * called from within a complete callback of a descriptor submitted on the same - * channel. - */ -static inline void dmaengine_synchronize(struct dma_chan *chan) -{ - might_sleep(); - - if (chan->device->device_synchronize) - chan->device->device_synchronize(chan); -} - -/** - * dmaengine_terminate_sync() - Terminate all active DMA transfers - * @chan: The channel for which to terminate the transfers - * - * Calling this function will terminate all active and pending transfers - * that have previously been submitted to the channel. It is similar to - * dmaengine_terminate_async() but guarantees that the DMA transfer has actually - * stopped and that all complete callbacks have finished running when the - * function returns. - * - * This function must only be called from non-atomic context and must not be - * called from within a complete callback of a descriptor submitted on the same - * channel. - */ -static inline int dmaengine_terminate_sync(struct dma_chan *chan) -{ - int ret; - - ret = dmaengine_terminate_async(chan); - if (ret) - return ret; - - dmaengine_synchronize(chan); - - return 0; -} - -static inline int dmaengine_pause(struct dma_chan *chan) -{ - if (chan->device->device_pause) - return chan->device->device_pause(chan); - - return -ENOSYS; -} - -static inline int dmaengine_resume(struct dma_chan *chan) -{ - if (chan->device->device_resume) - return chan->device->device_resume(chan); - - return -ENOSYS; -} - -static inline enum dma_status dmaengine_tx_status(struct dma_chan *chan, - dma_cookie_t cookie, struct dma_tx_state *state) -{ - return chan->device->device_tx_status(chan, cookie, state); -} - -static inline dma_cookie_t dmaengine_submit(struct dma_async_tx_descriptor *desc) -{ - return desc->tx_submit(desc); -} - -static inline bool dmaengine_check_align(enum dmaengine_alignment align, - size_t off1, size_t off2, size_t len) -{ - return !(((1 << align) - 1) & (off1 | off2 | len)); -} - -static inline bool is_dma_copy_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->copy_align, off1, off2, len); -} - -static inline bool is_dma_xor_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->xor_align, off1, off2, len); -} - -static inline bool is_dma_pq_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->pq_align, off1, off2, len); -} - -static inline bool is_dma_fill_aligned(struct dma_device *dev, size_t off1, - size_t off2, size_t len) -{ - return dmaengine_check_align(dev->fill_align, off1, off2, len); -} - -static inline void -dma_set_maxpq(struct dma_device *dma, int maxpq, int has_pq_continue) -{ - dma->max_pq = maxpq; - if (has_pq_continue) - dma->max_pq |= DMA_HAS_PQ_CONTINUE; -} - -static inline bool dmaf_continue(enum dma_ctrl_flags flags) -{ - return (flags & DMA_PREP_CONTINUE) == DMA_PREP_CONTINUE; -} - -static inline bool dmaf_p_disabled_continue(enum dma_ctrl_flags flags) -{ - enum dma_ctrl_flags mask = DMA_PREP_CONTINUE | DMA_PREP_PQ_DISABLE_P; - - return (flags & mask) == mask; -} - -static inline bool dma_dev_has_pq_continue(struct dma_device *dma) -{ - return (dma->max_pq & DMA_HAS_PQ_CONTINUE) == DMA_HAS_PQ_CONTINUE; -} - -static inline unsigned short dma_dev_to_maxpq(struct dma_device *dma) -{ - return dma->max_pq & ~DMA_HAS_PQ_CONTINUE; -} - -/* dma_maxpq - reduce maxpq in the face of continued operations - * @dma - dma device with PQ capability - * @flags - to check if DMA_PREP_CONTINUE and DMA_PREP_PQ_DISABLE_P are set - * - * When an engine does not support native continuation we need 3 extra - * source slots to reuse P and Q with the following coefficients: - * 1/ {00} * P : remove P from Q', but use it as a source for P' - * 2/ {01} * Q : use Q to continue Q' calculation - * 3/ {00} * Q : subtract Q from P' to cancel (2) - * - * In the case where P is disabled we only need 1 extra source: - * 1/ {01} * Q : use Q to continue Q' calculation - */ -static inline int dma_maxpq(struct dma_device *dma, enum dma_ctrl_flags flags) -{ - if (dma_dev_has_pq_continue(dma) || !dmaf_continue(flags)) - return dma_dev_to_maxpq(dma); - if (dmaf_p_disabled_continue(flags)) - return dma_dev_to_maxpq(dma) - 1; - if (dmaf_continue(flags)) - return dma_dev_to_maxpq(dma) - 3; - BUG(); -} - -static inline size_t dmaengine_get_icg(bool inc, bool sgl, size_t icg, - size_t dir_icg) -{ - if (inc) { - if (dir_icg) - return dir_icg; - if (sgl) - return icg; - } - - return 0; -} - -static inline size_t dmaengine_get_dst_icg(struct dma_interleaved_template *xt, - struct data_chunk *chunk) -{ - return dmaengine_get_icg(xt->dst_inc, xt->dst_sgl, - chunk->icg, chunk->dst_icg); -} - -static inline size_t dmaengine_get_src_icg(struct dma_interleaved_template *xt, - struct data_chunk *chunk) -{ - return dmaengine_get_icg(xt->src_inc, xt->src_sgl, - chunk->icg, chunk->src_icg); -} - -/* --- public DMA engine API --- */ - -#ifdef CONFIG_DMA_ENGINE -void dmaengine_get(void); -void dmaengine_put(void); -#else -static inline void dmaengine_get(void) -{ -} -static inline void dmaengine_put(void) -{ -} -#endif - -#ifdef CONFIG_ASYNC_TX_DMA -#define async_dmaengine_get() dmaengine_get() -#define async_dmaengine_put() dmaengine_put() -#ifndef CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH -#define async_dma_find_channel(type) dma_find_channel(DMA_ASYNC_TX) -#else -#define async_dma_find_channel(type) dma_find_channel(type) -#endif /* CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH */ -#else -static inline void async_dmaengine_get(void) -{ -} -static inline void async_dmaengine_put(void) -{ -} -static inline struct dma_chan * -async_dma_find_channel(enum dma_transaction_type type) -{ - return NULL; -} -#endif /* CONFIG_ASYNC_TX_DMA */ -void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx, - struct dma_chan *chan); - -static inline void async_tx_ack(struct dma_async_tx_descriptor *tx) -{ - tx->flags |= DMA_CTRL_ACK; -} - -static inline void async_tx_clear_ack(struct dma_async_tx_descriptor *tx) -{ - tx->flags &= ~DMA_CTRL_ACK; -} - -static inline bool async_tx_test_ack(struct dma_async_tx_descriptor *tx) -{ - return (tx->flags & DMA_CTRL_ACK) == DMA_CTRL_ACK; -} - -#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask)) -static inline void -__dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) -{ - set_bit(tx_type, dstp->bits); -} - -#define dma_cap_clear(tx, mask) __dma_cap_clear((tx), &(mask)) -static inline void -__dma_cap_clear(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp) -{ - clear_bit(tx_type, dstp->bits); -} - -#define dma_cap_zero(mask) __dma_cap_zero(&(mask)) -static inline void __dma_cap_zero(dma_cap_mask_t *dstp) -{ - bitmap_zero(dstp->bits, DMA_TX_TYPE_END); -} - -#define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask)) -static inline int -__dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp) -{ - return test_bit(tx_type, srcp->bits); -} - -#define for_each_dma_cap_mask(cap, mask) \ - for_each_set_bit(cap, mask.bits, DMA_TX_TYPE_END) - -/** - * dma_async_issue_pending - flush pending transactions to HW - * @chan: target DMA channel - * - * This allows drivers to push copies to HW in batches, - * reducing MMIO writes where possible. - */ -static inline void dma_async_issue_pending(struct dma_chan *chan) -{ - chan->device->device_issue_pending(chan); -} - -/** - * dma_async_is_tx_complete - poll for transaction completion - * @chan: DMA channel - * @cookie: transaction identifier to check status of - * @last: returns last completed cookie, can be NULL - * @used: returns last issued cookie, can be NULL - * - * If @last and @used are passed in, upon return they reflect the driver - * internal state and can be used with dma_async_is_complete() to check - * the status of multiple cookies without re-checking hardware state. - */ -static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan, - dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used) -{ - struct dma_tx_state state; - enum dma_status status; - - status = chan->device->device_tx_status(chan, cookie, &state); - if (last) - *last = state.last; - if (used) - *used = state.used; - return status; -} - -/** - * dma_async_is_complete - test a cookie against chan state - * @cookie: transaction identifier to test status of - * @last_complete: last know completed transaction - * @last_used: last cookie value handed out - * - * dma_async_is_complete() is used in dma_async_is_tx_complete() - * the test logic is separated for lightweight testing of multiple cookies - */ -static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie, - dma_cookie_t last_complete, dma_cookie_t last_used) -{ - if (last_complete <= last_used) { - if ((cookie <= last_complete) || (cookie > last_used)) - return DMA_COMPLETE; - } else { - if ((cookie <= last_complete) && (cookie > last_used)) - return DMA_COMPLETE; - } - return DMA_IN_PROGRESS; -} - -static inline void -dma_set_tx_state(struct dma_tx_state *st, dma_cookie_t last, dma_cookie_t used, u32 residue) -{ - if (!st) - return; - - st->last = last; - st->used = used; - st->residue = residue; -} - -#ifdef CONFIG_DMA_ENGINE -struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type); -enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie); -enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx); -void dma_issue_pending_all(void); -struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, - dma_filter_fn fn, void *fn_param, - struct device_node *np); - -struct dma_chan *dma_request_chan(struct device *dev, const char *name); -struct dma_chan *dma_request_chan_by_mask(const dma_cap_mask_t *mask); - -void dma_release_channel(struct dma_chan *chan); -int dma_get_slave_caps(struct dma_chan *chan, struct dma_slave_caps *caps); -#else -static inline struct dma_chan *dma_find_channel(enum dma_transaction_type tx_type) -{ - return NULL; -} -static inline enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie) -{ - return DMA_COMPLETE; -} -static inline enum dma_status dma_wait_for_async_tx(struct dma_async_tx_descriptor *tx) -{ - return DMA_COMPLETE; -} -static inline void dma_issue_pending_all(void) -{ -} -static inline struct dma_chan *__dma_request_channel(const dma_cap_mask_t *mask, - dma_filter_fn fn, - void *fn_param, - struct device_node *np) -{ - return NULL; -} -static inline struct dma_chan *dma_request_chan(struct device *dev, - const char *name) -{ - return ERR_PTR(-ENODEV); -} -static inline struct dma_chan *dma_request_chan_by_mask( - const dma_cap_mask_t *mask) -{ - return ERR_PTR(-ENODEV); -} -static inline void dma_release_channel(struct dma_chan *chan) -{ -} -static inline int dma_get_slave_caps(struct dma_chan *chan, - struct dma_slave_caps *caps) -{ - return -ENXIO; -} -#endif - -static inline int dmaengine_desc_set_reuse(struct dma_async_tx_descriptor *tx) -{ - struct dma_slave_caps caps; - int ret; - - ret = dma_get_slave_caps(tx->chan, &caps); - if (ret) - return ret; - - if (!caps.descriptor_reuse) - return -EPERM; - - tx->flags |= DMA_CTRL_REUSE; - return 0; -} - -static inline void dmaengine_desc_clear_reuse(struct dma_async_tx_descriptor *tx) -{ - tx->flags &= ~DMA_CTRL_REUSE; -} - -static inline bool dmaengine_desc_test_reuse(struct dma_async_tx_descriptor *tx) -{ - return (tx->flags & DMA_CTRL_REUSE) == DMA_CTRL_REUSE; -} - -static inline int dmaengine_desc_free(struct dma_async_tx_descriptor *desc) -{ - /* this is supported for reusable desc, so check that */ - if (!dmaengine_desc_test_reuse(desc)) - return -EPERM; - - return desc->desc_free(desc); -} - -/* --- DMA device --- */ - -int dma_async_device_register(struct dma_device *device); -int dmaenginem_async_device_register(struct dma_device *device); -void dma_async_device_unregister(struct dma_device *device); -int dma_async_device_channel_register(struct dma_device *device, - struct dma_chan *chan); -void dma_async_device_channel_unregister(struct dma_device *device, - struct dma_chan *chan); -void dma_run_dependencies(struct dma_async_tx_descriptor *tx); -#define dma_request_channel(mask, x, y) \ - __dma_request_channel(&(mask), x, y, NULL) - -/* Deprecated, please use dma_request_chan() directly */ -static inline struct dma_chan * __deprecated -dma_request_slave_channel(struct device *dev, const char *name) -{ - struct dma_chan *ch = dma_request_chan(dev, name); - - return IS_ERR(ch) ? NULL : ch; -} - -static inline struct dma_chan -*dma_request_slave_channel_compat(const dma_cap_mask_t mask, - dma_filter_fn fn, void *fn_param, - struct device *dev, const char *name) -{ - struct dma_chan *chan; - - chan = dma_request_slave_channel(dev, name); - if (chan) - return chan; - - if (!fn || !fn_param) - return NULL; - - return __dma_request_channel(&mask, fn, fn_param, NULL); -} - -static inline char * -dmaengine_get_direction_text(enum dma_transfer_direction dir) -{ - switch (dir) { - case DMA_DEV_TO_MEM: - return "DEV_TO_MEM"; - case DMA_MEM_TO_DEV: - return "MEM_TO_DEV"; - case DMA_MEM_TO_MEM: - return "MEM_TO_MEM"; - case DMA_DEV_TO_DEV: - return "DEV_TO_DEV"; - default: - return "invalid"; - } -} - -static inline struct device *dmaengine_get_dma_device(struct dma_chan *chan) -{ - if (chan->dev->chan_dma_dev) - return &chan->dev->device; - - return chan->device->dev; -} - -#endif /* DMAENGINE_H */ |