1 files changed, 97 insertions, 0 deletions
diff --git a/snd-alpx-dkms/snd-alpx/alpx_variants_common.h b/snd-alpx-dkms/snd-alpx/alpx_variants_common.h
new file mode 100644
index 0000000..ef33e55
--- /dev/null
+++ b/snd-alpx-dkms/snd-alpx/alpx_variants_common.h
@@ -0,0 +1,97 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+*  Support for Digigram AlpX PCI-e boards
+*
+*  Copyright (c) 2024 Digigram Digital (info@digigram.com)
+*/
+
+#ifndef _ALPX_VARIANTS_COMMON_H_
+#define _ALPX_VARIANTS_COMMON_H_
+
+#include "alpx.h"
+#include "alpx_reg.h"
+
+#include <sound/tlv.h>
+#include <linux/sizes.h>
+
+/** Common parts **/
+
+/* Flash Partitions with USER access mode rules*/
+static struct mtd_partition alpx_mtd_partitions[ALPX_FLASH_PARTITION_QTY] __attribute__((unused)) = {
+	/* golden */
+	{
+		.name	= "golden",
+		.offset	= 0x000000,
+		.size	= 0x400000,
+	},
+	/* user firmware */
+	{
+		.name	= "fw-user-updatable",
+		.offset	= 0x400000,
+		.size	= 0x218000,
+	},
+	/* initial configuration */
+	{
+		.name	= "init-config",
+		.offset	= 0x400000 + 0x218000,
+		.size	= 0x008000,
+	},
+	/* user configuration */
+	{
+		.name	= "user-config",
+		.offset	= 0x400000 + 0x218000 + 0x008000,
+		.size	= 0x008000,
+	},
+	/* PRODUCTION : last area on flash, but keep it here to be the one before last partition*/
+	{
+		.name	= "production",
+		.offset	= 0x400000 + 0x218000 + 0x008000 + 0x008000,
+		.size	= 0x008000, /* Limited size : this is enough instead of remaining Flash which is 0x1D8000 bytes*/
+	}
+};
+
+static struct mtd_partition alpx_dead_mtd_partitions[ALPX_DEAD_FLASH_PARTITION_QTY] __attribute__((unused)) = {
+	/* GOLDEN Prod */
+	{
+		.name	= "golden-prod",
+		.offset	= ALPxxx_FLASH_GOLDEN_PRODUCTION_BASE,
+		.size	= 0x008000,
+	},
+	/* PRODUCTION : last area on flash, but keep it here to be the one before last partition*/
+	{
+		.name	= "production",
+		.offset	= 0x400000 + 0x218000 + 0x008000 + 0x008000,
+		.size	= 0x008000, /* Limited size : this is enough instead of remaining Flash which is 0x1D8000 bytes*/
+	}
+};
+
+/* Common clock controls */
+static const char* alpxxx_control_choice_current_clk_values_entries[ALPxxx_CLK_MANAGER_CLK_VALUES_QTY] __attribute__((unused)) = {
+	"8kHz", "11.025kHz", "16kHz","22.05kHz", "24kHz", "32kHz", "44.1kHz", "48kHz", "64kHz", "88.2kHz",
+	"96kHz", "128kHz", "176,4kHz","192kHz"
+};
+/* Same order than the constant values above */
+static u32 alpxxx_control_choice_current_clk_values_entries_values[ALPxxx_CLK_MANAGER_CLK_VALUES_QTY] __attribute__((unused)) = {
+ALPxxx_CLK_MANAGER_CLK_VALUE_8K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_11_025K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_16K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_22_05K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_24K,	
+ALPxxx_CLK_MANAGER_CLK_VALUE_32K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_44_1K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_48K,	
+ALPxxx_CLK_MANAGER_CLK_VALUE_64K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_88_2K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_96K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_128K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_176_4K,
+ALPxxx_CLK_MANAGER_CLK_VALUE_192K ,
+};
+
+/* Digital channels gains scale */
+
+static const DECLARE_TLV_DB_MINMAX_MUTE(alpxxx_line_digital_gains_scale, 
+										ALP_AMPLIFIER_GAIN_MIN_cdB, ALP_AMPLIFIER_GAIN_MAX_cdB);
+
+
+#endif /* _ALPX_VARIANTS_COMMON_H_ */