From e540c2f827bd7c81915b00000e440d91b450b034 Mon Sep 17 00:00:00 2001 From: Christian Pointner Date: Thu, 8 May 2025 19:45:06 +0200 Subject: snd-pcxhr: split package up into dkms source and firmware diff --git a/snd-pcxhr-dkms/debian/changelog b/snd-pcxhr-dkms/debian/changelog deleted file mode 100644 index 625424f..0000000 --- a/snd-pcxhr-dkms/debian/changelog +++ /dev/null @@ -1,6 +0,0 @@ -snd-pcxhr-dkms (2.0.13-1) unstable; urgency=medium - - * import base version from https://github.com/Digigram-audio/pcxhr - * add patches to fix build for bookworm - - -- Christian Pointner Thu, 27 Mar 2025 20:24:47 +0100 diff --git a/snd-pcxhr-dkms/debian/control b/snd-pcxhr-dkms/debian/control deleted file mode 100644 index 238914e..0000000 --- a/snd-pcxhr-dkms/debian/control +++ /dev/null @@ -1,13 +0,0 @@ -Source: snd-pcxhr-dkms -Section: kernel -Priority: optional -Maintainer: Christian Pointner -Build-Depends: debhelper-compat (= 13), - dh-sequence-dkms, -Standards-Version: 4.6.0 -Rules-Requires-Root: no - -Package: snd-pcxhr-dkms -Architecture: all -Depends: ${shlibs:Depends}, ${misc:Depends} -Description: ALSA Driver for Digigram VX/PCX cards diff --git a/snd-pcxhr-dkms/debian/rules b/snd-pcxhr-dkms/debian/rules deleted file mode 100755 index 19cc092..0000000 --- a/snd-pcxhr-dkms/debian/rules +++ /dev/null @@ -1,18 +0,0 @@ -#!/usr/bin/make -f - -include /usr/share/dpkg/pkg-info.mk - -%: - dh $@ --with dkms - -override_dh_install: - dh_install src/* usr/src/snd-pcxhr-$(DEB_VERSION_UPSTREAM)/ - -override_dh_dkms: - dh_dkms -V $(DEB_VERSION_UPSTREAM) -- src/dkms.conf - -override_dh_auto_configure: -override_dh_auto_build: -override_dh_auto_test: -override_dh_auto_install: -override_dh_auto_clean: diff --git a/snd-pcxhr-dkms/debian/source/format b/snd-pcxhr-dkms/debian/source/format deleted file mode 100644 index d3827e7..0000000 --- a/snd-pcxhr-dkms/debian/source/format +++ /dev/null @@ -1 +0,0 @@ -1.0 diff --git a/snd-pcxhr-dkms/src/Makefile b/snd-pcxhr-dkms/src/Makefile deleted file mode 100644 index 4d0bcf8..0000000 --- a/snd-pcxhr-dkms/src/Makefile +++ /dev/null @@ -1,50 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -snd-pcxhr-y := pcxhr.o pcxhr_hwdep.o pcxhr_mixer.o pcxhr_core.o pcxhr_mix22.o pcxhr_hrtimer.o -# pcxhr_clock_monitoring.o -obj-$(CONFIG_SND_PCXHR) += snd-pcxhr.o - -# KVERSION is the kernel version -# If not defined, it is set to the current kernel version -KVERSION ?= $(shell uname -r) - -# KDIR is the location of the kernel source. The current standard is -# to link to the associated source tree from the directory containing -# the compiled modules. -KDIR := /lib/modules/$(KVERSION)/build - -# PWD is the current working directory and the location of our module -# source files. -PWD := $(shell pwd) - -# Set CFLAGS according to the needs -#Activate sound logs -#CFLAGS_MODULE += -DCONFIG_SND_DEBUG_VERBOSE - -MODULES_DIR := /lib/modules/$(shell uname -r)/digigram -# default is the default make target. The rule here says to run make -# with a working directory of the directory containing the kernel -# source and compile only the modules in the PWD (local) directory. -default: - $(MAKE) -C $(KDIR) M=$(PWD) modules - -all: clean default install-firmwares - -clean: - $(MAKE) -C $(KDIR) M=$(PWD) clean - -install-firmwares: - test ! -d /lib/firmware/pcxhr/firmware || rm -Rf /lib/firmware/pcxhr/firmware - test -d /lib/firmware/pcxhr || mkdir /lib/firmware/pcxhr/ - cp -Rf ./firmware/* /lib/firmware/pcxhr/ - -update-firmware: - test ! -d /lib/firmware/pcxhr || mkdir /lib/firmware/pcxhr/ - cp ./firmware/dspe924e5.e56 /lib/firmware/pcxhr/ - -install: - test -d $(MODULES_DIR) || mkdir $(MODULES_DIR) - cp *.ko /lib/modules/$(shell uname -r)/digigram - depmod -ae - - -.PHONY: default all clean install-firmwares update-firmware install diff --git a/snd-pcxhr-dkms/src/dkms.conf b/snd-pcxhr-dkms/src/dkms.conf deleted file mode 100644 index e43bdfb..0000000 --- a/snd-pcxhr-dkms/src/dkms.conf +++ /dev/null @@ -1,8 +0,0 @@ -PACKAGE_NAME="snd-pcxhr" -PACKAGE_VERSION="2.0.13" -CLEAN="make clean" -MAKE[0]="make all KVERSION=$kernelver" -BUILT_MODULE_NAME[0]="snd-pcxhr" -DEST_MODULE_NAME[0]="snd-pcxhr-ng" -DEST_MODULE_LOCATION[0]="/updates" -AUTOINSTALL="yes" diff --git a/snd-pcxhr-dkms/src/firmware/b321_512.b56 b/snd-pcxhr-dkms/src/firmware/b321_512.b56 deleted file mode 100644 index 3e82688..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/b321_512.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/d321_512.d56 b/snd-pcxhr-dkms/src/firmware/d321_512.d56 deleted file mode 100644 index 9531b2c..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/d321_512.d56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspb1222e.b56 b/snd-pcxhr-dkms/src/firmware/dspb1222e.b56 deleted file mode 100644 index 8ec982e..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspb1222e.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspb1222hr.b56 b/snd-pcxhr-dkms/src/firmware/dspb1222hr.b56 deleted file mode 100644 index 068390a..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspb1222hr.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspb882e.b56 b/snd-pcxhr-dkms/src/firmware/dspb882e.b56 deleted file mode 100644 index 39e6621..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspb882e.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspb882hr.b56 b/snd-pcxhr-dkms/src/firmware/dspb882hr.b56 deleted file mode 100644 index edcac1e..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspb882hr.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspb924.b56 b/snd-pcxhr-dkms/src/firmware/dspb924.b56 deleted file mode 100644 index 1c5b415..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspb924.b56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspd1222.d56 b/snd-pcxhr-dkms/src/firmware/dspd1222.d56 deleted file mode 100644 index 66f8e83..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspd1222.d56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspd222.d56 b/snd-pcxhr-dkms/src/firmware/dspd222.d56 deleted file mode 100644 index 27b3a9a..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspd222.d56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspd882.d56 b/snd-pcxhr-dkms/src/firmware/dspd882.d56 deleted file mode 100644 index 6d46f0f..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspd882.d56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspe882.e56 b/snd-pcxhr-dkms/src/firmware/dspe882.e56 deleted file mode 100644 index 6289320..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspe882.e56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspe924.e56 b/snd-pcxhr-dkms/src/firmware/dspe924.e56 deleted file mode 100644 index 1448af7..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspe924.e56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/dspe924e5.e56 b/snd-pcxhr-dkms/src/firmware/dspe924e5.e56 deleted file mode 100644 index 6858cf5..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/dspe924e5.e56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/e321_512.e56 b/snd-pcxhr-dkms/src/firmware/e321_512.e56 deleted file mode 100644 index 5a13498..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/e321_512.e56 and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xc_1_882.dat b/snd-pcxhr-dkms/src/firmware/xc_1_882.dat deleted file mode 100644 index 5ed6cd7..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xc_1_882.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xi_1_882.dat b/snd-pcxhr-dkms/src/firmware/xi_1_882.dat deleted file mode 100644 index 6329571..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xi_1_882.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc1222e.dat b/snd-pcxhr-dkms/src/firmware/xlxc1222e.dat deleted file mode 100644 index f6aac85..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc1222e.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc1222hr.dat b/snd-pcxhr-dkms/src/firmware/xlxc1222hr.dat deleted file mode 100644 index 21dabde..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc1222hr.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc222.dat b/snd-pcxhr-dkms/src/firmware/xlxc222.dat deleted file mode 100644 index f93a792..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc222.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc882e.dat b/snd-pcxhr-dkms/src/firmware/xlxc882e.dat deleted file mode 100644 index 8f88656..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc882e.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc882hr.dat b/snd-pcxhr-dkms/src/firmware/xlxc882hr.dat deleted file mode 100644 index d59dfe0..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc882hr.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxc924.dat b/snd-pcxhr-dkms/src/firmware/xlxc924.dat deleted file mode 100644 index ba3fc2f..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxc924.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/firmware/xlxint.dat b/snd-pcxhr-dkms/src/firmware/xlxint.dat deleted file mode 100644 index d57d0cd..0000000 Binary files a/snd-pcxhr-dkms/src/firmware/xlxint.dat and /dev/null differ diff --git a/snd-pcxhr-dkms/src/pcxhr.c b/snd-pcxhr-dkms/src/pcxhr.c deleted file mode 100644 index 0793e69..0000000 --- a/snd-pcxhr-dkms/src/pcxhr.c +++ /dev/null @@ -1,1813 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * main file with alsa callbacks - * - * Copyright (c) 2004 by Digigram - */ - - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#if (LINUX_VERSION_CODE > KERNEL_VERSION(3,7,0)) -#include -#else -#include -#endif - -#include -#include -#include -#include -#include -#include -#include "pcxhr.h" -#include "pcxhr_mixer.h" -#include "pcxhr_hwdep.h" -#include "pcxhr_core.h" -#include "pcxhr_mix22.h" - -#define DRIVER_NAME "pcxhr" - - -MODULE_AUTHOR("Gilbert Passador , " - "Loïc Boissy "); -MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING); -MODULE_LICENSE("GPL"); - -static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ -static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ -static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ -static bool mono[SNDRV_CARDS]; /* capture mono only */ - -module_param_array(index, int, NULL, 0444); -MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard"); -module_param_array(id, charp, NULL, 0444); -MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard"); -module_param_array(enable, bool, NULL, 0444); -MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard"); -module_param_array(mono, bool, NULL, 0444); -MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)"); - -enum { - PCI_ID_VX882HR, - PCI_ID_PCX882HR, - PCI_ID_VX881HR, - PCI_ID_PCX881HR, - PCI_ID_VX882E, - PCI_ID_PCX882E, - PCI_ID_VX881E, - PCI_ID_PCX881E, - PCI_ID_VX1222HR, - PCI_ID_PCX1222HR, - PCI_ID_VX1221HR, - PCI_ID_PCX1221HR, - PCI_ID_VX1222E, - PCI_ID_PCX1222E, - PCI_ID_VX1221E, - PCI_ID_PCX1221E, - PCI_ID_VX222HR, - PCI_ID_VX222E, - PCI_ID_PCX22HR, - PCI_ID_PCX22E, - PCI_ID_VX222HRMIC, - PCI_ID_VX222E_MIC, - PCI_ID_PCX924HR, - PCI_ID_PCX924E, - PCI_ID_PCX924HRMIC, - PCI_ID_PCX924E_MIC, - PCI_ID_VX442HR, - PCI_ID_PCX442HR, - PCI_ID_VX442E, - PCI_ID_PCX442E, - PCI_ID_VX822HR, - PCI_ID_PCX822HR, - PCI_ID_VX822E, - PCI_ID_PCX822E, - PCI_ID_VX222E_IE5, - PCI_ID_PCX924E_IE5, - PCI_ID_VX222E_MIC_IE5, - PCI_ID_PCX22E_IE5, - PCI_ID_PCX924E_MIC_IE5, - PCI_ID_VX222E_IE7, - PCI_ID_PCX924E_IE7, - PCI_ID_VX222E_MIC_IE7, - PCI_ID_PCX22E_IE7, - PCI_ID_PCX924E_MIC_IE7, - PCI_ID_LAST -}; - -static const struct pci_device_id pcxhr_ids[] = { - { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, }, - { 0x10b5, 0x9056, 0x1369, 0xb021, 0, 0, PCI_ID_VX882E, }, - { 0x10b5, 0x9056, 0x1369, 0xb121, 0, 0, PCI_ID_PCX882E, }, - { 0x10b5, 0x9056, 0x1369, 0xb221, 0, 0, PCI_ID_VX881E, }, - { 0x10b5, 0x9056, 0x1369, 0xb321, 0, 0, PCI_ID_PCX881E, }, - { 0x10b5, 0x9656, 0x1369, 0xb401, 0, 0, PCI_ID_VX1222HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb601, 0, 0, PCI_ID_VX1221HR, }, - { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, - { 0x10b5, 0x9056, 0x1369, 0xb421, 0, 0, PCI_ID_VX1222E, }, - { 0x10b5, 0x9056, 0x1369, 0xb521, 0, 0, PCI_ID_PCX1222E, }, - { 0x10b5, 0x9056, 0x1369, 0xb621, 0, 0, PCI_ID_VX1221E, }, - { 0x10b5, 0x9056, 0x1369, 0xb721, 0, 0, PCI_ID_PCX1221E, }, - { 0x10b5, 0x9056, 0x1369, 0xba01, 0, 0, PCI_ID_VX222HR, }, - { 0x10b5, 0x9056, 0x1369, 0xba21, 0, 0, PCI_ID_VX222E, }, - { 0x10b5, 0x9056, 0x1369, 0xbd01, 0, 0, PCI_ID_PCX22HR, }, - { 0x10b5, 0x9056, 0x1369, 0xbd21, 0, 0, PCI_ID_PCX22E, }, - { 0x10b5, 0x9056, 0x1369, 0xbc01, 0, 0, PCI_ID_VX222HRMIC, }, - { 0x10b5, 0x9056, 0x1369, 0xbc21, 0, 0, PCI_ID_VX222E_MIC, }, - { 0x10b5, 0x9056, 0x1369, 0xbb01, 0, 0, PCI_ID_PCX924HR, }, - { 0x10b5, 0x9056, 0x1369, 0xbb21, 0, 0, PCI_ID_PCX924E, }, - { 0x10b5, 0x9056, 0x1369, 0xbf01, 0, 0, PCI_ID_PCX924HRMIC, }, - { 0x10b5, 0x9056, 0x1369, 0xbf21, 0, 0, PCI_ID_PCX924E_MIC, }, - { 0x10b5, 0x9656, 0x1369, 0xd001, 0, 0, PCI_ID_VX442HR, }, - { 0x10b5, 0x9656, 0x1369, 0xd101, 0, 0, PCI_ID_PCX442HR, }, - { 0x10b5, 0x9056, 0x1369, 0xd021, 0, 0, PCI_ID_VX442E, }, - { 0x10b5, 0x9056, 0x1369, 0xd121, 0, 0, PCI_ID_PCX442E, }, - { 0x10b5, 0x9656, 0x1369, 0xd201, 0, 0, PCI_ID_VX822HR, }, - { 0x10b5, 0x9656, 0x1369, 0xd301, 0, 0, PCI_ID_PCX822HR, }, - { 0x10b5, 0x9056, 0x1369, 0xd221, 0, 0, PCI_ID_VX822E, }, - { 0x10b5, 0x9056, 0x1369, 0xd321, 0, 0, PCI_ID_PCX822E, }, - { 0x10b5, 0x9056, 0x1369, 0xba41, 0, 0, PCI_ID_VX222E_IE5, }, - { 0x10b5, 0x9056, 0x1369, 0xbb41, 0, 0, PCI_ID_PCX924E_IE5, }, - { 0x10b5, 0x9056, 0x1369, 0xbc41, 0, 0, PCI_ID_VX222E_MIC_IE5, }, - { 0x10b5, 0x9056, 0x1369, 0xbd41, 0, 0, PCI_ID_PCX22E_IE5, }, - { 0x10b5, 0x9056, 0x1369, 0xbf41, 0, 0, PCI_ID_PCX924E_MIC_IE5, }, - { 0x10b5, 0x9056, 0x1369, 0xba61, 0, 0, PCI_ID_VX222E_IE7, }, - { 0x10b5, 0x9056, 0x1369, 0xbb61, 0, 0, PCI_ID_PCX924E_IE7, }, - { 0x10b5, 0x9056, 0x1369, 0xbc61, 0, 0, PCI_ID_VX222E_MIC_IE7, }, - { 0x10b5, 0x9056, 0x1369, 0xbd61, 0, 0, PCI_ID_PCX22E_IE7, }, - { 0x10b5, 0x9056, 0x1369, 0xbf61, 0, 0, PCI_ID_PCX924E_MIC_IE7, }, - { 0, } -}; - -MODULE_DEVICE_TABLE(pci, pcxhr_ids); - -struct board_parameters { - char* board_name; - short playback_chips; - short capture_chips; - short fw_file_set; - short firmware_num; -}; -static const struct board_parameters pcxhr_board_params[] = { -[PCI_ID_VX882HR] = { "VX882HR", 4, 4, 0, 41 }, -[PCI_ID_PCX882HR] = { "PCX882HR", 4, 4, 0, 41 }, -[PCI_ID_VX881HR] = { "VX881HR", 4, 4, 0, 41 }, -[PCI_ID_PCX881HR] = { "PCX881HR", 4, 4, 0, 41 }, -[PCI_ID_VX882E] = { "VX882e", 4, 4, 1, 41 }, -[PCI_ID_PCX882E] = { "PCX882e", 4, 4, 1, 41 }, -[PCI_ID_VX881E] = { "VX881e", 4, 4, 1, 41 }, -[PCI_ID_PCX881E] = { "PCX881e", 4, 4, 1, 41 }, -[PCI_ID_VX1222HR] = { "VX1222HR", 6, 1, 2, 42 }, -[PCI_ID_PCX1222HR] = { "PCX1222HR", 6, 1, 2, 42 }, -[PCI_ID_VX1221HR] = { "VX1221HR", 6, 1, 2, 42 }, -[PCI_ID_PCX1221HR] = { "PCX1221HR", 6, 1, 2, 42 }, -[PCI_ID_VX1222E] = { "VX1222e", 6, 1, 3, 42 }, -[PCI_ID_PCX1222E] = { "PCX1222e", 6, 1, 3, 42 }, -[PCI_ID_VX1221E] = { "VX1221e", 6, 1, 3, 42 }, -[PCI_ID_PCX1221E] = { "PCX1221e", 6, 1, 3, 42 }, -[PCI_ID_VX222HR] = { "VX222HR", 1, 1, 4, 44 }, -[PCI_ID_VX222E] = { "VX222e", 1, 1, 4, 44 }, -[PCI_ID_PCX22HR] = { "PCX22HR", 1, 0, 4, 44 }, -[PCI_ID_PCX22E] = { "PCX22e", 1, 0, 4, 44 }, -[PCI_ID_VX222HRMIC] = { "VX222HR-Mic", 1, 1, 5, 44 }, -[PCI_ID_VX222E_MIC] = { "VX222e-Mic", 1, 1, 5, 44 }, -[PCI_ID_PCX924HR] = { "PCX924HR", 1, 1, 5, 44 }, -[PCI_ID_PCX924E] = { "PCX924e", 1, 1, 5, 44 }, -[PCI_ID_PCX924HRMIC] = { "PCX924HR-Mic", 1, 1, 5, 44 }, -[PCI_ID_PCX924E_MIC] = { "PCX924e-Mic", 1, 1, 5, 44 }, -[PCI_ID_VX442HR] = { "VX442HR", 2, 2, 0, 41 }, -[PCI_ID_PCX442HR] = { "PCX442HR", 2, 2, 0, 41 }, -[PCI_ID_VX442E] = { "VX442e", 2, 2, 1, 41 }, -[PCI_ID_PCX442E] = { "PCX442e", 2, 2, 1, 41 }, -[PCI_ID_VX822HR] = { "VX822HR", 4, 1, 2, 42 }, -[PCI_ID_PCX822HR] = { "PCX822HR", 4, 1, 2, 42 }, -[PCI_ID_VX822E] = { "VX822e", 4, 1, 3, 42 }, -[PCI_ID_PCX822E] = { "PCX822e", 4, 1, 3, 42 }, -[PCI_ID_VX222E_IE5] = { "VX222e", 1, 1, 6, 44 }, -[PCI_ID_PCX924E_IE5] = { "PCX924e", 1, 1, 7, 44 }, -[PCI_ID_VX222E_MIC_IE5] = { "VX222e-Mic", 1, 1, 7, 44 }, -[PCI_ID_PCX22E_IE5] = { "PCX22e", 1, 0, 6, 44 }, -[PCI_ID_PCX924E_MIC_IE5] = { "PCX924e-Mic", 1, 1, 7, 44 }, -[PCI_ID_VX222E_IE7] = { "VX222e", 1, 1, 6, 44 }, -[PCI_ID_PCX924E_IE7] = { "PCX924e", 1, 1, 7, 44 }, -[PCI_ID_VX222E_MIC_IE7] = { "VX222e-Mic", 1, 1, 7, 44 }, -[PCI_ID_PCX22E_IE7] = { "PCX22e", 1, 0, 6, 44 }, -[PCI_ID_PCX924E_MIC_IE7] = { "PCX924e-Mic", 1, 1, 7, 44 }, -}; - -/* boards without hw AES1 and SRC onboard are all using fw_file_set==4 */ -/* VX222HR, VX222e, PCX22HR and PCX22e */ -#define PCXHR_BOARD_HAS_AES1(x) ((x->fw_file_set != 4) && (x->fw_file_set != 6)) -/* some boards do not support 192kHz on digital AES input plugs */ -#define PCXHR_BOARD_AESIN_NO_192K(x) ((x->capture_chips == 0) || \ - (x->fw_file_set == 0) || \ - (x->fw_file_set == 2)) - -static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, - unsigned int* realfreq) -{ - unsigned int reg; - - if (freq < 6900 || freq > 110000) - return -EINVAL; - reg = (28224000 * 2) / freq; - reg = (reg - 1) / 2; - if (reg < 0x200) - *pllreg = reg + 0x800; - else if (reg < 0x400) - *pllreg = reg & 0x1ff; - else if (reg < 0x800) { - *pllreg = ((reg >> 1) & 0x1ff) + 0x200; - reg &= ~1; - } else { - *pllreg = ((reg >> 2) & 0x1ff) + 0x400; - reg &= ~3; - } - if (realfreq) - *realfreq = (28224000 / (reg + 1)); - return 0; -} - - -#define PCXHR_FREQ_REG_MASK 0x1f -#define PCXHR_FREQ_QUARTZ_48000 0x00 -#define PCXHR_FREQ_QUARTZ_24000 0x01 -#define PCXHR_FREQ_QUARTZ_12000 0x09 -#define PCXHR_FREQ_QUARTZ_32000 0x08 -#define PCXHR_FREQ_QUARTZ_16000 0x04 -#define PCXHR_FREQ_QUARTZ_8000 0x0c -#define PCXHR_FREQ_QUARTZ_44100 0x02 -#define PCXHR_FREQ_QUARTZ_22050 0x0a -#define PCXHR_FREQ_QUARTZ_11025 0x06 -#define PCXHR_FREQ_PLL 0x05 -#define PCXHR_FREQ_QUARTZ_192000 0x10 -#define PCXHR_FREQ_QUARTZ_96000 0x18 -#define PCXHR_FREQ_QUARTZ_176400 0x14 -#define PCXHR_FREQ_QUARTZ_88200 0x1c -#define PCXHR_FREQ_QUARTZ_128000 0x12 -#define PCXHR_FREQ_QUARTZ_64000 0x1a - -#define PCXHR_FREQ_WORD_CLOCK 0x0f -#define PCXHR_FREQ_SYNC_AES 0x0e -#define PCXHR_FREQ_AES_1 0x07 -#define PCXHR_FREQ_AES_2 0x0b -#define PCXHR_FREQ_AES_3 0x03 -#define PCXHR_FREQ_AES_4 0x0d - -static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate, - unsigned int *reg, unsigned int *freq) -{ - unsigned int val, realfreq, pllreg; - struct pcxhr_rmh rmh; - int err; - - realfreq = rate; - switch (mgr->use_clock_type) { - case PCXHR_CLOCK_TYPE_INTERNAL : /* clock by quartz or pll */ - switch (rate) { - case 48000 : val = PCXHR_FREQ_QUARTZ_48000; break; - case 24000 : val = PCXHR_FREQ_QUARTZ_24000; break; - case 12000 : val = PCXHR_FREQ_QUARTZ_12000; break; - case 32000 : val = PCXHR_FREQ_QUARTZ_32000; break; - case 16000 : val = PCXHR_FREQ_QUARTZ_16000; break; - case 8000 : val = PCXHR_FREQ_QUARTZ_8000; break; - case 44100 : val = PCXHR_FREQ_QUARTZ_44100; break; - case 22050 : val = PCXHR_FREQ_QUARTZ_22050; break; - case 11025 : val = PCXHR_FREQ_QUARTZ_11025; break; - case 192000 : val = PCXHR_FREQ_QUARTZ_192000; break; - case 96000 : val = PCXHR_FREQ_QUARTZ_96000; break; - case 176400 : val = PCXHR_FREQ_QUARTZ_176400; break; - case 88200 : val = PCXHR_FREQ_QUARTZ_88200; break; - case 128000 : val = PCXHR_FREQ_QUARTZ_128000; break; - case 64000 : val = PCXHR_FREQ_QUARTZ_64000; break; - default : - val = PCXHR_FREQ_PLL; - /* get the value for the pll register */ - err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq); - if (err) - return err; - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd[0] |= IO_NUM_REG_GENCLK; - rmh.cmd[1] = pllreg & MASK_DSP_WORD; - rmh.cmd[2] = pllreg >> 24; - rmh.cmd_len = 3; - err = pcxhr_send_msg(mgr, &rmh); - if (err < 0) { - dev_err(&mgr->pci->dev, - "error CMD_ACCESS_IO_WRITE " - "for PLL register : %x!\n", err); - return err; - } - } - break; - case PCXHR_CLOCK_TYPE_WORD_CLOCK: - val = PCXHR_FREQ_WORD_CLOCK; - break; - case PCXHR_CLOCK_TYPE_AES_SYNC: - val = PCXHR_FREQ_SYNC_AES; - break; - case PCXHR_CLOCK_TYPE_AES_1: - val = PCXHR_FREQ_AES_1; - break; - case PCXHR_CLOCK_TYPE_AES_2: - val = PCXHR_FREQ_AES_2; - break; - case PCXHR_CLOCK_TYPE_AES_3: - val = PCXHR_FREQ_AES_3; - break; - case PCXHR_CLOCK_TYPE_AES_4: - val = PCXHR_FREQ_AES_4; - break; - default: - return -EINVAL; - } - *reg = val; - *freq = realfreq; - return 0; -} - - -static int pcxhr_sub_set_clock(struct pcxhr_mgr *mgr, - unsigned int rate, - int *changed) -{ - unsigned int val, realfreq, speed; - struct pcxhr_rmh rmh; - int err; - - err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq); - if (err) - return err; - - /* codec speed modes */ - if (rate < 55000) - speed = 0; /* single speed */ - else if (rate < 100000) - speed = 1; /* dual speed */ - else - speed = 2; /* quad speed */ - if (mgr->codec_speed != speed) { - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */ - rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; - if (DSP_EXT_CMD_SET(mgr)) { - rmh.cmd[1] = 1; - rmh.cmd_len = 2; - } - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */ - rmh.cmd[0] |= IO_NUM_SPEED_RATIO; - rmh.cmd[1] = speed; - rmh.cmd_len = 2; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - } - /* set the new frequency */ - dev_dbg(&mgr->pci->dev, "clock register : set %x\n", val); - err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, - val, changed); - if (err) - return err; - - mgr->sample_rate_real = realfreq; - mgr->cur_clock_type = mgr->use_clock_type; - - /* unmute after codec speed modes */ - if (mgr->codec_speed != speed) { - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */ - rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; - if (DSP_EXT_CMD_SET(mgr)) { - rmh.cmd[1] = 1; - rmh.cmd_len = 2; - } - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - mgr->codec_speed = speed; /* save new codec speed */ - } - - dev_dbg(&mgr->pci->dev, "%s to %dHz (realfreq=%d)\n", __func__, - rate, realfreq); - return 0; -} - -#define PCXHR_MODIFY_CLOCK_S_BIT 0x04 - -#define PCXHR_IRQ_TIMER_FREQ 92000 -#define PCXHR_IRQ_TIMER_PERIOD 48 - -int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate) -{ - struct pcxhr_rmh rmh; - int err, changed; - - if (rate == 0) - return 0; /* nothing to do */ - - if (mgr->is_hr_stereo) - err = hr222_sub_set_clock(mgr, rate, &changed); - else - err = pcxhr_sub_set_clock(mgr, rate, &changed); - - if (err) - return err; - - if (changed) { - pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK); - rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */ - if (rate < PCXHR_IRQ_TIMER_FREQ) - rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD; - else - rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2; - rmh.cmd[2] = rate; - rmh.cmd_len = 3; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - } - return 0; -} - - -static int pcxhr_sub_get_external_clock(struct pcxhr_mgr *mgr, - enum pcxhr_clock_type clock_type, - int *sample_rate) -{ - struct pcxhr_rmh rmh; - unsigned char reg; - int err, rate; - - switch (clock_type) { - case PCXHR_CLOCK_TYPE_WORD_CLOCK: - reg = REG_STATUS_WORD_CLOCK; - break; - case PCXHR_CLOCK_TYPE_AES_SYNC: - reg = REG_STATUS_AES_SYNC; - break; - case PCXHR_CLOCK_TYPE_AES_1: - reg = REG_STATUS_AES_1; - break; - case PCXHR_CLOCK_TYPE_AES_2: - reg = REG_STATUS_AES_2; - break; - case PCXHR_CLOCK_TYPE_AES_3: - reg = REG_STATUS_AES_3; - break; - case PCXHR_CLOCK_TYPE_AES_4: - reg = REG_STATUS_AES_4; - break; - default: - return -EINVAL; - } - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); - rmh.cmd_len = 2; - rmh.cmd[0] |= IO_NUM_REG_STATUS; - if (mgr->last_reg_stat != reg) { - rmh.cmd[1] = reg; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - udelay(100); /* wait minimum 2 sample_frames at 32kHz ! */ - mgr->last_reg_stat = reg; - } - rmh.cmd[1] = REG_STATUS_CURRENT; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - switch (rmh.stat[1] & 0x0f) { - case REG_STATUS_SYNC_32000 : rate = 32000; break; - case REG_STATUS_SYNC_44100 : rate = 44100; break; - case REG_STATUS_SYNC_48000 : rate = 48000; break; - case REG_STATUS_SYNC_64000 : rate = 64000; break; - case REG_STATUS_SYNC_88200 : rate = 88200; break; - case REG_STATUS_SYNC_96000 : rate = 96000; break; - case REG_STATUS_SYNC_128000 : rate = 128000; break; - case REG_STATUS_SYNC_176400 : rate = 176400; break; - case REG_STATUS_SYNC_192000 : rate = 192000; break; - default: rate = 0; - } - dev_dbg(&mgr->pci->dev, "External clock is at %d Hz\n", rate); - *sample_rate = rate; - return 0; -} - - -int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, - enum pcxhr_clock_type clock_type, - int *sample_rate) -{ - if (mgr->is_hr_stereo) - return hr222_get_external_clock(mgr, clock_type, - sample_rate); - else - return pcxhr_sub_get_external_clock(mgr, clock_type, - sample_rate); -} - -/* - * start or stop playback/capture substream - */ -static int pcxhr_set_stream_state(struct snd_pcxhr *chip, - struct pcxhr_stream *stream) -{ - int err; - struct pcxhr_rmh rmh; - int stream_mask, start; - - if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) - start = 1; - else { - if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) { - dev_err(chip->card->dev, - "%s CANNOT be stopped\n", __func__); - return -EINVAL; - } - start = 0; - } - if (!stream->substream) - return -EINVAL; - - stream->timer_abs_periods = 0; - stream->timer_period_frag = 0; /* reset theoretical stream pos */ - stream->timer_buf_periods = 0; - stream->timer_is_synced = 0; - - stream_mask = - stream->pipe->is_capture ? 1 : 1<substream->number; - - pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM); - pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, - stream->pipe->first_audio, 0, stream_mask); - - chip = snd_pcm_substream_chip(stream->substream); - - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - dev_err(chip->card->dev, - "ERROR %s err=%x;\n", __func__, err); - stream->status = - start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED; - return err; -} - -#define HEADER_FMT_BASE_LIN 0xfed00000 -#define HEADER_FMT_BASE_FLOAT 0xfad00000 -#define HEADER_FMT_INTEL 0x00008000 -#define HEADER_FMT_24BITS 0x00004000 -#define HEADER_FMT_16BITS 0x00002000 -#define HEADER_FMT_UPTO11 0x00000200 -#define HEADER_FMT_UPTO32 0x00000100 -#define HEADER_FMT_MONO 0x00000080 - -static int pcxhr_set_format(struct pcxhr_stream *stream) -{ - int err, is_capture, sample_rate, stream_num; - struct snd_pcxhr *chip; - struct pcxhr_rmh rmh; - unsigned int header; - - chip = snd_pcm_substream_chip(stream->substream); - switch (stream->format) { - case SNDRV_PCM_FORMAT_U8: - header = HEADER_FMT_BASE_LIN; - break; - case SNDRV_PCM_FORMAT_S16_LE: - header = HEADER_FMT_BASE_LIN | - HEADER_FMT_16BITS | HEADER_FMT_INTEL; - break; - case SNDRV_PCM_FORMAT_S16_BE: - header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS; - break; - case SNDRV_PCM_FORMAT_S24_3LE: - header = HEADER_FMT_BASE_LIN | - HEADER_FMT_24BITS | HEADER_FMT_INTEL; - break; - case SNDRV_PCM_FORMAT_S24_3BE: - header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS; - break; - case SNDRV_PCM_FORMAT_FLOAT_LE: - header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL; - break; - default: - dev_err(chip->card->dev, - "error %s() : unknown format\n", __func__); - return -EINVAL; - } - - sample_rate = chip->mgr->sample_rate; - if (sample_rate <= 32000 && sample_rate !=0) { - if (sample_rate <= 11025) - header |= HEADER_FMT_UPTO11; - else - header |= HEADER_FMT_UPTO32; - } - if (stream->channels == 1) - header |= HEADER_FMT_MONO; - - is_capture = stream->pipe->is_capture; - stream_num = is_capture ? 0 : stream->substream->number; - - pcxhr_init_rmh(&rmh, is_capture ? - CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT); - pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, - stream_num, 0); - if (is_capture) { - /* bug with old dsp versions: */ - /* bit 12 also sets the format of the playback stream */ - if (DSP_EXT_CMD_SET(chip->mgr)) - rmh.cmd[0] |= 1<<10; - else - rmh.cmd[0] |= 1<<12; - } - rmh.cmd[1] = 0; - rmh.cmd_len = 2; - if (DSP_EXT_CMD_SET(chip->mgr)) { - /* add channels and set bit 19 if channels>2 */ - rmh.cmd[1] = stream->channels; - if (!is_capture) { - /* playback : add channel mask to command */ - rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03; - rmh.cmd_len = 3; - } - } - rmh.cmd[rmh.cmd_len++] = header >> 8; - rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16; - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - dev_err(chip->card->dev, - "ERROR %s err=%x;\n", __func__, err); - return err; -} - -static int pcxhr_update_r_buffer(struct pcxhr_stream *stream) -{ - int err, is_capture, stream_num; - struct pcxhr_rmh rmh; - struct snd_pcm_substream *subs = stream->substream; - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - - is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE); - stream_num = is_capture ? 0 : subs->number; - - dev_dbg(chip->card->dev, - "%s(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n", __func__, - is_capture ? 'c' : 'p', - chip->chip_idx, (void *)(long)subs->runtime->dma_addr, - subs->runtime->dma_bytes, subs->number); - - pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS); - pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, - stream_num, 0); - - /* max buffer size is 2 MByte */ - snd_BUG_ON(subs->runtime->dma_bytes >= 0x200000); - /* size in bits */ - rmh.cmd[1] = subs->runtime->dma_bytes * 8; - /* most significant byte */ - rmh.cmd[2] = subs->runtime->dma_addr >> 24; - /* this is a circular buffer */ - rmh.cmd[2] |= 1<<19; - /* least 3 significant bytes */ - rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD; - rmh.cmd_len = 4; - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - dev_err(chip->card->dev, - "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err); - return err; -} - - -#if 0 -static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, - snd_pcm_uframes_t *sample_count) -{ - struct pcxhr_rmh rmh; - int err; - pcxhr_t *chip = snd_pcm_substream_chip(stream->substream); - pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT); - pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0, - 1<pipe->first_audio); - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err == 0) { - *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24; - *sample_count += (snd_pcm_uframes_t)rmh.stat[1]; - } - dev_dbg(chip->card->dev, "PIPE_SAMPLE_COUNT = %lx\n", *sample_count); - return err; -} -#endif - -static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream, - struct pcxhr_pipe **pipe) -{ - if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) { - *pipe = stream->pipe; - return 1; - } - return 0; -} - -static void pcxhr_start_linked_stream(struct pcxhr_mgr *mgr) -{ - int i, j, err; - struct pcxhr_pipe *pipe; - struct snd_pcxhr *chip; - int capture_mask = 0; - int playback_mask = 0; - -#ifdef CONFIG_SND_DEBUG_VERBOSE - ktime_t start_time, stop_time, diff_time; - - start_time = ktime_get(); -#endif - mutex_lock(&mgr->setup_mutex); - - /* check the pipes concerned and build pipe_array */ - for (i = 0; i < mgr->num_cards; i++) { - chip = mgr->chip[i]; - for (j = 0; j < chip->nb_streams_capt; j++) { - if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe)) - capture_mask |= (1 << pipe->first_audio); - } - for (j = 0; j < chip->nb_streams_play; j++) { - if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) { - playback_mask |= (1 << pipe->first_audio); - break; /* add only once, as all playback - * streams of one chip use the same pipe - */ - } - } - } - if (capture_mask == 0 && playback_mask == 0) { - mutex_unlock(&mgr->setup_mutex); - dev_err(&mgr->pci->dev, "%s : no pipes\n", __func__); - return; - } - - dev_dbg(&mgr->pci->dev, "%s : playback_mask=%x capture_mask=%x\n", - __func__, playback_mask, capture_mask); - - /* synchronous stop of all the pipes concerned */ - err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); - if (err) { - mutex_unlock(&mgr->setup_mutex); - dev_err(&mgr->pci->dev, "%s : " - "error stop pipes (P%x C%x)\n", - __func__, playback_mask, capture_mask); - return; - } - - /* the dsp lost format and buffer info with the stop pipe */ - for (i = 0; i < mgr->num_cards; i++) { - struct pcxhr_stream *stream; - chip = mgr->chip[i]; - for (j = 0; j < chip->nb_streams_capt; j++) { - stream = &chip->capture_stream[j]; - if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { - err = pcxhr_set_format(stream); - err = pcxhr_update_r_buffer(stream); - } - } - for (j = 0; j < chip->nb_streams_play; j++) { - stream = &chip->playback_stream[j]; - if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { - err = pcxhr_set_format(stream); - err = pcxhr_update_r_buffer(stream); - } - } - } - /* start all the streams */ - for (i = 0; i < mgr->num_cards; i++) { - struct pcxhr_stream *stream; - chip = mgr->chip[i]; - for (j = 0; j < chip->nb_streams_capt; j++) { - stream = &chip->capture_stream[j]; - if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) - err = pcxhr_set_stream_state(chip, stream); - } - for (j = 0; j < chip->nb_streams_play; j++) { - stream = &chip->playback_stream[j]; - if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) - err = pcxhr_set_stream_state(chip, stream); - } - } - - /* synchronous start of all the pipes concerned */ - err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); - if (err) { - mutex_unlock(&mgr->setup_mutex); - dev_err(&mgr->pci->dev, "%s : " - "error start pipes (P%x C%x)\n", - __func__, playback_mask, capture_mask); - return; - } - - /* put the streams into the running state now - * (increment pointer by interrupt) - */ - mutex_lock(&mgr->lock); - for ( i =0; i < mgr->num_cards; i++) { - struct pcxhr_stream *stream; - chip = mgr->chip[i]; - for(j = 0; j < chip->nb_streams_capt; j++) { - stream = &chip->capture_stream[j]; - if(stream->status == PCXHR_STREAM_STATUS_STARTED) - stream->status = PCXHR_STREAM_STATUS_RUNNING; - } - for (j = 0; j < chip->nb_streams_play; j++) { - stream = &chip->playback_stream[j]; - if (stream->status == PCXHR_STREAM_STATUS_STARTED) { - /* playback will already have advanced ! */ - stream->timer_period_frag += mgr->granularity; - stream->status = PCXHR_STREAM_STATUS_RUNNING; - } - } - } - mutex_unlock(&mgr->lock); - - mutex_unlock(&mgr->setup_mutex); - -#ifdef CONFIG_SND_DEBUG_VERBOSE - stop_time = ktime_get(); - diff_time = ktime_sub(stop_time, start_time); - dev_dbg(&mgr->pci->dev, "***TRIGGER START*** TIME = %ld (err = %x)\n", - (long)(ktime_to_ns(diff_time)), err); -#endif -} - - -/* - * trigger callback - */ -static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd) -{ - struct pcxhr_stream *stream; - struct snd_pcm_substream *s; - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - - switch (cmd) { - case SNDRV_PCM_TRIGGER_START: - dev_dbg(chip->card->dev, "SNDRV_PCM_TRIGGER_START\n"); - if (snd_pcm_stream_linked(subs)) { - snd_pcm_group_for_each_entry(s, subs) { - if (snd_pcm_substream_chip(s) != chip) - continue; - stream = s->runtime->private_data; - stream->status = - PCXHR_STREAM_STATUS_SCHEDULE_RUN; - snd_pcm_trigger_done(s, subs); - } - pcxhr_start_linked_stream(chip->mgr); - } else { - stream = subs->runtime->private_data; - dev_dbg(chip->card->dev, "Only one Substream %c %d\n", - stream->pipe->is_capture ? 'C' : 'P', - stream->pipe->first_audio); - if (pcxhr_set_format(stream)) - return -EINVAL; - if (pcxhr_update_r_buffer(stream)) - return -EINVAL; - - stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN; - if (pcxhr_set_stream_state(chip, stream)) - return -EINVAL; - stream->status = PCXHR_STREAM_STATUS_RUNNING; - } - break; - case SNDRV_PCM_TRIGGER_STOP: - dev_dbg(chip->card->dev, "SNDRV_PCM_TRIGGER_STOP\n"); - snd_pcm_group_for_each_entry(s, subs) { - stream = s->runtime->private_data; - stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP; - if (pcxhr_set_stream_state(chip, stream)) - return -EINVAL; - snd_pcm_trigger_done(s, subs); - } - break; - case SNDRV_PCM_TRIGGER_PAUSE_PUSH: - case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: - /* TODO */ - default: - return -EINVAL; - } - return 0; -} - - -static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start, unsigned int rate) -{ - struct pcxhr_rmh rmh; - int err; - //unsigned int regDoorbell, regIrq; - //printk(KERN_ERR "%s start %d\n", __func__, start); - pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT); - if (start) { - /* last dsp time invalid */ - mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; - rmh.cmd[0] |= mgr->granularity; - } - err = pcxhr_send_msg(mgr, &rmh); - if (err < 0) - dev_err(&mgr->pci->dev, "error %s err(%x)\n", __func__, - err); - - pcxhr_hr_timer_trig(mgr, start, rate); - - return err; -} - -/* - * prepare callback for all pcms - */ -static int pcxhr_prepare(struct snd_pcm_substream *subs) -{ - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - struct pcxhr_mgr *mgr = chip->mgr; - int err = 0; - - dev_dbg(chip->card->dev, - "%s : period_size(%lx) periods(%x) buffer_size(%lx)\n", __func__, - subs->runtime->period_size, subs->runtime->periods, - subs->runtime->buffer_size); - - mutex_lock(&mgr->setup_mutex); - - do { - /* only the first stream can choose the sample rate */ - /* set the clock only once (first stream) */ - if (mgr->sample_rate != subs->runtime->rate) { - err = pcxhr_set_clock(mgr, subs->runtime->rate); - if (err) - break; - if (mgr->sample_rate == 0) - /* start the DSP-timer */ - err = pcxhr_hardware_timer(mgr, 1, subs->runtime->rate); - mgr->sample_rate = subs->runtime->rate; - } - } while(0); /* do only once (so we can use break instead of goto) */ - - mutex_unlock(&mgr->setup_mutex); - - return err; -} - - -/* - * HW_PARAMS callback for all pcms - */ -static int pcxhr_hw_params(struct snd_pcm_substream *subs, - struct snd_pcm_hw_params *hw) -{ - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - struct pcxhr_mgr *mgr = chip->mgr; - struct pcxhr_stream *stream = subs->runtime->private_data; - - mutex_lock(&mgr->setup_mutex); - - /* set up channels */ - stream->channels = params_channels(hw); - /* set up format for the stream */ - stream->format = params_format(hw); - - mutex_unlock(&mgr->setup_mutex); - - return 0; -} - - -/* - * CONFIGURATION SPACE for all pcms, mono pcm must update channels_max - */ -static const struct snd_pcm_hardware pcxhr_caps = -{ - .info = (SNDRV_PCM_INFO_MMAP | - SNDRV_PCM_INFO_INTERLEAVED | - SNDRV_PCM_INFO_MMAP_VALID | - SNDRV_PCM_INFO_SYNC_START), - .formats = (SNDRV_PCM_FMTBIT_U8 | - SNDRV_PCM_FMTBIT_S16_LE | - SNDRV_PCM_FMTBIT_S16_BE | - SNDRV_PCM_FMTBIT_S24_3LE | - SNDRV_PCM_FMTBIT_S24_3BE | - SNDRV_PCM_FMTBIT_FLOAT_LE), - .rates = (SNDRV_PCM_RATE_CONTINUOUS | - SNDRV_PCM_RATE_8000_192000), - .rate_min = 8000, - .rate_max = 192000, - .channels_min = 1, - .channels_max = 2, - .buffer_bytes_max = (32*1024), - /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */ - .period_bytes_min = (2*PCXHR_GRANULARITY), - .period_bytes_max = (16*1024), - .periods_min = 2, - .periods_max = (32*1024/PCXHR_GRANULARITY), -}; - - -static int pcxhr_open(struct snd_pcm_substream *subs) -{ - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - struct pcxhr_mgr *mgr = chip->mgr; - struct snd_pcm_runtime *runtime = subs->runtime; - struct pcxhr_stream *stream; - int err; - - mutex_lock(&mgr->setup_mutex); - - /* copy the struct snd_pcm_hardware struct */ - runtime->hw = pcxhr_caps; - - if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) { - dev_dbg(chip->card->dev, "%s playback chip%d subs%d\n", - __func__, chip->chip_idx, subs->number); - stream = &chip->playback_stream[subs->number]; - } else { - dev_dbg(chip->card->dev, "%s capture chip%d subs%d\n", - __func__, chip->chip_idx, subs->number); - if (mgr->mono_capture) - runtime->hw.channels_max = 1; - else - runtime->hw.channels_min = 2; - stream = &chip->capture_stream[subs->number]; - } - if (stream->status != PCXHR_STREAM_STATUS_FREE){ - /* streams in use */ - dev_err(chip->card->dev, "%s chip%d subs%d in use\n", - __func__, chip->chip_idx, subs->number); - mutex_unlock(&mgr->setup_mutex); - return -EBUSY; - } - - /* float format support is in some cases buggy on stereo cards */ - if (mgr->is_hr_stereo) - runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_FLOAT_LE; - - /* buffer-size should better be multiple of period-size */ - err = snd_pcm_hw_constraint_integer(runtime, - SNDRV_PCM_HW_PARAM_PERIODS); - if (err < 0) { - mutex_unlock(&mgr->setup_mutex); - return err; - } - - /* if a sample rate is already used or fixed by external clock, - * the stream cannot change - */ - if (mgr->sample_rate) - runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; - else { - if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) { - int external_rate; - if (pcxhr_get_external_clock(mgr, mgr->use_clock_type, - &external_rate) || - external_rate == 0) { - /* cannot detect the external clock rate */ - mutex_unlock(&mgr->setup_mutex); - return -EBUSY; - } - runtime->hw.rate_min = external_rate; - runtime->hw.rate_max = external_rate; - } - } - - stream->status = PCXHR_STREAM_STATUS_OPEN; - stream->substream = subs; - stream->channels = 0; /* not configured yet */ - - runtime->private_data = stream; - - /* better get a divisor of granularity values (96 or 192) */ - snd_pcm_hw_constraint_step(runtime, 0, - SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32); - snd_pcm_hw_constraint_step(runtime, 0, - SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32); - snd_pcm_set_sync(subs); - - mgr->ref_count_rate++; - - mutex_unlock(&mgr->setup_mutex); - return 0; -} - - -static int pcxhr_close(struct snd_pcm_substream *subs) -{ - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - struct pcxhr_mgr *mgr = chip->mgr; - struct pcxhr_stream *stream = subs->runtime->private_data; - - mutex_lock(&mgr->setup_mutex); - - dev_dbg(chip->card->dev, "%s chip%d subs%d\n", __func__, - chip->chip_idx, subs->number); - - /* sample rate released */ - if (--mgr->ref_count_rate == 0) { - mgr->sample_rate = 0; /* the sample rate is no more locked */ - pcxhr_hardware_timer(mgr, 0, 0); /* stop the DSP-timer */ - } - - stream->status = PCXHR_STREAM_STATUS_FREE; - stream->substream = NULL; - - mutex_unlock(&mgr->setup_mutex); - - return 0; -} - - -static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs) -{ - u_int32_t timer_period_frag; - int timer_buf_periods; - struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); - struct snd_pcm_runtime *runtime = subs->runtime; - struct pcxhr_stream *stream = runtime->private_data; - - mutex_lock(&chip->mgr->lock); - - /* get the period fragment and the nb of periods in the buffer */ - timer_period_frag = stream->timer_period_frag; - timer_buf_periods = stream->timer_buf_periods; - - mutex_unlock(&chip->mgr->lock); - - return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) + - timer_period_frag); -} - - -static const struct snd_pcm_ops pcxhr_ops = { - .open = pcxhr_open, - .close = pcxhr_close, - .prepare = pcxhr_prepare, - .hw_params = pcxhr_hw_params, - .trigger = pcxhr_trigger, - .pointer = pcxhr_stream_pointer, -}; - -/* - */ -int pcxhr_create_pcm(struct snd_pcxhr *chip) -{ - int err; - struct snd_pcm *pcm; - char name[32]; - - snprintf(name, sizeof(name), "pcxhr %d", chip->chip_idx); - err = snd_pcm_new(chip->card, name, 0, - chip->nb_streams_play, - chip->nb_streams_capt, &pcm); - if (err < 0) { - dev_err(chip->card->dev, "cannot create pcm %s\n", name); - return err; - } - pcm->private_data = chip; - - if (chip->nb_streams_play) - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops); - if (chip->nb_streams_capt) - snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops); - - pcm->info_flags = 0; - pcm->nonatomic = true; - strcpy(pcm->name, name); - - snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, - &chip->mgr->pci->dev, - 32*1024, 32*1024); - chip->pcm = pcm; - return 0; -} - -static int pcxhr_chip_free(struct snd_pcxhr *chip) -{ - kfree(chip); - return 0; -} - -static int pcxhr_chip_dev_free(struct snd_device *device) -{ - struct snd_pcxhr *chip = device->device_data; - return pcxhr_chip_free(chip); -} - - -/* - */ -static int pcxhr_create(struct pcxhr_mgr *mgr, - struct snd_card *card, int idx) -{ - int err; - struct snd_pcxhr *chip; - static const struct snd_device_ops ops = { - .dev_free = pcxhr_chip_dev_free, - }; - - chip = kzalloc(sizeof(*chip), GFP_KERNEL); - if (!chip) - return -ENOMEM; - - chip->card = card; - chip->chip_idx = idx; - chip->mgr = mgr; - card->sync_irq = mgr->irq; - - if (idx < mgr->playback_chips) - /* stereo or mono streams */ - chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS; - - if (idx < mgr->capture_chips) { - if (mgr->mono_capture) - chip->nb_streams_capt = 2; /* 2 mono streams */ - else - chip->nb_streams_capt = 1; /* or 1 stereo stream */ - } - - err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); - if (err < 0) { - pcxhr_chip_free(chip); - return err; - } - - mgr->chip[idx] = chip; - - return 0; -} - -/* proc interface */ -static void pcxhr_proc_info(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_pcxhr *chip = entry->private_data; - struct pcxhr_mgr *mgr = chip->mgr; - int i = 0; - - snd_iprintf(buffer, "\n%s\n", mgr->name); - - /* stats available when embedded DSP is running */ - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { - struct pcxhr_rmh rmh; - short ver_maj = (mgr->dsp_version >> 16) & 0xff; - short ver_min = (mgr->dsp_version >> 8) & 0xff; - short ver_build = mgr->dsp_version & 0xff; - snd_iprintf(buffer, "module version %s\n", - PCXHR_DRIVER_VERSION_STRING); - snd_iprintf(buffer, "dsp version %d.%d.%d\n", - ver_maj, ver_min, ver_build); - if (mgr->board_has_analog) - snd_iprintf(buffer, "analog io available\n"); - else - snd_iprintf(buffer, "digital only board\n"); - - /* calc cpu load of the dsp */ - pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES); - if( ! pcxhr_send_msg(mgr, &rmh) ) { - int cur = rmh.stat[0]; - int ref = rmh.stat[1]; - if (ref > 0) { - if (mgr->sample_rate_real != 0 && - mgr->sample_rate_real != 48000) { - ref = (ref * 48000) / - mgr->sample_rate_real; - if (mgr->sample_rate_real >= - PCXHR_IRQ_TIMER_FREQ) - ref *= 2; - } - cur = 100 - (100 * cur) / ref; - snd_iprintf(buffer, "cpu load %d%%\n", cur); - snd_iprintf(buffer, "buffer pool %d/%d\n", - rmh.stat[2], rmh.stat[3]); - } - } - snd_iprintf(buffer, "dma granularity : %d\n", - mgr->granularity); - snd_iprintf(buffer, "dsp time errors : %d\n", - mgr->dsp_time_err); - snd_iprintf(buffer, "hrtimer calls : %d\n", - mgr->hr_timer_calls); - snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n", - mgr->async_err_pipe_xrun); - snd_iprintf(buffer, "dsp async stream xrun errors : %d\n", - mgr->async_err_stream_xrun); - snd_iprintf(buffer, "dsp async last other error : %x\n", - mgr->async_err_other_last); - - - - snd_iprintf(buffer, "IRQ ctrl : 0x%08x\n", - inl(mgr->port[1] + 0x68)); - snd_iprintf(buffer, "doorbell : 0x%08x\n", - inl(mgr->port[1] + 0x64)); - - snd_iprintf(buffer, "User IO CONTROL : 0x%08x\n", - inl(mgr->port[1] + 0x6c)); - - - snd_iprintf(buffer, "@port 0 : 0x%lx\n", - mgr->port[0]); - -// snd_iprintf(buffer, "port 0 : 0x%08x:0x%08x:0x%08x:0x%08x\n", -// inl(mgr->port[0] + 0x0), -// inl(mgr->port[0] + 0x4), -// inl(mgr->port[0] + 0x8), -// inl(mgr->port[0] + 0xc)); - - snd_iprintf(buffer, "@port 1 : 0x%lx\n", - mgr->port[1]); - - snd_iprintf(buffer, "@port 2 : 0x%lx\n", - mgr->port[2]); - - - - for(i = 0; i < 0x100; i+=4 ){ - snd_iprintf(buffer, "[0x%x(%i)]0x%08x\n",i,i, - inl(mgr->port[1] + i)); - } - - - - - - snd_iprintf(buffer, "dbg interrupts : \n\tall %d\n\tnone : %d\n\tfalse_none %d\n\thandled %d\n\tdummy %d\n\tirq %d\n\tasync %d\n\tincr %d\n\tloop %d\n", - mgr->dbg_cpt.interrupts_all, mgr->dbg_cpt.interrupts_none, mgr->dbg_cpt.interrupts_false_irq_none,mgr->dbg_cpt.interrupts_handled, mgr->dbg_cpt.interrupts_dummy, mgr->dbg_cpt.interrupts_irq, mgr->dbg_cpt.interrupts_async, mgr->dbg_cpt.interrupts_incr, mgr->dbg_cpt.interrupts_loop); - - - /* debug zone dsp */ - rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS; - rmh.cmd_len = 1; - rmh.stat_len = PCXHR_SIZE_MAX_STATUS; - rmh.dsp_stat = 0; - rmh.cmd_idx = CMD_LAST_INDEX; - if( ! pcxhr_send_msg(mgr, &rmh) ) { - int i; - if (rmh.stat_len > 8) - rmh.stat_len = 8; - for (i = 0; i < rmh.stat_len; i++) - snd_iprintf(buffer, "debug[%02d] = %06x\n", - i, rmh.stat[i]); - } - } else - snd_iprintf(buffer, "no firmware loaded\n"); - snd_iprintf(buffer, "\n"); -//////////////////GPR -//{ -// unsigned int uLoop; -// unsigned int dsp_time[9]; -// struct timespec64 tv[9]; -// for ( uLoop = 0; uLoop < 10; uLoop++ ) -// { -// dsp_time[uLoop] = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; -// ktime_get_real_ts64(&tv[uLoop]); -// udelay(500); -// } -// for ( uLoop = 0; uLoop < 10; uLoop++ ) -// { - // /1000 : nsec => usec -// printk(KERN_ERR "%s [%u] dsp_time_new %u time %u\n",__func__, uLoop, dsp_time[uLoop], (unsigned int)tv[uLoop].tv_nsec/1000); -// } -//} -///////////////GPR - -} -static void pcxhr_proc_sync(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_pcxhr *chip = entry->private_data; - struct pcxhr_mgr *mgr = chip->mgr; - static const char *textsHR22[3] = { - "Internal", "AES Sync", "AES 1" - }; - static const char *textsPCXHR[7] = { - "Internal", "Word", "AES Sync", - "AES 1", "AES 2", "AES 3", "AES 4" - }; - const char **texts; - int max_clock; - if (mgr->is_hr_stereo) { - texts = textsHR22; - max_clock = HR22_CLOCK_TYPE_MAX; - } else { - texts = textsPCXHR; - max_clock = PCXHR_CLOCK_TYPE_MAX; - } - - snd_iprintf(buffer, "\n%s\n", mgr->name); - snd_iprintf(buffer, "Current Sample Clock\t: %s\n", - texts[mgr->cur_clock_type]); - snd_iprintf(buffer, "Current Sample Rate\t= %d\n", - mgr->sample_rate_real); - /* commands available when embedded DSP is running */ - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { - int i, err, sample_rate; - for (i = 1; i <= max_clock; i++) { - err = pcxhr_get_external_clock(mgr, i, &sample_rate); - if (err) - break; - snd_iprintf(buffer, "%s Clock\t\t= %d\n", - texts[i], sample_rate); - } - } else - snd_iprintf(buffer, "no firmware loaded\n"); - snd_iprintf(buffer, "\n"); -} - -static void pcxhr_proc_gpio_read(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_pcxhr *chip = entry->private_data; - struct pcxhr_mgr *mgr = chip->mgr; - /* commands available when embedded DSP is running */ - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { - /* gpio ports on stereo boards only available */ - int value = 0; - hr222_read_gpio(mgr, 1, &value); /* GPI */ - snd_iprintf(buffer, "GPI: 0x%x\n", value); - hr222_read_gpio(mgr, 0, &value); /* GP0 */ - snd_iprintf(buffer, "GPO: 0x%x\n", value); - } else - snd_iprintf(buffer, "no firmware loaded\n"); - snd_iprintf(buffer, "\n"); -} -static void pcxhr_proc_gpo_write(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_pcxhr *chip = entry->private_data; - struct pcxhr_mgr *mgr = chip->mgr; - char line[64]; - int value; - /* commands available when embedded DSP is running */ - if (!(mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX))) - return; - while (!snd_info_get_line(buffer, line, sizeof(line))) { - if (sscanf(line, "GPO: 0x%x", &value) != 1) - continue; - hr222_write_gpo(mgr, value); /* GP0 */ - } -} - -/* Access to the results of the CMD_GET_TIME_CODE RMH */ -#define TIME_CODE_VALID_MASK 0x00800000 -#define TIME_CODE_NEW_MASK 0x00400000 -#define TIME_CODE_BACK_MASK 0x00200000 -#define TIME_CODE_WAIT_MASK 0x00100000 - -/* Values for the CMD_MANAGE_SIGNAL RMH */ -#define MANAGE_SIGNAL_TIME_CODE 0x01 -#define MANAGE_SIGNAL_MIDI 0x02 - -/* linear time code read proc*/ -static void pcxhr_proc_ltc(struct snd_info_entry *entry, - struct snd_info_buffer *buffer) -{ - struct snd_pcxhr *chip = entry->private_data; - struct pcxhr_mgr *mgr = chip->mgr; - struct pcxhr_rmh rmh; - unsigned int ltcHrs, ltcMin, ltcSec, ltcFrm; - int err; - /* commands available when embedded DSP is running */ - if (!(mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX))) { - snd_iprintf(buffer, "no firmware loaded\n"); - return; - } - if (!mgr->capture_ltc) { - pcxhr_init_rmh(&rmh, CMD_MANAGE_SIGNAL); - rmh.cmd[0] |= MANAGE_SIGNAL_TIME_CODE; - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - snd_iprintf(buffer, "ltc not activated (%d)\n", err); - return; - } - if (mgr->is_hr_stereo) - hr222_manage_timecode(mgr, 1); - else - pcxhr_write_io_num_reg_cont(mgr, REG_CONT_VALSMPTE, - REG_CONT_VALSMPTE, NULL); - mgr->capture_ltc = 1; - } - pcxhr_init_rmh(&rmh, CMD_GET_TIME_CODE); - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - snd_iprintf(buffer, "ltc read error (err=%d)\n", err); - return ; - } - ltcHrs = 10*((rmh.stat[0] >> 8) & 0x3) + (rmh.stat[0] & 0xf); - ltcMin = 10*((rmh.stat[1] >> 16) & 0x7) + ((rmh.stat[1] >> 8) & 0xf); - ltcSec = 10*(rmh.stat[1] & 0x7) + ((rmh.stat[2] >> 16) & 0xf); - ltcFrm = 10*((rmh.stat[2] >> 8) & 0x3) + (rmh.stat[2] & 0xf); - - snd_iprintf(buffer, "timecode: %02u:%02u:%02u-%02u\n", - ltcHrs, ltcMin, ltcSec, ltcFrm); - snd_iprintf(buffer, "raw: 0x%04x%06x%06x\n", rmh.stat[0] & 0x00ffff, - rmh.stat[1] & 0xffffff, rmh.stat[2] & 0xffffff); - /*snd_iprintf(buffer, "dsp ref time: 0x%06x%06x\n", - rmh.stat[3] & 0xffffff, rmh.stat[4] & 0xffffff);*/ - if (!(rmh.stat[0] & TIME_CODE_VALID_MASK)) { - snd_iprintf(buffer, "warning: linear timecode not valid\n"); - } -} - -static void pcxhr_proc_init(struct snd_pcxhr *chip) -{ - snd_card_ro_proc_new(chip->card, "info", chip, pcxhr_proc_info); - snd_card_ro_proc_new(chip->card, "sync", chip, pcxhr_proc_sync); - /* gpio available on stereo sound cards only */ - if (chip->mgr->is_hr_stereo) - snd_card_rw_proc_new(chip->card, "gpio", chip, - pcxhr_proc_gpio_read, - pcxhr_proc_gpo_write); - snd_card_ro_proc_new(chip->card, "ltc", chip, pcxhr_proc_ltc); -} -/* end of proc interface */ - -/* - * release all the cards assigned to a manager instance - */ -static int pcxhr_free(struct pcxhr_mgr *mgr) -{ - unsigned int i; - - for (i = 0; i < mgr->num_cards; i++) { - if (mgr->chip[i]) - snd_card_free(mgr->chip[i]->card); - } - - /* reset board if some firmware was loaded */ - if(mgr->dsp_loaded) { - pcxhr_reset_board(mgr); - dev_dbg(&mgr->pci->dev, "reset pcxhr !\n"); - } - - pcxhr_hr_timer_kill(mgr); - - /* release irq */ - if (mgr->irq >= 0) - free_irq(mgr->irq, mgr); - - pci_release_regions(mgr->pci); - - /* free hostport purgebuffer */ - if (mgr->hostport.area) { - snd_dma_free_pages(&mgr->hostport); - mgr->hostport.area = NULL; - } - - kfree(mgr->prmh); - - pci_disable_device(mgr->pci); - kfree(mgr); - return 0; -} - -/* - * probe function - creates the card manager - */ -static int pcxhr_probe(struct pci_dev *pci, - const struct pci_device_id *pci_id) -{ - static int dev; - struct pcxhr_mgr *mgr; - unsigned int i; - int err; - size_t size; - char *card_name; - - unsigned int regDoorbell, regIrq; - - if (dev >= SNDRV_CARDS) - return -ENODEV; - if (! enable[dev]) { - dev++; - return -ENOENT; - } - - /* enable PCI device */ - err = pci_enable_device(pci); - if (err < 0) - return err; - pci_set_master(pci); - - /* check if we can restrict PCI DMA transfers to 32 bits */ - if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) { - dev_err(&pci->dev, - "architecture does not support 32bit PCI busmaster DMA\n"); - pci_disable_device(pci); - return -ENXIO; - } - - /* alloc card manager */ - mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); - if (! mgr) { - pci_disable_device(pci); - return -ENOMEM; - } - - if (snd_BUG_ON(pci_id->driver_data >= PCI_ID_LAST)) { - kfree(mgr); - pci_disable_device(pci); - return -ENODEV; - } - - //Get the board IE from the sub system id. - if (pcxhr_is_device_IE (pci->subsystem_device, PCXHR_DEVICE_IE5_ID)) - { - mgr->board_revision = PCXHR_BOARD_REVISION_5; - dev_info(&pci->dev, "%s(): probed IE5 board\n", __FUNCTION__); - } - else if (pcxhr_is_device_IE (pci->subsystem_device, PCXHR_DEVICE_IE7_ID)) - { - mgr->board_revision = PCXHR_BOARD_REVISION_7; - dev_info(&pci->dev, "%s(): probed IE7 board\n", __FUNCTION__); - } - else - { - mgr->board_revision= PCXHR_BOARD_REVISION_BEFORE_5; - dev_info(&pci->dev, "%s(): probed pre-IE5 board\n", __FUNCTION__); - } - - //Select the right registers' addresses offset - mgr->dsp_reg_offset = pcxhr_is_board_revision(mgr, PCXHR_BOARD_REVISION_BEFORE_5) ? 0 : 3; - - card_name = - pcxhr_board_params[pci_id->driver_data].board_name; - mgr->playback_chips = - pcxhr_board_params[pci_id->driver_data].playback_chips; - mgr->capture_chips = - pcxhr_board_params[pci_id->driver_data].capture_chips; - mgr->fw_file_set = - pcxhr_board_params[pci_id->driver_data].fw_file_set; - mgr->firmware_num = - pcxhr_board_params[pci_id->driver_data].firmware_num; - mgr->mono_capture = mono[dev]; - mgr->is_hr_stereo = (mgr->playback_chips == 1); - mgr->board_has_aes1 = PCXHR_BOARD_HAS_AES1(mgr); - mgr->board_aes_in_192k = !PCXHR_BOARD_AESIN_NO_192K(mgr); - - if (mgr->is_hr_stereo) - mgr->granularity = PCXHR_GRANULARITY_HR22; - else - mgr->granularity = PCXHR_GRANULARITY; - - /* resource assignment */ - err = pci_request_regions(pci, card_name); - if (err < 0) { - kfree(mgr); - pci_disable_device(pci); - return err; - } - for (i = 0; i < 3; i++) - mgr->port[i] = pci_resource_start(pci, i); - - mgr->pci = pci; - mgr->irq = -1; - - regIrq = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); - regDoorbell = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, regDoorbell); - printk(KERN_ERR "%s PCXHR_PLX_L2PCIDB 0x%x, regIrq 0x%x\n", __func__, regDoorbell, regIrq); - - regIrq = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); - regDoorbell = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, regDoorbell); - printk(KERN_ERR "%s PCXHR_PLX_L2PCIDB 0x%x, regIrq 0x%x\n", __func__, regDoorbell, regIrq); - - pcxhr_hr_timer_init(mgr); - -// msi = pci_enable_msi(pci); -// printk(KERN_ERR "%s MSI = %d\n", __func__, msi); - - - if (request_threaded_irq(pci->irq, pcxhr_interrupt, - pcxhr_threaded_irq, IRQF_SHARED, - KBUILD_MODNAME, mgr)) { - dev_err(&pci->dev, "unable to grab IRQ %d\n", pci->irq); - pcxhr_free(mgr); - return -EBUSY; - } - mgr->irq = pci->irq; - - snprintf(mgr->name, sizeof(mgr->name), - "Digigram at 0x%lx & 0x%lx, 0x%lx irq %i", - mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq); - - /* ISR lock */ - mutex_init(&mgr->lock); - mutex_init(&mgr->msg_lock); - - /* init setup mutex*/ - mutex_init(&mgr->setup_mutex); - - mgr->prmh = kmalloc(sizeof(*mgr->prmh) + - sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - - PCXHR_SIZE_MAX_STATUS), - GFP_KERNEL); - if (! mgr->prmh) { - pcxhr_free(mgr); - return -ENOMEM; - } - - for (i=0; i < PCXHR_MAX_CARDS; i++) { - struct snd_card *card; - char tmpid[16]; - int idx; - - if (i >= max(mgr->playback_chips, mgr->capture_chips)) - break; - mgr->num_cards++; - - if (index[dev] < 0) - idx = index[dev]; - else - idx = index[dev] + i; - - snprintf(tmpid, sizeof(tmpid), "%s-%d", - id[dev] ? id[dev] : card_name, i); - err = snd_card_new(&pci->dev, idx, tmpid, THIS_MODULE, - 0, &card); - - if (err < 0) { - dev_err(&pci->dev, "cannot allocate the card %d\n", i); - pcxhr_free(mgr); - return err; - } - - strcpy(card->driver, DRIVER_NAME); - snprintf(card->shortname, sizeof(card->shortname), - "Digigram [PCM #%d]", i); - snprintf(card->longname, sizeof(card->longname), - "%s [PCM #%d]", mgr->name, i); - - err = pcxhr_create(mgr, card, i); - if (err < 0) { - snd_card_free(card); - pcxhr_free(mgr); - return err; - } - - if (i == 0) - /* init proc interface only for chip0 */ - pcxhr_proc_init(mgr->chip[i]); - - err = snd_card_register(card); - if (err < 0) { - pcxhr_free(mgr); - return err; - } - } - - /* create hostport purgebuffer */ - size = PAGE_ALIGN(sizeof(struct pcxhr_hostport)); - if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, - size, &mgr->hostport) < 0) { - pcxhr_free(mgr); - return -ENOMEM; - } - /* init purgebuffer */ - memset(mgr->hostport.area, 0, size); - - /* create a DSP loader */ - err = pcxhr_setup_firmware(mgr); - if (err < 0) { - pcxhr_free(mgr); - return err; - } - - pci_set_drvdata(pci, mgr); - dev++; - return 0; -} - -static void pcxhr_remove(struct pci_dev *pci) -{ - pcxhr_free(pci_get_drvdata(pci)); -} - -static struct pci_driver pcxhr_driver = { - .name = KBUILD_MODNAME, - .id_table = pcxhr_ids, - .probe = pcxhr_probe, - .remove = pcxhr_remove, -}; - -module_pci_driver(pcxhr_driver); diff --git a/snd-pcxhr-dkms/src/pcxhr.h b/snd-pcxhr-dkms/src/pcxhr.h deleted file mode 100644 index bd7c40d..0000000 --- a/snd-pcxhr-dkms/src/pcxhr.h +++ /dev/null @@ -1,277 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Driver for Digigram pcxhr soundcards - * - * main header file - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef __SOUND_PCXHR_H -#define __SOUND_PCXHR_H - -#include -#include -#include -#include "pcxhr_hrtimer.h" - -/* Driver version : 2.0.13 */ -#define PCXHR_DRIVER_VERSION 0x020013 -#define PCXHR_DRIVER_VERSION_STRING "2.0.13" - -/* Workaround for CentOS/RHEL */ -#ifdef RHEL_RELEASE_CODE -# define HAVE_SND_CARD_NEW (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)) -# define PREALLOCATE_PAGES_FOR_ALL_RETURNS_NO_ERR (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)) -#else -# define HAVE_SND_CARD_NEW (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)) -# define PREALLOCATE_PAGES_FOR_ALL_RETURNS_NO_ERR (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) -#endif - -#define PCXHR_MAX_CARDS 6 -#define PCXHR_PLAYBACK_STREAMS 4 - -#define PCXHR_GRANULARITY 96 /* min 96 and multiple of 48 */ -/* transfer granularity of pipes and the dsp time (MBOX4) */ -#define PCXHR_GRANULARITY_MIN 96 -/* TODO : granularity could be 64 or 128 */ -#define PCXHR_GRANULARITY_HR22 192 /* granularity for stereo cards */ - -struct snd_pcxhr; -struct pcxhr_mgr; - -struct pcxhr_stream; -struct pcxhr_pipe; - -enum pcxhr_clock_type { - PCXHR_CLOCK_TYPE_INTERNAL = 0, - PCXHR_CLOCK_TYPE_WORD_CLOCK, - PCXHR_CLOCK_TYPE_AES_SYNC, - PCXHR_CLOCK_TYPE_AES_1, - PCXHR_CLOCK_TYPE_AES_2, - PCXHR_CLOCK_TYPE_AES_3, - PCXHR_CLOCK_TYPE_AES_4, - PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4, - HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL, - HR22_CLOCK_TYPE_AES_SYNC, - HR22_CLOCK_TYPE_AES_1, - HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1, -}; - -enum pcxhr_board_revision_id{ - PCXHR_BOARD_REVISION_BEFORE_5 = 0, - PCXHR_BOARD_REVISION_5 = 1, - PCXHR_BOARD_REVISION_7 = 2, -}; - -struct pcxhr_dbg_cpt { - unsigned int interrupts_all; - unsigned int interrupts_none; - unsigned int interrupts_handled; - unsigned int interrupts_dummy; - unsigned int interrupts_irq; - unsigned int interrupts_async; - unsigned int interrupts_incr; - unsigned int interrupts_loop; - unsigned int interrupts_false_irq_none; -}; - -struct pcxhr_mgr { - unsigned int num_cards; - struct snd_pcxhr *chip[PCXHR_MAX_CARDS]; - - struct pci_dev *pci; - - int irq; - - int granularity; - - /* card access with 1 mem bar and 2 io bar's */ - unsigned long port[3]; - unsigned long dsp_reg_offset; - - /* share the name */ - char name[40]; /* name of this soundcard */ - - struct pcxhr_rmh *prmh; - - struct mutex lock; /* interrupt lock */ - struct mutex msg_lock; /* message lock */ - - struct mutex setup_mutex; /* mutex used in hw_params, open and close */ - struct mutex mixer_mutex; /* mutex for mixer */ - - /* hardware interface */ - unsigned int dsp_loaded; /* bit flags of loaded dsp indices */ - unsigned int dsp_version; /* read from embedded once firmware is loaded */ - int playback_chips; - int capture_chips; - int fw_file_set; - int firmware_num; - unsigned int is_hr_stereo:1; - unsigned int board_has_aes1:1; /* if 1 board has AES1 plug and SRC */ - unsigned int board_has_analog:1; /* if 0 the board is digital only */ - unsigned int board_has_mic:1; /* if 1 the board has microphone input */ - unsigned int board_aes_in_192k:1;/* if 1 the aes input plugs do support 192kHz */ - unsigned int mono_capture:1; /* if 1 the board does mono capture */ - unsigned int capture_ltc:1; /* if 1 the board captures LTC input */ - - struct snd_dma_buffer hostport; - - enum pcxhr_clock_type use_clock_type; /* clock type selected by mixer */ - enum pcxhr_clock_type cur_clock_type; /* current clock type synced */ - int sample_rate; - int ref_count_rate; - int timer_toggle; /* timer interrupt toggles between the two values 0x200 and 0x300 */ - int dsp_time_last; /* the last dsp time (read by interrupt) */ - int dsp_time_err; /* dsp time errors */ - int hr_timer_calls; /* hrtimer calls */ - unsigned int src_it_dsp; /* dsp interrupt source */ - unsigned int io_num_reg_cont; /* backup of IO_NUM_REG_CONT */ - unsigned int codec_speed; /* speed mode of the codecs */ - unsigned int sample_rate_real; /* current real sample rate */ - int last_reg_stat; - int async_err_stream_xrun; - int async_err_pipe_xrun; - int async_err_other_last; - - unsigned char xlx_cfg; /* copy of PCXHR_XLX_CFG register */ - unsigned char xlx_selmic; /* copy of PCXHR_XLX_SELMIC register */ - unsigned char dsp_reset; /* copy of PCXHR_DSP_RESET register */ - - ktime_t hr_timer_period_time; - atomic_t hr_timer_running; - struct hrtimer hr_timer; - struct tasklet_struct hr_timer_tasklet; - - struct pcxhr_dbg_cpt dbg_cpt; - - enum pcxhr_board_revision_id board_revision; /* Current board revision (IE values)*/ - unsigned int pcm1796_operation_reg_value; /* copy of the operation register (REG 19, @0x13) of the PCM1796*/ -}; - -/* IE support*/ -static const unsigned int PCXHR_DEVICE_IE_ID_MASK = 0x00F0; -static const unsigned int PCXHR_DEVICE_IE5_ID = 0x0040; -static const unsigned int PCXHR_DEVICE_IE7_ID = 0x0060; - - -/* pcxhr_mgr board revision helper */ -static inline unsigned int pcxhr_is_board_revision (const struct pcxhr_mgr* toTest, const unsigned int tested_revision) -{ - return toTest->board_revision == tested_revision; -} - - - -enum pcxhr_stream_status { - PCXHR_STREAM_STATUS_FREE, - PCXHR_STREAM_STATUS_OPEN, - PCXHR_STREAM_STATUS_SCHEDULE_RUN, - PCXHR_STREAM_STATUS_STARTED, - PCXHR_STREAM_STATUS_RUNNING, - PCXHR_STREAM_STATUS_SCHEDULE_STOP, - PCXHR_STREAM_STATUS_STOPPED, - PCXHR_STREAM_STATUS_PAUSED -}; - -struct pcxhr_stream { - struct snd_pcm_substream *substream; - snd_pcm_format_t format; - struct pcxhr_pipe *pipe; - - enum pcxhr_stream_status status; /* free, open, running, draining, pause */ - - u_int64_t timer_abs_periods; /* timer: samples elapsed since TRIGGER_START (multiple of period_size) */ - u_int32_t timer_period_frag; /* timer: samples elapsed since last call to snd_pcm_period_elapsed (0..period_size) */ - u_int32_t timer_buf_periods; /* nb of periods in the buffer that have already elapsed */ - int timer_is_synced; /* if(0) : timer needs to be resynced with real hardware pointer */ - - int channels; -}; - - -enum pcxhr_pipe_status { - PCXHR_PIPE_UNDEFINED, - PCXHR_PIPE_DEFINED -}; - -struct pcxhr_pipe { - enum pcxhr_pipe_status status; - int is_capture; /* this is a capture pipe */ - int first_audio; /* first audio num */ -}; - - -struct snd_pcxhr { - struct snd_card *card; - struct pcxhr_mgr *mgr; - int chip_idx; /* zero based */ - - struct snd_pcm *pcm; /* PCM */ - - struct pcxhr_pipe playback_pipe; /* 1 stereo pipe only */ - struct pcxhr_pipe capture_pipe[2]; /* 1 stereo or 2 mono pipes */ - - struct pcxhr_stream playback_stream[PCXHR_PLAYBACK_STREAMS]; - struct pcxhr_stream capture_stream[2]; /* 1 stereo or 2 mono streams */ - int nb_streams_play; - int nb_streams_capt; - - int analog_playback_active[2]; /* Mixer : Master Playback !mute */ - int analog_playback_volume[2]; /* Mixer : Master Playback Volume */ - int analog_capture_volume[2]; /* Mixer : Master Capture Volume */ - int digital_playback_active[PCXHR_PLAYBACK_STREAMS][2]; - int digital_playback_volume[PCXHR_PLAYBACK_STREAMS][2]; - int digital_capture_volume[2]; /* Mixer : Digital Capture Volume */ - int monitoring_active[2]; /* Mixer : Monitoring Active */ - int monitoring_volume[2]; /* Mixer : Monitoring Volume */ - int audio_capture_source; /* Mixer : Audio Capture Source */ - int mic_volume; /* used by cards with MIC only */ - int mic_boost; /* used by cards with MIC only */ - int mic_active; /* used by cards with MIC only */ - int analog_capture_active; /* used by cards with MIC only */ - int phantom_power; /* used by cards with MIC only */ - - unsigned char aes_bits[5]; /* Mixer : IEC958_AES bits */ -}; - -struct pcxhr_hostport -{ - char purgebuffer[6]; - char reserved[2]; -}; - -/* exported */ -int pcxhr_create_pcm(struct snd_pcxhr *chip); -int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate); -int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, - enum pcxhr_clock_type clock_type, - int *sample_rate); - -/* - * @return true if the subsystem_id mathes the given ID mask - */ -static inline unsigned int pcxhr_is_device_IE (unsigned int sub_system_id, const unsigned int proposed_IE) -{ - return ((sub_system_id & PCXHR_DEVICE_IE_ID_MASK) == proposed_IE) ? 1 : 0 ; -} -/* - * @return true if the subsystem_id is compatible with the given ID - */ -static inline unsigned int pcxhr_is_device_compatible_IE (unsigned int sub_system_id, const unsigned int proposed_IE) -{ - //Only IE7 is compatible with IE5. - if (proposed_IE == PCXHR_DEVICE_IE5_ID) - { - //Ok for IE >= IE5 - return ((sub_system_id & PCXHR_DEVICE_IE_ID_MASK) >= proposed_IE )? 1 : 0; - } - else - { - return pcxhr_is_device_IE(sub_system_id, proposed_IE); - } -} - - -#endif /* __SOUND_PCXHR_H */ diff --git a/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.c b/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.c deleted file mode 100644 index 74043c0..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.c +++ /dev/null @@ -1,158 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * Copyright (c) 2004 by Digigram - */ - - -#include -#include -#include // for threads -#include // for task_struct -#include // for using jiffies -#include -#include -#include -#include "pcxhr_clock_monitoring.h" -#include "pcxhr.h" - -/* - use case 1 - on démarre en AES et la clock disparait. - - use case 2 - La clock aes a disparut à un moment... et elle réapparait. - -*/ -void clock_monitoring_treatment(struct pcxhr_mgr *mgr) { - int rate = 0; - - if((mgr != NULL) ) - { - mutex_lock(&mgr->timer_mutex); - if( mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL ) { //on est cencé être sur de l AES - pcxhr_get_external_clock(mgr,mgr->use_clock_type,&rate); - if( rate == 0 ) { - dev_err(&mgr->pci->dev, "\tpcxhr_clock_monitoring_tasklet external clock disappears...\n"); - mgr->expected_clock_type = mgr->use_clock_type; - mgr->use_clock_type = PCXHR_CLOCK_TYPE_INTERNAL; - pcxhr_set_clock(mgr, mgr->sample_rate_real); - } - } - else { //on est déjà sur l horloge interne on test si l aes est de retour - pcxhr_get_external_clock(mgr,mgr->expected_clock_type,&rate); - if( rate != 0) { - dev_err(&mgr->pci->dev, "\tpcxhr_clock_monitoring_tasklet external clock reappears...\n"); - mgr->use_clock_type = mgr->expected_clock_type; - pcxhr_set_clock(mgr, rate); - } - } - mutex_unlock(&mgr->timer_mutex); - }else { - dev_err(&mgr->pci->dev, "\tclock_monitoring_treatment mgr pointer null\n"); - } -} - -int clock_monitoring_thread(void *ptr) { - struct pcxhr_mgr *mgr = (struct pcxhr_mgr*) ptr; - - printk(KERN_INFO "In thread %s", mgr->shortname); - while (1){ - set_current_state(TASK_INTERRUPTIBLE); - schedule(); - clock_monitoring_treatment(mgr); - } - dev_info(&mgr->pci->dev, "clock_monitoring_thread on sort\n"); - return 0; -} - -int clock_monitoring_thread_init(struct pcxhr_mgr *mgr) { - - char* our_thread="clockMonitoring thread"; - - mgr->thread = kthread_create(clock_monitoring_thread,mgr,our_thread); - if(mgr->thread == NULL) { - dev_err(&mgr->pci->dev, "clock_monitoring_thread_init kthread_create FAILED\n"); - return -ENOMEM; - } - wake_up_process(mgr->thread); - return 0; -} - -//void thread_cleanup(void) { -//} - -static void clockMonitor_timedout(unsigned long ptr) { - struct pcxhr_mgr *mgr = (struct pcxhr_mgr*) ptr; - - if( (mgr != NULL) && (mgr->timer_state == 1) ) { - mod_timer(mgr->clockMonitor_timer, (jiffies + msecs_to_jiffies(1000))); - wake_up_process(mgr->thread); - } - - if(mgr->timer_state == 0) { - dev_info(&mgr->pci->dev, "\tclockMonitor_timedout timer should stop do not reload it\n"); - } -} - - -int clockMonitor_stop(struct pcxhr_mgr *mgr){ - int result = 0; - mutex_lock(&mgr->timer_mutex); - - dev_info(&mgr->pci->dev, " clockMonitor_stop %s\n", mgr->shortname); - if((mgr->clockMonitor_timer != NULL)&& (mgr->timer_state == 1)) { -// result = del_timer(mgr->clockMonitor_timer); - result = del_timer_sync(mgr->clockMonitor_timer); - mgr->timer_state = 0; - } - mutex_unlock(&mgr->timer_mutex); - return 0; -} - -int clockMonitor_start(struct pcxhr_mgr *mgr){ - mutex_lock(&mgr->timer_mutex); - if(mgr->timer_state == 0) { //déjà était démarré... - dev_info(&mgr->pci->dev, "clockMonitor_start %s\n", mgr->shortname); - - init_timer(mgr->clockMonitor_timer); - mgr->clockMonitor_timer->function = clockMonitor_timedout; - mgr->clockMonitor_timer->data = (unsigned long)mgr; - mgr->clockMonitor_timer->expires = jiffies + msecs_to_jiffies(2000); - add_timer(mgr->clockMonitor_timer); - mgr->timer_state = 1; - } - mutex_unlock(&mgr->timer_mutex); - return 0; -} - - -int clockMonitor_init(struct pcxhr_mgr *mgr){ - dev_info(&mgr->pci->dev, "clockMonitor_init %s\n", mgr->shortname); - - mutex_init(&mgr->timer_mutex); - - mgr->clockMonitor_timer = (struct timer_list*) kmalloc(sizeof(struct timer_list), GFP_KERNEL); - if(mgr->clockMonitor_timer == NULL){ - dev_info(&mgr->pci->dev, "clockMonitor_init failed mgr->clockMonitor_timer NULL\n"); - return -ENOMEM; - } - //init_timer(mgr->clockMonitor_timer); - - mgr->timer_state = 0; - - return clock_monitoring_thread_init(mgr); -} - -int clockMonitor_free(struct pcxhr_mgr *mgr){ - dev_info(&mgr->pci->dev, "clockMonitor_free %s\n", mgr->shortname); - - if (mgr->clockMonitor_timer != NULL) - { - kfree(mgr->clockMonitor_timer); - } - mgr->timer_state = 0; - - return 0; -} diff --git a/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.h b/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.h deleted file mode 100644 index 9825f9d..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_clock_monitoring.h +++ /dev/null @@ -1,34 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * Copyright (c) 2004 by Digigram - */ - - -#ifndef __SOUND_PCXHR_CLOCK_MONITORING_H -#define __SOUND_PCXHR_CLOCK_MONITORING_H -#include "pcxhr.h" - - - -/* -A timer wake up a hread wich monitor clock. -*/ - - -//initialise clock management -int clockMonitor_init(struct pcxhr_mgr *mgr); -//clean all kmalloc,etc... -int clockMonitor_free(struct pcxhr_mgr *mgr); - -//stop clock management -int clockMonitor_stop(struct pcxhr_mgr *mgr); -//start clock management. needs clockMonitor_init before -int clockMonitor_start(struct pcxhr_mgr *mgr); - - - - - -#endif //__SOUND_PCXHR_CLOCK_MONITORING_H diff --git a/snd-pcxhr-dkms/src/pcxhr_core.c b/snd-pcxhr-dkms/src/pcxhr_core.c deleted file mode 100644 index 020088b..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_core.c +++ /dev/null @@ -1,1330 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * low level interface with interrupt and message handling implementation - * - * Copyright (c) 2004 by Digigram - */ - -#include -#include -#include -#include -#include -#include -#include "pcxhr.h" -#include "pcxhr_mixer.h" -#include "pcxhr_hwdep.h" -#include "pcxhr_core.h" - -/* params used with PCXHR_PLX_MBOX0 */ -#define PCXHR_MBOX0_HF5 (1 << 0) -#define PCXHR_MBOX0_HF4 (1 << 1) -#define PCXHR_MBOX0_BOOT_HERE (1 << 23) -/* params used with PCXHR_PLX_IRQCS */ -#define PCXHR_IRQCS_ENABLE_PCIIRQ (1 << 8) -#define PCXHR_IRQCS_ENABLE_PCIDB (1 << 9) -#define PCXHR_IRQCS_ACTIVE_PCIDB (1 << 13) -/* params used with PCXHR_PLX_CHIPSC */ -#define PCXHR_CHIPSC_INIT_VALUE 0x100D767E -#define PCXHR_CHIPSC_RESET_XILINX (1 << 16) -#define PCXHR_CHIPSC_GPI_USERI (1 << 17) -#define PCXHR_CHIPSC_DATA_CLK (1 << 24) -#define PCXHR_CHIPSC_DATA_IN (1 << 26) - -/* params used with PCXHR_DSP_ICR */ -#define PCXHR_ICR_HI08_RREQ 0x01 -#define PCXHR_ICR_HI08_TREQ 0x02 -#define PCXHR_ICR_HI08_HDRQ 0x04 -#define PCXHR_ICR_HI08_HF0 0x08 -#define PCXHR_ICR_HI08_HF1 0x10 -#define PCXHR_ICR_HI08_HLEND 0x20 -#define PCXHR_ICR_HI08_INIT 0x80 -/* params used with PCXHR_DSP_CVR */ -#define PCXHR_CVR_HI08_HC 0x80 -/* params used with PCXHR_DSP_ISR */ -#define PCXHR_ISR_HI08_RXDF 0x01 -#define PCXHR_ISR_HI08_TXDE 0x02 -#define PCXHR_ISR_HI08_TRDY 0x04 -#define PCXHR_ISR_HI08_ERR 0x08 -#define PCXHR_ISR_HI08_CHK 0x10 -#define PCXHR_ISR_HI08_HREQ 0x80 - - -/* constants used for delay in msec */ -#define PCXHR_WAIT_DEFAULT 2 -#define PCXHR_WAIT_IT 25 -#define PCXHR_WAIT_IT_EXTRA 65 - -/* - * pcxhr_check_reg_bit - wait for the specified bit is set/reset on a register - * @reg: register to check - * @mask: bit mask - * @bit: resultant bit to be checked - * @time: time-out of loop in msec - * - * returns zero if a bit matches, or a negative error code. - */ -static int pcxhr_check_reg_bit(struct pcxhr_mgr *mgr, unsigned int bar, unsigned int reg, - unsigned char mask, unsigned char bit, int time, - unsigned char* read) -{ - int i = 0; - unsigned long end_time = jiffies + (time * HZ + 999) / 1000; - do { - *read = PCXHR_INPB(mgr, bar, reg); - if ((*read & mask) == bit) { - if (i > 100) - dev_dbg(&mgr->pci->dev, - "ATTENTION! check_reg(%x) loopcount=%d\n", - reg, i); - return 0; - } - i++; - } while (time_after_eq(end_time, jiffies)); - dev_err(&mgr->pci->dev, - "pcxhr_check_reg_bit: timeout, bar=%x reg=%x, mask=0x%x, val=%x\n", - bar, reg, mask, *read); - return -EIO; -} - -/* constants used with pcxhr_check_reg_bit() */ -#define PCXHR_TIMEOUT_DSP 200 - - -#define PCXHR_MASK_EXTRA_INFO 0x0000FE -#define PCXHR_MASK_IT_HF0 0x000100 -#define PCXHR_MASK_IT_HF1 0x000200 -#define PCXHR_MASK_IT_NO_HF0_HF1 0x000400 -#define PCXHR_MASK_IT_MANAGE_HF5 0x000800 -#define PCXHR_MASK_IT_WAIT 0x010000 -#define PCXHR_MASK_IT_WAIT_EXTRA 0x020000 - -#define PCXHR_IT_SEND_BYTE_XILINX (0x0000003C | PCXHR_MASK_IT_HF0) -#define PCXHR_IT_TEST_XILINX (0x0000003C | PCXHR_MASK_IT_HF1 | \ - PCXHR_MASK_IT_MANAGE_HF5) -#define PCXHR_IT_DOWNLOAD_BOOT (0x0000000C | PCXHR_MASK_IT_HF1 | \ - PCXHR_MASK_IT_MANAGE_HF5 | \ - PCXHR_MASK_IT_WAIT) -#define PCXHR_IT_RESET_BOARD_FUNC (0x0000000C | PCXHR_MASK_IT_HF0 | \ - PCXHR_MASK_IT_MANAGE_HF5 | \ - PCXHR_MASK_IT_WAIT_EXTRA) -#define PCXHR_IT_DOWNLOAD_DSP (0x0000000C | \ - PCXHR_MASK_IT_MANAGE_HF5 | \ - PCXHR_MASK_IT_WAIT) -#define PCXHR_IT_DEBUG (0x0000005A | PCXHR_MASK_IT_NO_HF0_HF1) -#define PCXHR_IT_RESET_SEMAPHORE (0x0000005C | PCXHR_MASK_IT_NO_HF0_HF1) -#define PCXHR_IT_MESSAGE (0x00000074 | PCXHR_MASK_IT_NO_HF0_HF1) -#define PCXHR_IT_RESET_CHK (0x00000076 | PCXHR_MASK_IT_NO_HF0_HF1) -#define PCXHR_IT_UPDATE_RBUFFER (0x00000078 | PCXHR_MASK_IT_NO_HF0_HF1) - -static int pcxhr_send_it_dsp(struct pcxhr_mgr *mgr, - unsigned int itdsp, int atomic) -{ - int err; - unsigned char reg; - - if (itdsp & PCXHR_MASK_IT_MANAGE_HF5) { - /* clear hf5 bit */ - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, - PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & - ~PCXHR_MBOX0_HF5); - } - if ((itdsp & PCXHR_MASK_IT_NO_HF0_HF1) == 0) { - reg = (PCXHR_ICR_HI08_RREQ | - PCXHR_ICR_HI08_TREQ | - PCXHR_ICR_HI08_HDRQ); - if (itdsp & PCXHR_MASK_IT_HF0) - reg |= PCXHR_ICR_HI08_HF0; - if (itdsp & PCXHR_MASK_IT_HF1) - reg |= PCXHR_ICR_HI08_HF1; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); - } - reg = (unsigned char)(((itdsp & PCXHR_MASK_EXTRA_INFO) >> 1) | - PCXHR_CVR_HI08_HC); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_CVR, reg); - if (itdsp & PCXHR_MASK_IT_WAIT) { - if (atomic) - mdelay(PCXHR_WAIT_IT); - else - msleep(PCXHR_WAIT_IT); - } - if (itdsp & PCXHR_MASK_IT_WAIT_EXTRA) { - if (atomic) - mdelay(PCXHR_WAIT_IT_EXTRA); - else - msleep(PCXHR_WAIT_IT); - } - /* wait for CVR_HI08_HC == 0 */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_CVR, PCXHR_CVR_HI08_HC, 0, - PCXHR_TIMEOUT_DSP, ®); - if (err) { - dev_err(&mgr->pci->dev, "pcxhr_send_it_dsp : TIMEOUT CVR\n"); - return err; - } - if (itdsp & PCXHR_MASK_IT_MANAGE_HF5) { - /* wait for hf5 bit */ - err = pcxhr_check_reg_bit(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, - PCXHR_MBOX0_HF5, - PCXHR_MBOX0_HF5, - PCXHR_TIMEOUT_DSP, - ®); - if (err) { - dev_err(&mgr->pci->dev, - "pcxhr_send_it_dsp : TIMEOUT HF5\n"); - return err; - } - } - return 0; /* retry not handled here */ -} - -void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr) -{ - if (pcxhr_is_device_compatible_IE (mgr->pci->subsystem_device, PCXHR_DEVICE_IE5_ID)){ - unsigned int chipsc; - chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); - chipsc &= ~PCXHR_CHIPSC_RESET_XILINX; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC,chipsc); - mdelay(200); - - chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); - chipsc |= PCXHR_CHIPSC_RESET_XILINX; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); - mdelay(20); - }else{ - /* reset second xilinx */ - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, - PCXHR_CHIPSC_INIT_VALUE & ~PCXHR_CHIPSC_RESET_XILINX); - mdelay(20); - } -} - -static void pcxhr_enable_irq(struct pcxhr_mgr *mgr, int enable) -{ - unsigned int reg = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); - /* enable/disable interrupts */ - if (enable) - reg |= (PCXHR_IRQCS_ENABLE_PCIIRQ | PCXHR_IRQCS_ENABLE_PCIDB); - else - reg &= ~(PCXHR_IRQCS_ENABLE_PCIIRQ | PCXHR_IRQCS_ENABLE_PCIDB); - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS, reg); -} - -void pcxhr_reset_dsp(struct pcxhr_mgr *mgr) -{ - /* disable interrupts */ - pcxhr_enable_irq(mgr, 0); - - /* let's reset the DSP */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, 0); - msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, 3); - msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ - - /* reset mailbox */ - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, 0); -} - -void pcxhr_enable_dsp(struct pcxhr_mgr *mgr) -{ - /* enable interrupts */ - pcxhr_enable_irq(mgr, 1); -} - -/* - * load the xilinx image - */ -int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, - const struct firmware *xilinx, int second) -{ - unsigned int i; - unsigned int chipsc; - unsigned char data; - unsigned char mask; - const unsigned char *image; - - /* test first xilinx */ - chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); - /* REV01 cards do not support the PCXHR_CHIPSC_GPI_USERI bit anymore */ - /* this bit will always be 1; - * no possibility to test presence of first xilinx - */ - if(second) { - if ((chipsc & PCXHR_CHIPSC_GPI_USERI) == 0) { - dev_err(&mgr->pci->dev, "error loading first xilinx\n"); - return -EINVAL; - } - /* activate second xilinx */ - chipsc |= PCXHR_CHIPSC_RESET_XILINX; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); - msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ - } - image = xilinx->data; - for (i = 0; i < xilinx->size; i++, image++) { - data = *image; - mask = 0x80; - while (mask) { - chipsc &= ~(PCXHR_CHIPSC_DATA_CLK | - PCXHR_CHIPSC_DATA_IN); - if (data & mask) - chipsc |= PCXHR_CHIPSC_DATA_IN; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); - chipsc |= PCXHR_CHIPSC_DATA_CLK; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); - mask >>= 1; - } - /* don't take too much time in this loop... */ - cond_resched(); - } - chipsc &= ~(PCXHR_CHIPSC_DATA_CLK | PCXHR_CHIPSC_DATA_IN); - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); - /* wait 2 msec (time to boot the xilinx before any access) */ - msleep( PCXHR_WAIT_DEFAULT ); - return 0; -} - -/* - * send an executable file to the DSP - */ -static int pcxhr_download_dsp(struct pcxhr_mgr *mgr, const struct firmware *dsp) -{ - int err; - unsigned int i; - unsigned int len; - const unsigned char *data; - unsigned char dummy; - /* check the length of boot image */ - if (dsp->size <= 0) - return -EINVAL; - if (dsp->size % 3) - return -EINVAL; - if (snd_BUG_ON(!dsp->data)) - return -EINVAL; - /* transfert data buffer from PC to DSP */ - for (i = 0; i < dsp->size; i += 3) { - data = dsp->data + i; - if (i == 0) { - /* test data header consistency */ - len = (unsigned int)((data[0]<<16) + - (data[1]<<8) + - data[2]); - if (len && (dsp->size != (len + 2) * 3)) - return -EINVAL; - } - /* wait DSP ready for new transfer */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_TRDY, - PCXHR_ISR_HI08_TRDY, - PCXHR_TIMEOUT_DSP, &dummy); - if (err) { - dev_err(&mgr->pci->dev, - "dsp loading error at position %d\n", i); - return err; - } - /* send host data */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, data[0]); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, data[1]); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, data[2]); - - /* don't take too much time in this loop... */ - cond_resched(); - } - /* give some time to boot the DSP */ - msleep(PCXHR_WAIT_DEFAULT); - return 0; -} - -/* - * load the eeprom image - */ -int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, - const struct firmware *eeprom) -{ - int err; - unsigned char reg; - - /* init value of the ICR register */ - reg = PCXHR_ICR_HI08_RREQ | PCXHR_ICR_HI08_TREQ | PCXHR_ICR_HI08_HDRQ; - if (PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & PCXHR_MBOX0_BOOT_HERE) { - /* no need to load the eeprom binary, - * but init the HI08 interface - */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg | PCXHR_ICR_HI08_INIT); - msleep(PCXHR_WAIT_DEFAULT); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); - msleep(PCXHR_WAIT_DEFAULT); - dev_dbg(&mgr->pci->dev, "no need to load eeprom boot\n"); - return 0; - } - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); - - err = pcxhr_download_dsp(mgr, eeprom); - if (err) - return err; - /* wait for chk bit */ - return pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, - PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); -} - -/* - * load the boot image - */ -int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot) -{ - int err; - unsigned int physaddr = mgr->hostport.addr; - unsigned char dummy; - - /* send the hostport address to the DSP (only the upper 24 bit !) */ - if (snd_BUG_ON(physaddr & 0xff)) - return -EINVAL; - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX1, (physaddr >> 8)); - - err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_BOOT, 0); - if (err) - return err; - /* clear hf5 bit */ - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, - PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & ~PCXHR_MBOX0_HF5); - - err = pcxhr_download_dsp(mgr, boot); - if (err) - return err; - /* wait for hf5 bit */ - return pcxhr_check_reg_bit(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, PCXHR_MBOX0_HF5, - PCXHR_MBOX0_HF5, PCXHR_TIMEOUT_DSP, &dummy); -} - -/* - * load the final dsp image - */ -int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp) -{ - int err; - unsigned char dummy; - err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_BOARD_FUNC, 0); - if (err) - return err; - err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_DSP, 0); - if (err) - return err; - err = pcxhr_download_dsp(mgr, dsp); - if (err) - return err; - /* wait for chk bit */ - return pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_CHK, - PCXHR_ISR_HI08_CHK, - PCXHR_TIMEOUT_DSP, &dummy); -} - - -struct pcxhr_cmd_info { - u32 opcode; /* command word */ - u16 st_length; /* status length */ - u16 st_type; /* status type (RMH_SSIZE_XXX) */ -}; - -/* RMH status type */ -enum { - RMH_SSIZE_FIXED = 0, /* status size fix (st_length = 0..x) */ - RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */ - RMH_SSIZE_MASK = 2, /* status size given in bitmask */ -}; - -/* - * Array of DSP commands - */ -static const struct pcxhr_cmd_info pcxhr_dsp_cmds[] = { -[CMD_VERSION] = { 0x010000, 1, RMH_SSIZE_FIXED }, -[CMD_SUPPORTED] = { 0x020000, 4, RMH_SSIZE_FIXED }, -[CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED }, -[CMD_SEND_IRQA] = { 0x070001, 0, RMH_SSIZE_FIXED }, -[CMD_ACCESS_IO_WRITE] = { 0x090000, 1, RMH_SSIZE_ARG }, -[CMD_ACCESS_IO_READ] = { 0x094000, 1, RMH_SSIZE_ARG }, -[CMD_ASYNC] = { 0x0a0000, 1, RMH_SSIZE_ARG }, -[CMD_MODIFY_CLOCK] = { 0x0d0000, 0, RMH_SSIZE_FIXED }, -[CMD_RESYNC_AUDIO_INPUTS] = { 0x0e0000, 0, RMH_SSIZE_FIXED }, -[CMD_GET_DSP_RESOURCES] = { 0x100000, 4, RMH_SSIZE_FIXED }, -[CMD_SET_TIMER_INTERRUPT] = { 0x110000, 0, RMH_SSIZE_FIXED }, -[CMD_RES_PIPE] = { 0x400000, 0, RMH_SSIZE_FIXED }, -[CMD_FREE_PIPE] = { 0x410000, 0, RMH_SSIZE_FIXED }, -[CMD_CONF_PIPE] = { 0x422101, 0, RMH_SSIZE_FIXED }, -[CMD_STOP_PIPE] = { 0x470004, 0, RMH_SSIZE_FIXED }, -[CMD_PIPE_SAMPLE_COUNT] = { 0x49a000, 2, RMH_SSIZE_FIXED }, -[CMD_CAN_START_PIPE] = { 0x4b0000, 1, RMH_SSIZE_FIXED }, -[CMD_START_STREAM] = { 0x802000, 0, RMH_SSIZE_FIXED }, -[CMD_STREAM_OUT_LEVEL_ADJUST] = { 0x822000, 0, RMH_SSIZE_FIXED }, -[CMD_STOP_STREAM] = { 0x832000, 0, RMH_SSIZE_FIXED }, -[CMD_UPDATE_R_BUFFERS] = { 0x840000, 0, RMH_SSIZE_FIXED }, -[CMD_FORMAT_STREAM_OUT] = { 0x860000, 0, RMH_SSIZE_FIXED }, -[CMD_FORMAT_STREAM_IN] = { 0x870000, 0, RMH_SSIZE_FIXED }, -[CMD_STREAM_SAMPLE_COUNT] = { 0x902000, 2, RMH_SSIZE_FIXED }, -[CMD_AUDIO_LEVEL_ADJUST] = { 0xc22000, 0, RMH_SSIZE_FIXED }, -[CMD_GET_TIME_CODE] = { 0x060000, 5, RMH_SSIZE_FIXED }, -[CMD_MANAGE_SIGNAL] = { 0x0f0000, 0, RMH_SSIZE_FIXED }, -}; - -#ifdef CONFIG_SND_DEBUG_VERBOSE -static const char * const cmd_names[] = { -[CMD_VERSION] = "CMD_VERSION", -[CMD_SUPPORTED] = "CMD_SUPPORTED", -[CMD_TEST_IT] = "CMD_TEST_IT", -[CMD_SEND_IRQA] = "CMD_SEND_IRQA", -[CMD_ACCESS_IO_WRITE] = "CMD_ACCESS_IO_WRITE", -[CMD_ACCESS_IO_READ] = "CMD_ACCESS_IO_READ", -[CMD_ASYNC] = "CMD_ASYNC", -[CMD_MODIFY_CLOCK] = "CMD_MODIFY_CLOCK", -[CMD_RESYNC_AUDIO_INPUTS] = "CMD_RESYNC_AUDIO_INPUTS", -[CMD_GET_DSP_RESOURCES] = "CMD_GET_DSP_RESOURCES", -[CMD_SET_TIMER_INTERRUPT] = "CMD_SET_TIMER_INTERRUPT", -[CMD_RES_PIPE] = "CMD_RES_PIPE", -[CMD_FREE_PIPE] = "CMD_FREE_PIPE", -[CMD_CONF_PIPE] = "CMD_CONF_PIPE", -[CMD_STOP_PIPE] = "CMD_STOP_PIPE", -[CMD_PIPE_SAMPLE_COUNT] = "CMD_PIPE_SAMPLE_COUNT", -[CMD_CAN_START_PIPE] = "CMD_CAN_START_PIPE", -[CMD_START_STREAM] = "CMD_START_STREAM", -[CMD_STREAM_OUT_LEVEL_ADJUST] = "CMD_STREAM_OUT_LEVEL_ADJUST", -[CMD_STOP_STREAM] = "CMD_STOP_STREAM", -[CMD_UPDATE_R_BUFFERS] = "CMD_UPDATE_R_BUFFERS", -[CMD_FORMAT_STREAM_OUT] = "CMD_FORMAT_STREAM_OUT", -[CMD_FORMAT_STREAM_IN] = "CMD_FORMAT_STREAM_IN", -[CMD_STREAM_SAMPLE_COUNT] = "CMD_STREAM_SAMPLE_COUNT", -[CMD_AUDIO_LEVEL_ADJUST] = "CMD_AUDIO_LEVEL_ADJUST", -[CMD_GET_TIME_CODE] = "CMD_GET_TIME_CODE", -[CMD_MANAGE_SIGNAL] = "CMD_MANAGE_SIGNAL", -}; -#endif - - -static int pcxhr_read_rmh_status(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) -{ - int err; - int i; - u32 data; - u32 size_mask; - unsigned char reg; - int max_stat_len; - - if (rmh->stat_len < PCXHR_SIZE_MAX_STATUS) - max_stat_len = PCXHR_SIZE_MAX_STATUS; - else max_stat_len = rmh->stat_len; - - for (i = 0; i < rmh->stat_len; i++) { - /* wait for receiver full */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_RXDF, - PCXHR_ISR_HI08_RXDF, - PCXHR_TIMEOUT_DSP, ®); - if (err) { - dev_err(&mgr->pci->dev, - "ERROR RMH stat: ISR:RXDF=1 (ISR = %x; i=%d )\n", - reg, i); - return err; - } - /* read data */ - data = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH) << 16; - data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM) << 8; - data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL); - - /* need to update rmh->stat_len on the fly ?? */ - if (!i) { - if (rmh->dsp_stat != RMH_SSIZE_FIXED) { - if (rmh->dsp_stat == RMH_SSIZE_ARG) { - rmh->stat_len = (data & 0x0000ff) + 1; - data &= 0xffff00; - } else { - /* rmh->dsp_stat == RMH_SSIZE_MASK */ - rmh->stat_len = 1; - size_mask = data; - while (size_mask) { - if (size_mask & 1) - rmh->stat_len++; - size_mask >>= 1; - } - } - } - } -#ifdef CONFIG_SND_DEBUG_VERBOSE - if (rmh->cmd_idx < CMD_LAST_INDEX) - dev_dbg(&mgr->pci->dev, " stat[%d]=%x\n", i, data); -#endif - if (i < max_stat_len) - rmh->stat[i] = data; - } - if (rmh->stat_len > max_stat_len) { - dev_dbg(&mgr->pci->dev, "PCXHR : rmh->stat_len=%x too big\n", - rmh->stat_len); - rmh->stat_len = max_stat_len; - } - return 0; -} - -static int pcxhr_send_msg_nolock(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) -{ - int err; - int i; - u32 data; - unsigned char reg; - - if (snd_BUG_ON(rmh->cmd_len >= PCXHR_SIZE_MAX_CMD)) - return -EINVAL; - err = pcxhr_send_it_dsp(mgr, PCXHR_IT_MESSAGE, 1); - if (err) { - dev_err(&mgr->pci->dev, - "pcxhr_send_message : ED_DSP_CRASHED\n"); - return err; - } - /* wait for chk bit */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, - PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - /* reset irq chk */ - err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_CHK, 1); - if (err) - return err; - /* wait for chk bit == 0*/ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, 0, - PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - - data = rmh->cmd[0]; - - if (rmh->cmd_len > 1) - data |= 0x008000; /* MASK_MORE_THAN_1_WORD_COMMAND */ - else - data &= 0xff7fff; /* MASK_1_WORD_COMMAND */ -#ifdef CONFIG_SND_DEBUG_VERBOSE - if (rmh->cmd_idx < CMD_LAST_INDEX) - dev_dbg(&mgr->pci->dev, "MSG cmd[0]=%x (%s)\n", - data, cmd_names[rmh->cmd_idx]); -#endif - - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_TRDY, - PCXHR_ISR_HI08_TRDY, PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); - - if (rmh->cmd_len > 1) { - /* send length */ - data = rmh->cmd_len - 1; - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_TRDY, - PCXHR_ISR_HI08_TRDY, - PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); - - for (i=1; i < rmh->cmd_len; i++) { - /* send other words */ - data = rmh->cmd[i]; -#ifdef CONFIG_SND_DEBUG_VERBOSE - if (rmh->cmd_idx < CMD_LAST_INDEX) - dev_dbg(&mgr->pci->dev, - " cmd[%d]=%x\n", i, data); -#endif - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_TRDY, - PCXHR_ISR_HI08_TRDY, - PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); - } - } - /* wait for chk bit */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, - PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); - if (err) - return err; - /* test status ISR */ - if (reg & PCXHR_ISR_HI08_ERR) { - /* ERROR, wait for receiver full */ - err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, - PCXHR_ISR_HI08_RXDF, - PCXHR_ISR_HI08_RXDF, - PCXHR_TIMEOUT_DSP, ®); - if (err) { - dev_err(&mgr->pci->dev, - "ERROR RMH: ISR:RXDF=1 (ISR = %x)\n", reg); - return err; - } - /* read error code */ - data = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH) << 16; - data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM) << 8; - data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL); - dev_err(&mgr->pci->dev, "ERROR RMH(%d): 0x%x\n", - rmh->cmd_idx, data); - err = -EINVAL; - } else { - /* read the response data */ - err = pcxhr_read_rmh_status(mgr, rmh); - } - /* reset semaphore */ - if (pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_SEMAPHORE, 1) < 0) - return -EIO; - return err; -} - - -/** - * pcxhr_init_rmh - initialize the RMH instance - * @rmh: the rmh pointer to be initialized - * @cmd: the rmh command to be set - */ -void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd) -{ - if (snd_BUG_ON(cmd >= CMD_LAST_INDEX)) - return; - rmh->cmd[0] = pcxhr_dsp_cmds[cmd].opcode; - rmh->cmd_len = 1; - rmh->stat_len = pcxhr_dsp_cmds[cmd].st_length; - rmh->dsp_stat = pcxhr_dsp_cmds[cmd].st_type; - rmh->cmd_idx = cmd; -} - - -void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh *rmh, int capture, - unsigned int param1, unsigned int param2, - unsigned int param3) -{ - snd_BUG_ON(param1 > MASK_FIRST_FIELD); - if (capture) - rmh->cmd[0] |= 0x800; /* COMMAND_RECORD_MASK */ - if (param1) - rmh->cmd[0] |= (param1 << FIELD_SIZE); - if (param2) { - snd_BUG_ON(param2 > MASK_FIRST_FIELD); - rmh->cmd[0] |= param2; - } - if(param3) { - snd_BUG_ON(param3 > MASK_DSP_WORD); - rmh->cmd[1] = param3; - rmh->cmd_len = 2; - } -} - -/* - * pcxhr_send_msg - send a DSP message with spinlock - * @rmh: the rmh record to send and receive - * - * returns 0 if successful, or a negative error code. - */ -int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) -{ - int err; - - mutex_lock(&mgr->msg_lock); - err = pcxhr_send_msg_nolock(mgr, rmh); - mutex_unlock(&mgr->msg_lock); - return err; -} - -static inline int pcxhr_pipes_running(struct pcxhr_mgr *mgr) -{ - int start_mask = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX2); - /* least significant 12 bits are the pipe states - * for the playback audios - * next 12 bits are the pipe states for the capture audios - * (PCXHR_PIPE_STATE_CAPTURE_OFFSET) - */ - start_mask &= 0x00ffffff; - dev_dbg(&mgr->pci->dev, "CMD_PIPE_STATE MBOX2=0x%06x\n", start_mask); - return start_mask; -} - -#define PCXHR_PIPE_STATE_CAPTURE_OFFSET 12 -#define MAX_WAIT_FOR_DSP 20 - -static int pcxhr_prepair_pipe_start(struct pcxhr_mgr *mgr, - int audio_mask, int *retry) -{ - struct pcxhr_rmh rmh; - int err; - int audio = 0; - - *retry = 0; - while (audio_mask) { - if (audio_mask & 1) { - pcxhr_init_rmh(&rmh, CMD_CAN_START_PIPE); - if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) { - /* can start playback pipe */ - pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); - } else { - /* can start capture pipe */ - pcxhr_set_pipe_cmd_params(&rmh, 1, audio - - PCXHR_PIPE_STATE_CAPTURE_OFFSET, - 0, 0); - } - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - dev_err(&mgr->pci->dev, - "error pipe start " - "(CMD_CAN_START_PIPE) err=%x!\n", - err); - return err; - } - /* if the pipe couldn't be prepaired for start, - * retry it later - */ - if (rmh.stat[0] == 0) - *retry |= (1<>=1; - audio++; - } - return 0; -} - -static int pcxhr_stop_pipes(struct pcxhr_mgr *mgr, int audio_mask) -{ - struct pcxhr_rmh rmh; - int err; - int audio = 0; - - while (audio_mask) { - if (audio_mask & 1) { - pcxhr_init_rmh(&rmh, CMD_STOP_PIPE); - if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) { - /* stop playback pipe */ - pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); - } else { - /* stop capture pipe */ - pcxhr_set_pipe_cmd_params(&rmh, 1, audio - - PCXHR_PIPE_STATE_CAPTURE_OFFSET, - 0, 0); - } - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - dev_err(&mgr->pci->dev, - "error pipe stop " - "(CMD_STOP_PIPE) err=%x!\n", err); - return err; - } - } - audio_mask>>=1; - audio++; - } - return 0; -} - -static int pcxhr_toggle_pipes(struct pcxhr_mgr *mgr, int audio_mask) -{ - struct pcxhr_rmh rmh; - int err; - int audio = 0; - - while (audio_mask) { - if (audio_mask & 1) { - pcxhr_init_rmh(&rmh, CMD_CONF_PIPE); - if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) - pcxhr_set_pipe_cmd_params(&rmh, 0, 0, 0, - 1 << audio); - else - pcxhr_set_pipe_cmd_params(&rmh, 1, 0, 0, - 1 << (audio - PCXHR_PIPE_STATE_CAPTURE_OFFSET)); - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - dev_err(&mgr->pci->dev, - "error pipe start " - "(CMD_CONF_PIPE) err=%x!\n", err); - return err; - } - } - audio_mask>>=1; - audio++; - } - /* now fire the interrupt on the card */ - pcxhr_init_rmh(&rmh, CMD_SEND_IRQA); - err = pcxhr_send_msg(mgr, &rmh); - if (err) { - dev_err(&mgr->pci->dev, - "error pipe start (CMD_SEND_IRQA) err=%x!\n", - err); - return err; - } - return 0; -} - - - -int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, - int capture_mask, int start) -{ - int state, i, err; - int audio_mask; - -#ifdef CONFIG_SND_DEBUG_VERBOSE - ktime_t start_time, stop_time, diff_time; - - start_time = ktime_get(); -#endif - audio_mask = (playback_mask | - (capture_mask << PCXHR_PIPE_STATE_CAPTURE_OFFSET)); - /* current pipe state (playback + record) */ - state = pcxhr_pipes_running(mgr); - dev_dbg(&mgr->pci->dev, - "pcxhr_set_pipe_state %s (mask %x current %x)\n", - start ? "START" : "STOP", audio_mask, state); - if (start) { - /* start only pipes that are not yet started */ - audio_mask &= ~state; - state = audio_mask; - for (i = 0; i < MAX_WAIT_FOR_DSP; i++) { - err = pcxhr_prepair_pipe_start(mgr, state, &state); - if (err) - return err; - if (state == 0) - break; /* success, all pipes prepaired */ - mdelay(1); /* wait 1 millisecond and retry */ - } - } else { - audio_mask &= state; /* stop only pipes that are started */ - } - if (audio_mask == 0) - return 0; - - err = pcxhr_toggle_pipes(mgr, audio_mask); - if (err) - return err; - - i = 0; - while (1) { - state = pcxhr_pipes_running(mgr); - /* have all pipes the new state ? */ - if ((state & audio_mask) == (start ? audio_mask : 0)) - break; - if (++i >= MAX_WAIT_FOR_DSP * 100) { - dev_err(&mgr->pci->dev, "error pipe start/stop\n"); - return -EBUSY; - } - udelay(10); /* wait 10 microseconds */ - } - if (!start) { - err = pcxhr_stop_pipes(mgr, audio_mask); - if (err) - return err; - } -#ifdef CONFIG_SND_DEBUG_VERBOSE - stop_time = ktime_get(); - diff_time = ktime_sub(stop_time, start_time); - dev_dbg(&mgr->pci->dev, "***SET PIPE STATE*** TIME = %ld (err = %x)\n", - (long)(ktime_to_ns(diff_time)), err); -#endif - return 0; -} - -int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, - unsigned int value, int *changed) -{ - struct pcxhr_rmh rmh; - int err; - - mutex_lock(&mgr->msg_lock); - if ((mgr->io_num_reg_cont & mask) == value) { - dev_dbg(&mgr->pci->dev, - "IO_NUM_REG_CONT mask %x already is set to %x\n", - mask, value); - if (changed) - *changed = 0; - mutex_unlock(&mgr->msg_lock); - return 0; /* already programmed */ - } - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd[0] |= IO_NUM_REG_CONT; - rmh.cmd[1] = mask; - rmh.cmd[2] = value; - rmh.cmd_len = 3; - err = pcxhr_send_msg_nolock(mgr, &rmh); - if (err == 0) { - mgr->io_num_reg_cont &= ~mask; - mgr->io_num_reg_cont |= value; - if (changed) - *changed = 1; - } - mutex_unlock(&mgr->msg_lock); - return err; -} - -#define PCXHR_IRQ_TIMER 0x000300 -#define PCXHR_IRQ_FREQ_CHANGE 0x000800 -#define PCXHR_IRQ_TIME_CODE 0x001000 -#define PCXHR_IRQ_NOTIFY 0x002000 -#define PCXHR_IRQ_ASYNC 0x008000 -#define PCXHR_IRQ_MASK 0x00bb00 -#define PCXHR_FATAL_DSP_ERR 0xff0000 - -enum pcxhr_async_err_src { - PCXHR_ERR_PIPE, - PCXHR_ERR_STREAM, - PCXHR_ERR_AUDIO -}; - -static int pcxhr_handle_async_err(struct pcxhr_mgr *mgr, u32 err, - enum pcxhr_async_err_src err_src, int pipe, - int is_capture) -{ - static const char * const err_src_name[] = { - [PCXHR_ERR_PIPE] = "Pipe", - [PCXHR_ERR_STREAM] = "Stream", - [PCXHR_ERR_AUDIO] = "Audio" - }; - - if (err & 0xfff) - err &= 0xfff; - else - err = ((err >> 12) & 0xfff); - if (!err) - return 0; - dev_dbg(&mgr->pci->dev, "CMD_ASYNC : Error %s %s Pipe %d err=%x\n", - err_src_name[err_src], - is_capture ? "Record" : "Play", pipe, err); - if (err == 0xe01) - mgr->async_err_stream_xrun++; - else if (err == 0xe10) - mgr->async_err_pipe_xrun++; - else - mgr->async_err_other_last = (int)err; - return 1; -} - - -static void pcxhr_msg_thread(struct pcxhr_mgr *mgr) -{ - struct pcxhr_rmh *prmh = mgr->prmh; - int err; - int i, j; - - if (mgr->src_it_dsp & PCXHR_IRQ_FREQ_CHANGE) - dev_dbg(&mgr->pci->dev, - "PCXHR_IRQ_FREQ_CHANGE event occurred\n"); - if (mgr->src_it_dsp & PCXHR_IRQ_TIME_CODE) - dev_dbg(&mgr->pci->dev, - "PCXHR_IRQ_TIME_CODE event occurred\n"); - if (mgr->src_it_dsp & PCXHR_IRQ_NOTIFY) - dev_dbg(&mgr->pci->dev, - "PCXHR_IRQ_NOTIFY event occurred\n"); - if (mgr->src_it_dsp & (PCXHR_IRQ_FREQ_CHANGE | PCXHR_IRQ_TIME_CODE)) { - /* clear events FREQ_CHANGE and TIME_CODE */ - pcxhr_init_rmh(prmh, CMD_TEST_IT); - err = pcxhr_send_msg(mgr, prmh); - dev_dbg(&mgr->pci->dev, "CMD_TEST_IT : err=%x, stat=%x\n", - err, prmh->stat[0]); - } - if (mgr->src_it_dsp & PCXHR_IRQ_ASYNC) { - dev_dbg(&mgr->pci->dev, - "PCXHR_IRQ_ASYNC event occurred\n"); - - pcxhr_init_rmh(prmh, CMD_ASYNC); - prmh->cmd[0] |= 1; /* add SEL_ASYNC_EVENTS */ - /* this is the only one extra long response command */ - prmh->stat_len = PCXHR_SIZE_MAX_LONG_STATUS; - err = pcxhr_send_msg(mgr, prmh); - if (err) - dev_err(&mgr->pci->dev, "ERROR pcxhr_msg_thread=%x;\n", - err); - i = 1; - while (i < prmh->stat_len) { - int nb_audio = ((prmh->stat[i] >> FIELD_SIZE) & - MASK_FIRST_FIELD); - int nb_stream = ((prmh->stat[i] >> (2*FIELD_SIZE)) & - MASK_FIRST_FIELD); - int pipe = prmh->stat[i] & MASK_FIRST_FIELD; - int is_capture = prmh->stat[i] & 0x400000; - u32 err2; - - if (prmh->stat[i] & 0x800000) { /* if BIT_END */ - dev_dbg(&mgr->pci->dev, - "TASKLET : End%sPipe %d\n", - is_capture ? "Record" : "Play", - pipe); - } - i++; - err2 = prmh->stat[i] ? prmh->stat[i] : prmh->stat[i+1]; - if (err2) - pcxhr_handle_async_err(mgr, err2, - PCXHR_ERR_PIPE, - pipe, is_capture); - i += 2; - for (j = 0; j < nb_stream; j++) { - err2 = prmh->stat[i] ? - prmh->stat[i] : prmh->stat[i+1]; - if (err2) - pcxhr_handle_async_err(mgr, err2, - PCXHR_ERR_STREAM, - pipe, - is_capture); - i += 2; - } - for (j = 0; j < nb_audio; j++) { - err2 = prmh->stat[i] ? - prmh->stat[i] : prmh->stat[i+1]; - if (err2) - pcxhr_handle_async_err(mgr, err2, - PCXHR_ERR_AUDIO, - pipe, - is_capture); - i += 2; - } - } - } -} - -static u_int64_t pcxhr_stream_read_position(struct pcxhr_mgr *mgr, - struct pcxhr_stream *stream) -{ - u_int64_t hw_sample_count; - struct pcxhr_rmh rmh; - int err, stream_mask; - - stream_mask = stream->pipe->is_capture ? 1 : 1<substream->number; - - /* get sample count for one stream */ - pcxhr_init_rmh(&rmh, CMD_STREAM_SAMPLE_COUNT); - pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, - stream->pipe->first_audio, 0, stream_mask); - /* rmh.stat_len = 2; */ /* 2 resp data for each stream of the pipe */ - - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return 0; - - hw_sample_count = ((u_int64_t)rmh.stat[0]) << 24; - hw_sample_count += (u_int64_t)rmh.stat[1]; - - dev_dbg(&mgr->pci->dev, - "stream %c%d : abs samples real(%llu) timer(%llu)\n", - stream->pipe->is_capture ? 'C' : 'P', - stream->substream->number, - hw_sample_count, - stream->timer_abs_periods + stream->timer_period_frag + - mgr->granularity); - return hw_sample_count; -} - -static void pcxhr_update_timer_pos(struct pcxhr_mgr *mgr, - struct pcxhr_stream *stream, - int samples_to_add) -{ - if (stream->substream && - (stream->status == PCXHR_STREAM_STATUS_RUNNING)) { - u_int64_t new_sample_count; - int elapsed = 0; - int hardware_read = 0; - struct snd_pcm_runtime *runtime = stream->substream->runtime; - - if (samples_to_add < 0) { - stream->timer_is_synced = 0; - /* add default if no hardware_read possible */ - samples_to_add = mgr->granularity; - } - - if (!stream->timer_is_synced) { - if ((stream->timer_abs_periods != 0) || - ((stream->timer_period_frag + samples_to_add) >= - runtime->period_size)) { - new_sample_count = - pcxhr_stream_read_position(mgr, stream); - hardware_read = 1; - if (new_sample_count >= mgr->granularity) { - /* sub security offset because of - * jitter and finer granularity of - * dsp time (MBOX4) - */ - new_sample_count -= mgr->granularity; - stream->timer_is_synced = 1; - } - } - } - if (!hardware_read) { - /* if we didn't try to sync the position, increment it - * by PCXHR_GRANULARITY every timer interrupt - */ - new_sample_count = stream->timer_abs_periods + - stream->timer_period_frag + samples_to_add; - } - while (1) { - u_int64_t new_elapse_pos = stream->timer_abs_periods + - runtime->period_size; - if (new_elapse_pos > new_sample_count) - break; - elapsed = 1; - stream->timer_buf_periods++; - if (stream->timer_buf_periods >= runtime->periods) - stream->timer_buf_periods = 0; - stream->timer_abs_periods = new_elapse_pos; - } - if (new_sample_count >= stream->timer_abs_periods) { - stream->timer_period_frag = - (u_int32_t)(new_sample_count - - stream->timer_abs_periods); - } else { - dev_err(&mgr->pci->dev, - "ERROR new_sample_count too small ??? %ld\n", - (long unsigned int)new_sample_count); - } - - if (elapsed) { - mutex_unlock(&mgr->lock); - snd_pcm_period_elapsed(stream->substream); - mutex_lock(&mgr->lock); - } - } -} - -irqreturn_t pcxhr_interrupt(int irq, void *dev_id) -{ - struct pcxhr_mgr *mgr = dev_id; - unsigned int reg = 0; - unsigned int tmp; - bool wake_thread = false; - - mgr->dbg_cpt.interrupts_all++; - - //*************************ATTENTION*************************// -// mgr->dbg_cpt.interrupts_all++; -// mgr->dbg_cpt.interrupts_none++; - /* this device did not cause the interrupt */ -// return IRQ_NONE; -// return IRQ_HANDLED; - //*************************ATTENTION*************************// - - - //mgr->dbg_cpt.interrupts_all++; - - if (irq) { - reg = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); - if (! (reg & PCXHR_IRQCS_ACTIVE_PCIDB)) { - mgr->dbg_cpt.interrupts_none++; - /* this device did not cause the interrupt */ - return IRQ_NONE; - } - } - else { - mgr->hr_timer_calls++; - } - /* clear interrupt */ - reg = 0; - tmp = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); - do { - PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, tmp); - reg |= tmp; - tmp = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); - } while ( tmp != 0 ); - - if ((reg & (PCXHR_IRQ_TIMER | PCXHR_IRQ_MASK)) == 0) { - mgr->dbg_cpt.interrupts_dummy++; - } - /* timer irq occurred */ - if (reg & PCXHR_IRQ_TIMER) { - int timer_toggle = reg & PCXHR_IRQ_TIMER; - if (timer_toggle == mgr->timer_toggle) { - dev_dbg(&mgr->pci->dev, "ERROR TIMER TOGGLE\n"); - mgr->dsp_time_err++; - } - - mgr->timer_toggle = timer_toggle; - mgr->src_it_dsp = reg; - wake_thread = true; - } - - /* other irq's handled in the thread */ - if (reg & PCXHR_IRQ_MASK) { - if (reg & PCXHR_IRQ_ASYNC) { - /* as we didn't request any async notifications, - * some kind of xrun error will probably occurred - */ - /* better resynchronize all streams next interrupt : */ - mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; - } - mgr->src_it_dsp = reg; - wake_thread = true; - } -#ifdef CONFIG_SND_DEBUG_VERBOSE - if (reg & PCXHR_FATAL_DSP_ERR) - dev_dbg(&mgr->pci->dev, "FATAL DSP ERROR : %x\n", reg); -#endif - - return wake_thread ? IRQ_WAKE_THREAD : IRQ_HANDLED; -} - -irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id) -{ - struct pcxhr_mgr *mgr = dev_id; - int i, j; - struct snd_pcxhr *chip; - - mutex_lock(&mgr->lock); - if (mgr->src_it_dsp & PCXHR_IRQ_TIMER) { - /* is a 24 bit counter */ - int dsp_time_new = - PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; - int dsp_time_diff = dsp_time_new - mgr->dsp_time_last; - - if ((dsp_time_diff < 0) && - (mgr->dsp_time_last != PCXHR_DSP_TIME_INVALID)) { - /* handle dsp counter wraparound without resync */ - int tmp_diff = dsp_time_diff + PCXHR_DSP_TIME_MASK + 1; - dev_dbg(&mgr->pci->dev, - "WARNING DSP timestamp old(%d) new(%d)", - mgr->dsp_time_last, dsp_time_new); - if (tmp_diff > 0 && tmp_diff <= (2*mgr->granularity)) { - dev_dbg(&mgr->pci->dev, - "-> timestamp wraparound OK: " - "diff=%d\n", tmp_diff); - dsp_time_diff = tmp_diff; - } else { - dev_dbg(&mgr->pci->dev, - "-> resynchronize all streams\n"); - mgr->dsp_time_err++; - } - } -#ifdef CONFIG_SND_DEBUG_VERBOSE - if (dsp_time_diff == 0) - dev_dbg(&mgr->pci->dev, - "ERROR DSP TIME NO DIFF time(%d)\n", - dsp_time_new); - else if (dsp_time_diff >= (2*mgr->granularity)) - dev_dbg(&mgr->pci->dev, - "ERROR DSP TIME TOO BIG old(%d) add(%d)\n", - mgr->dsp_time_last, - dsp_time_new - mgr->dsp_time_last); - else if (dsp_time_diff % mgr->granularity) - dev_dbg(&mgr->pci->dev, - "ERROR DSP TIME increased by %d\n", - dsp_time_diff); -#endif - mgr->dsp_time_last = dsp_time_new; - - for (i = 0; i < mgr->num_cards; i++) { - chip = mgr->chip[i]; - for (j = 0; j < chip->nb_streams_capt; j++) - pcxhr_update_timer_pos(mgr, - &chip->capture_stream[j], - dsp_time_diff); - } - for (i = 0; i < mgr->num_cards; i++) { - chip = mgr->chip[i]; - for (j = 0; j < chip->nb_streams_play; j++) - pcxhr_update_timer_pos(mgr, - &chip->playback_stream[j], - dsp_time_diff); - } - } - - pcxhr_msg_thread(mgr); - mutex_unlock(&mgr->lock); - return IRQ_HANDLED; -} diff --git a/snd-pcxhr-dkms/src/pcxhr_core.h b/snd-pcxhr-dkms/src/pcxhr_core.h deleted file mode 100644 index c0ec553..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_core.h +++ /dev/null @@ -1,245 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Driver for Digigram pcxhr compatible soundcards - * - * low level interface with interrupt and message handling - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef __SOUND_PCXHR_CORE_H -#define __SOUND_PCXHR_CORE_H - -struct firmware; -struct pcxhr_mgr; - -/* init and firmware download commands */ -void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr); -void pcxhr_reset_dsp(struct pcxhr_mgr *mgr); -void pcxhr_enable_dsp(struct pcxhr_mgr *mgr); -int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, const struct firmware *xilinx, int second); -int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, const struct firmware *eeprom); -int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot); -int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp); - -/* DSP time available on MailBox4 register : 24 bit time samples() */ -#define PCXHR_DSP_TIME_MASK 0x00ffffff -#define PCXHR_DSP_TIME_INVALID 0x10000000 - - -#define PCXHR_SIZE_MAX_CMD 8 -#define PCXHR_SIZE_MAX_STATUS 16 -#define PCXHR_SIZE_MAX_LONG_STATUS 256 - -struct pcxhr_rmh { - u16 cmd_len; /* length of the command to send (WORDs) */ - u16 stat_len; /* length of the status received (WORDs) */ - u16 dsp_stat; /* status type, RMP_SSIZE_XXX */ - u16 cmd_idx; /* index of the command */ - u32 cmd[PCXHR_SIZE_MAX_CMD]; - u32 stat[PCXHR_SIZE_MAX_STATUS]; -}; - -enum { - CMD_VERSION, /* cmd_len = 2 stat_len = 1 */ - CMD_SUPPORTED, /* cmd_len = 1 stat_len = 4 */ - CMD_TEST_IT, /* cmd_len = 1 stat_len = 1 */ - CMD_SEND_IRQA, /* cmd_len = 1 stat_len = 0 */ - CMD_ACCESS_IO_WRITE, /* cmd_len >= 1 stat_len >= 1 */ - CMD_ACCESS_IO_READ, /* cmd_len >= 1 stat_len >= 1 */ - CMD_ASYNC, /* cmd_len = 1 stat_len = 1 */ - CMD_MODIFY_CLOCK, /* cmd_len = 3 stat_len = 0 */ - CMD_RESYNC_AUDIO_INPUTS, /* cmd_len = 1 stat_len = 0 */ - CMD_GET_DSP_RESOURCES, /* cmd_len = 1 stat_len = 4 */ - CMD_SET_TIMER_INTERRUPT, /* cmd_len = 1 stat_len = 0 */ - CMD_RES_PIPE, /* cmd_len >=2 stat_len = 0 */ - CMD_FREE_PIPE, /* cmd_len = 1 stat_len = 0 */ - CMD_CONF_PIPE, /* cmd_len = 2 stat_len = 0 */ - CMD_STOP_PIPE, /* cmd_len = 1 stat_len = 0 */ - CMD_PIPE_SAMPLE_COUNT, /* cmd_len = 2 stat_len = 2 */ - CMD_CAN_START_PIPE, /* cmd_len >= 1 stat_len = 1 */ - CMD_START_STREAM, /* cmd_len = 2 stat_len = 0 */ - CMD_STREAM_OUT_LEVEL_ADJUST, /* cmd_len >= 1 stat_len = 0 */ - CMD_STOP_STREAM, /* cmd_len = 2 stat_len = 0 */ - CMD_UPDATE_R_BUFFERS, /* cmd_len = 4 stat_len = 0 */ - CMD_FORMAT_STREAM_OUT, /* cmd_len >= 2 stat_len = 0 */ - CMD_FORMAT_STREAM_IN, /* cmd_len >= 4 stat_len = 0 */ - CMD_STREAM_SAMPLE_COUNT, /* cmd_len = 2 stat_len = (2 * nb_stream) */ - CMD_AUDIO_LEVEL_ADJUST, /* cmd_len = 3 stat_len = 0 */ - CMD_GET_TIME_CODE, /* cmd_len = 1 stat_len = 5 */ - CMD_MANAGE_SIGNAL, /* cmd_len = 1 stat_len = 0 */ - CMD_LAST_INDEX -}; - -#define MASK_DSP_WORD 0x00ffffff -#define MASK_ALL_STREAM 0x00ffffff -#define MASK_DSP_WORD_LEVEL 0x000001ff -#define MASK_FIRST_FIELD 0x0000001f -#define FIELD_SIZE 5 - -/* - init the rmh struct; by default cmd_len is set to 1 - */ -void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd); - -void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1, - unsigned int param2, unsigned int param3); - -#define DSP_EXT_CMD_SET(x) (x->dsp_version > 0x012800) - -/* - send the rmh - */ -int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh); - - -/* values used for CMD_ACCESS_IO_WRITE and CMD_ACCESS_IO_READ */ -#define IO_NUM_REG_CONT 0 -#define IO_NUM_REG_GENCLK 1 -#define IO_NUM_REG_MUTE_OUT 2 -#define IO_NUM_SPEED_RATIO 4 -#define IO_NUM_REG_STATUS 5 -#define IO_NUM_REG_CUER 10 -#define IO_NUM_UER_CHIP_REG 11 -#define IO_NUM_REG_CONFIG_SRC 12 -#define IO_NUM_REG_OUT_ANA_LEVEL 20 -#define IO_NUM_REG_IN_ANA_LEVEL 21 - -#define REG_CONT_VALSMPTE 0x000800 -#define REG_CONT_UNMUTE_INPUTS 0x020000 - -/* parameters used with register IO_NUM_REG_STATUS */ -#define REG_STATUS_OPTIONS 0 -#define REG_STATUS_AES_SYNC 8 -#define REG_STATUS_AES_1 9 -#define REG_STATUS_AES_2 10 -#define REG_STATUS_AES_3 11 -#define REG_STATUS_AES_4 12 -#define REG_STATUS_WORD_CLOCK 13 -#define REG_STATUS_INTER_SYNC 14 -#define REG_STATUS_CURRENT 0x80 -/* results */ -#define REG_STATUS_OPT_NO_VIDEO_SIGNAL 0x01 -#define REG_STATUS_OPT_DAUGHTER_MASK 0x1c -#define REG_STATUS_OPT_ANALOG_BOARD 0x00 -#define REG_STATUS_OPT_NO_DAUGHTER 0x1c -#define REG_STATUS_OPT_COMPANION_MASK 0xe0 -#define REG_STATUS_OPT_NO_COMPANION 0xe0 -#define REG_STATUS_SYNC_32000 0x00 -#define REG_STATUS_SYNC_44100 0x01 -#define REG_STATUS_SYNC_48000 0x02 -#define REG_STATUS_SYNC_64000 0x03 -#define REG_STATUS_SYNC_88200 0x04 -#define REG_STATUS_SYNC_96000 0x05 -#define REG_STATUS_SYNC_128000 0x06 -#define REG_STATUS_SYNC_176400 0x07 -#define REG_STATUS_SYNC_192000 0x08 - -int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, int capture_mask, int start); - -int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, - unsigned int value, int *changed); - -/* codec parameters */ -#define CS8416_RUN 0x200401 -#define CS8416_FORMAT_DETECT 0x200b00 -#define CS8416_CSB0 0x201900 -#define CS8416_CSB1 0x201a00 -#define CS8416_CSB2 0x201b00 -#define CS8416_CSB3 0x201c00 -#define CS8416_CSB4 0x201d00 -#define CS8416_VERSION 0x207f00 - -#define CS8420_DATA_FLOW_CTL 0x200301 -#define CS8420_CLOCK_SRC_CTL 0x200401 -#define CS8420_RECEIVER_ERRORS 0x201000 -#define CS8420_SRC_RATIO 0x201e00 -#define CS8420_CSB0 0x202000 -#define CS8420_CSB1 0x202100 -#define CS8420_CSB2 0x202200 -#define CS8420_CSB3 0x202300 -#define CS8420_CSB4 0x202400 -#define CS8420_VERSION 0x207f00 - -#define CS4271_MODE_CTL_1 0x200101 -#define CS4271_DAC_CTL 0x200201 -#define CS4271_VOLMIX 0x200301 -#define CS4271_VOLMUTE_LEFT 0x200401 -#define CS4271_VOLMUTE_RIGHT 0x200501 -#define CS4271_ADC_CTL 0x200601 -#define CS4271_MODE_CTL_2 0x200701 - -#define CHIP_SIG_AND_MAP_SPI 0xff7f00 - -/* codec selection */ -#define CS4271_01_CS 0x160018 -#define CS4271_23_CS 0x160019 -#define CS4271_45_CS 0x16001a -#define CS4271_67_CS 0x16001b -#define CS4271_89_CS 0x16001c -#define CS4271_AB_CS 0x16001d -#define CS8420_01_CS 0x080090 -#define CS8420_23_CS 0x080092 -#define CS8420_45_CS 0x080094 -#define CS8420_67_CS 0x080096 -#define CS8416_01_CS 0x080098 - - -/* interrupt handling */ -irqreturn_t pcxhr_interrupt(int irq, void *dev_id); -irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id); - - -/* access to the card */ -#define PCXHR_PLX 1 -#define PCXHR_DSP 2 - -//below hook in order to be able to dump register in pcxhr.c in /proc/asound/ file -/* registers used on the PLX (port 1), use PCXHR_PLX as bar */ -#define PCXHR_PLX_MBOX0 0x40 -#define PCXHR_PLX_MBOX1 0x44 -#define PCXHR_PLX_MBOX2 0x48 -#define PCXHR_PLX_MBOX3 0x4C -#define PCXHR_PLX_MBOX4 0x50 -#define PCXHR_PLX_MBOX5 0x54 -#define PCXHR_PLX_MBOX6 0x58 -#define PCXHR_PLX_MBOX7 0x5C -#define PCXHR_PLX_L2PCIDB 0x64 -#define PCXHR_PLX_IRQCS 0x68 -#define PCXHR_PLX_CHIPSC 0x6C - -/* registers used on the DSP (port 2), use PCXHR_DSP as bar */ -/* attention : access the PCXHR_DSP_* registers with inb and outb only ! */ -#define PCXHR_DSP_ICR 0x00 -#define PCXHR_DSP_CVR 0x04 -#define PCXHR_DSP_ISR 0x08 -#define PCXHR_DSP_IVR 0x0C -#define PCXHR_DSP_RXH 0x14 -#define PCXHR_DSP_TXH 0x14 -#define PCXHR_DSP_RXM 0x18 -#define PCXHR_DSP_TXM 0x18 -#define PCXHR_DSP_RXL 0x1C -#define PCXHR_DSP_TXL 0x1C -#define PCXHR_DSP_RESET 0x20 - -/* registers used on the DSP and Xilinx (port 2), use PCXHR_DSP as bar : HR stereo cards only */ -/* attention : byte access only, with inb and outb ! */ -//#define PCXHR_DSP_RESET 0x20 -#define PCXHR_XLX_CFG 0x24 -#define PCXHR_XLX_RUER 0x28 -#define PCXHR_XLX_DATA 0x2C -#define PCXHR_XLX_STATUS 0x30 -#define PCXHR_XLX_LOFREQ 0x34 -#define PCXHR_XLX_HIFREQ 0x38 -#define PCXHR_XLX_CSUER 0x3C -#define PCXHR_XLX_SELMIC 0x40 -#define PCXHR_XLX_MUTEIN 0x7C - -#define GET_ADDR(mgr, bar,x) ( ( bar == PCXHR_PLX ) ? ((mgr)->port[PCXHR_PLX] + (x) ):((mgr)->port[PCXHR_DSP] + (x) + mgr->dsp_reg_offset) ) - -#define PCXHR_INPB(mgr,bar,x) inb( GET_ADDR(mgr, bar, x)) -#define PCXHR_INPL(mgr,bar,x) inl( GET_ADDR(mgr, bar, x)) -#define PCXHR_OUTPB(mgr,bar,x,data) outb( (data), GET_ADDR(mgr, bar, x) ) -#define PCXHR_OUTPL(mgr,bar,x,data) outl( (data), GET_ADDR(mgr, bar, x) ) - -#endif /* __SOUND_PCXHR_CORE_H */ diff --git a/snd-pcxhr-dkms/src/pcxhr_hrtimer.c b/snd-pcxhr-dkms/src/pcxhr_hrtimer.c deleted file mode 100644 index 4ccc1bf..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_hrtimer.c +++ /dev/null @@ -1,65 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * Copyright (c) 2004 by Digigram - */ - - -#include "pcxhr_hrtimer.h" - -void pcxhr_hr_timer_tasklet(unsigned long data) -{ - pcxhr_interrupt(0, (void*)data); -} - -enum hrtimer_restart pcxhr_hr_timer_callback(struct hrtimer* hr_timer) -{ - struct pcxhr_mgr *mgr; - - mgr = container_of(hr_timer, struct pcxhr_mgr, hr_timer); - if (!atomic_read(&mgr->hr_timer_running)) - return HRTIMER_NORESTART; - tasklet_schedule(&mgr->hr_timer_tasklet); - hrtimer_forward_now(hr_timer, mgr->hr_timer_period_time); - return HRTIMER_RESTART; -} - - -void pcxhr_hr_timer_trig(struct pcxhr_mgr *mgr, int start, unsigned int rate) { - if (start) - { - unsigned int period = mgr->granularity/2; - long sec; - unsigned long nsecs; - - sec = period/rate; - period %= rate; - nsecs = div_u64((u64)period * 1000000000UL + rate - 1, rate); - - tasklet_kill(&mgr->hr_timer_tasklet); // Make sure the tasklet is not running. - mgr->hr_timer_period_time = ktime_set(sec, nsecs); - atomic_set(&mgr->hr_timer_running, 1); - hrtimer_start(&mgr->hr_timer, mgr->hr_timer_period_time, HRTIMER_MODE_REL); - } - else - { - atomic_set(&mgr->hr_timer_running, 0); - hrtimer_cancel(&mgr->hr_timer); - } - -} - - -void pcxhr_hr_timer_init(struct pcxhr_mgr *mgr) { - hrtimer_init( &mgr->hr_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL ); - mgr->hr_timer.function = pcxhr_hr_timer_callback; - atomic_set(&mgr->hr_timer_running, 0); - tasklet_init(&mgr->hr_timer_tasklet, pcxhr_hr_timer_tasklet, - (unsigned long)mgr); - -} - -void pcxhr_hr_timer_kill(struct pcxhr_mgr *mgr) { - tasklet_kill(&mgr->hr_timer_tasklet); -} diff --git a/snd-pcxhr-dkms/src/pcxhr_hrtimer.h b/snd-pcxhr-dkms/src/pcxhr_hrtimer.h deleted file mode 100644 index b54d864..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_hrtimer.h +++ /dev/null @@ -1,23 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef PCXHR_PCX_HRTIMER_H_ -#define PCXHR_PCX_HRTIMER_H_ - -#include -#include "pcxhr.h" -#include "pcxhr_core.h" - -/* interrupt handling */ -enum hrtimer_restart pcxhr_hr_timer_callback(struct hrtimer* hr_timer); - -void pcxhr_hr_timer_tasklet(unsigned long data); -void pcxhr_hr_timer_trig(struct pcxhr_mgr *mgr, int start, unsigned int rate); -void pcxhr_hr_timer_init(struct pcxhr_mgr *mgr); -void pcxhr_hr_timer_kill(struct pcxhr_mgr *mgr); - -#endif /* PCXHR_PCX_HRTIMER_H_ */ diff --git a/snd-pcxhr-dkms/src/pcxhr_hwdep.c b/snd-pcxhr-dkms/src/pcxhr_hwdep.c deleted file mode 100644 index da67207..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_hwdep.c +++ /dev/null @@ -1,429 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * hwdep device manager - * - * Copyright (c) 2004 by Digigram - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "pcxhr.h" -#include "pcxhr_mixer.h" -#include "pcxhr_hwdep.h" -#include "pcxhr_core.h" -#include "pcxhr_mix22.h" - - -static int pcxhr_sub_init(struct pcxhr_mgr *mgr); -/* - * get basic information and init pcxhr card - */ -static int pcxhr_init_board(struct pcxhr_mgr *mgr) -{ - int err; - struct pcxhr_rmh rmh; - int card_streams; - - /* calc the number of all streams used */ - if (mgr->mono_capture) - card_streams = mgr->capture_chips * 2; - else - card_streams = mgr->capture_chips; - card_streams += mgr->playback_chips * PCXHR_PLAYBACK_STREAMS; - - /* enable interrupts */ - pcxhr_enable_dsp(mgr); - - pcxhr_init_rmh(&rmh, CMD_SUPPORTED); - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - /* test 4, 8 or 12 phys out */ - if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2) - return -EINVAL; - /* test 4, 8 or 2 phys in */ - if (((rmh.stat[0] >> (2 * FIELD_SIZE)) & MASK_FIRST_FIELD) < - mgr->capture_chips * 2) - return -EINVAL; - /* test max nb substream per board */ - if ((rmh.stat[1] & 0x5F) < card_streams) - return -EINVAL; - /* test max nb substream per pipe */ - if (((rmh.stat[1] >> 7) & 0x5F) < PCXHR_PLAYBACK_STREAMS) - return -EINVAL; - dev_dbg(&mgr->pci->dev, - "supported formats : playback=%x capture=%x\n", - rmh.stat[2], rmh.stat[3]); - - pcxhr_init_rmh(&rmh, CMD_VERSION); - /* firmware num for DSP */ - rmh.cmd[0] |= mgr->firmware_num; - /* transfer granularity in samples (should be multiple of 48) */ - rmh.cmd[1] = (1<<23) + mgr->granularity; - rmh.cmd_len = 2; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - dev_dbg(&mgr->pci->dev, - "PCXHR DSP version is %d.%d.%d\n", (rmh.stat[0]>>16)&0xff, - (rmh.stat[0]>>8)&0xff, rmh.stat[0]&0xff); - mgr->dsp_version = rmh.stat[0]; - - if (mgr->is_hr_stereo) - err = hr222_sub_init(mgr); - else - err = pcxhr_sub_init(mgr); - return err; -} - -static int pcxhr_sub_init(struct pcxhr_mgr *mgr) -{ - int err; - struct pcxhr_rmh rmh; - - /* get options */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); - rmh.cmd[0] |= IO_NUM_REG_STATUS; - rmh.cmd[1] = REG_STATUS_OPTIONS; - rmh.cmd_len = 2; - err = pcxhr_send_msg(mgr, &rmh); - if (err) - return err; - - if ((rmh.stat[1] & REG_STATUS_OPT_DAUGHTER_MASK) == - REG_STATUS_OPT_ANALOG_BOARD) - mgr->board_has_analog = 1; /* analog addon board found */ - - /* unmute inputs */ - err = pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS, - REG_CONT_UNMUTE_INPUTS, NULL); - if (err) - return err; - /* unmute outputs (a write to IO_NUM_REG_MUTE_OUT mutes!) */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); - rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; - if (DSP_EXT_CMD_SET(mgr)) { - rmh.cmd[1] = 1; /* unmute digital plugs */ - rmh.cmd_len = 2; - } - err = pcxhr_send_msg(mgr, &rmh); - return err; -} - -void pcxhr_reset_board(struct pcxhr_mgr *mgr) -{ - struct pcxhr_rmh rmh; - - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { - /* mute outputs */ - if (!mgr->is_hr_stereo) { - /* a read to IO_NUM_REG_MUTE_OUT register unmutes! */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; - pcxhr_send_msg(mgr, &rmh); - /* mute inputs */ - pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS, - 0, NULL); - } - /* stereo cards mute with reset of dsp */ - } - /* reset pcxhr dsp */ - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_EPRM_INDEX)) - pcxhr_reset_dsp(mgr); - /* reset second xilinx */ - if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_XLX_COM_INDEX)) { - pcxhr_reset_xilinx_com(mgr); - mgr->dsp_loaded = 1; - } - return; -} - - -/* - * allocate a playback/capture pipe (pcmp0/pcmc0) - */ -static int pcxhr_dsp_allocate_pipe(struct pcxhr_mgr *mgr, - struct pcxhr_pipe *pipe, - int is_capture, int pin) -{ - int stream_count, audio_count; - int err; - struct pcxhr_rmh rmh; - - if (is_capture) { - stream_count = 1; - if (mgr->mono_capture) - audio_count = 1; - else - audio_count = 2; - } else { - stream_count = PCXHR_PLAYBACK_STREAMS; - audio_count = 2; /* always stereo */ - } - dev_dbg(&mgr->pci->dev, "snd_add_ref_pipe pin(%d) pcm%c0\n", - pin, is_capture ? 'c' : 'p'); - pipe->is_capture = is_capture; - pipe->first_audio = pin; - /* define pipe (P_PCM_ONLY_MASK (0x020000) is not necessary) */ - pcxhr_init_rmh(&rmh, CMD_RES_PIPE); - pcxhr_set_pipe_cmd_params(&rmh, is_capture, pin, - audio_count, stream_count); - rmh.cmd[1] |= 0x020000; /* add P_PCM_ONLY_MASK */ - if (DSP_EXT_CMD_SET(mgr)) { - /* add channel mask to command */ - rmh.cmd[rmh.cmd_len++] = (audio_count == 1) ? 0x01 : 0x03; - } - err = pcxhr_send_msg(mgr, &rmh); - if (err < 0) { - dev_err(&mgr->pci->dev, "error pipe allocation " - "(CMD_RES_PIPE) err=%x!\n", err); - return err; - } - pipe->status = PCXHR_PIPE_DEFINED; - - return 0; -} - -/* - * free playback/capture pipe (pcmp0/pcmc0) - */ -#if 0 -static int pcxhr_dsp_free_pipe( struct pcxhr_mgr *mgr, struct pcxhr_pipe *pipe) -{ - struct pcxhr_rmh rmh; - int capture_mask = 0; - int playback_mask = 0; - int err = 0; - - if (pipe->is_capture) - capture_mask = (1 << pipe->first_audio); - else - playback_mask = (1 << pipe->first_audio); - - /* stop one pipe */ - err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); - if (err < 0) - dev_err(&mgr->pci->dev, "error stopping pipe!\n"); - /* release the pipe */ - pcxhr_init_rmh(&rmh, CMD_FREE_PIPE); - pcxhr_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->first_audio, - 0, 0); - err = pcxhr_send_msg(mgr, &rmh); - if (err < 0) - dev_err(&mgr->pci->dev, "error pipe release " - "(CMD_FREE_PIPE) err(%x)\n", err); - pipe->status = PCXHR_PIPE_UNDEFINED; - return err; -} -#endif - - -static int pcxhr_config_pipes(struct pcxhr_mgr *mgr) -{ - int err, i, j; - struct snd_pcxhr *chip; - struct pcxhr_pipe *pipe; - - /* allocate the pipes on the dsp */ - for (i = 0; i < mgr->num_cards; i++) { - chip = mgr->chip[i]; - if (chip->nb_streams_play) { - pipe = &chip->playback_pipe; - err = pcxhr_dsp_allocate_pipe( mgr, pipe, 0, i*2); - if (err) - return err; - for(j = 0; j < chip->nb_streams_play; j++) - chip->playback_stream[j].pipe = pipe; - } - for (j = 0; j < chip->nb_streams_capt; j++) { - pipe = &chip->capture_pipe[j]; - err = pcxhr_dsp_allocate_pipe(mgr, pipe, 1, i*2 + j); - if (err) - return err; - chip->capture_stream[j].pipe = pipe; - } - } - return 0; -} - -static int pcxhr_start_pipes(struct pcxhr_mgr *mgr) -{ - int i, j; - struct snd_pcxhr *chip; - int playback_mask = 0; - int capture_mask = 0; - - /* start all the pipes on the dsp */ - for (i = 0; i < mgr->num_cards; i++) { - chip = mgr->chip[i]; - if (chip->nb_streams_play) - playback_mask |= 1 << chip->playback_pipe.first_audio; - for (j = 0; j < chip->nb_streams_capt; j++) - capture_mask |= 1 << chip->capture_pipe[j].first_audio; - } - return pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); -} - - -static int pcxhr_dsp_load(struct pcxhr_mgr *mgr, int index, - const struct firmware *dsp) -{ - int err, card_index; - - dev_dbg(&mgr->pci->dev, - "loading dsp [%d] size = %zd\n", index, dsp->size); - - switch (index) { - case PCXHR_FIRMWARE_XLX_INT_INDEX: - pcxhr_reset_xilinx_com(mgr); - return pcxhr_load_xilinx_binary(mgr, dsp, 0); - - case PCXHR_FIRMWARE_XLX_COM_INDEX: - pcxhr_reset_xilinx_com(mgr); - return pcxhr_load_xilinx_binary(mgr, dsp, 1); - - case PCXHR_FIRMWARE_DSP_EPRM_INDEX: - pcxhr_reset_dsp(mgr); - return pcxhr_load_eeprom_binary(mgr, dsp); - - case PCXHR_FIRMWARE_DSP_BOOT_INDEX: - return pcxhr_load_boot_binary(mgr, dsp); - - case PCXHR_FIRMWARE_DSP_MAIN_INDEX: - err = pcxhr_load_dsp_binary(mgr, dsp); - if (err) - return err; - break; /* continue with first init */ - default: - dev_err(&mgr->pci->dev, "wrong file index\n"); - return -EFAULT; - } /* end of switch file index*/ - - /* first communication with embedded */ - err = pcxhr_init_board(mgr); - if (err < 0) { - dev_err(&mgr->pci->dev, "pcxhr could not be set up\n"); - return err; - } - err = pcxhr_config_pipes(mgr); - if (err < 0) { - dev_err(&mgr->pci->dev, "pcxhr pipes could not be set up\n"); - return err; - } - /* create devices and mixer in accordance with HW options*/ - for (card_index = 0; card_index < mgr->num_cards; card_index++) { - struct snd_pcxhr *chip = mgr->chip[card_index]; - - err = pcxhr_create_pcm(chip); - if (err < 0) - return err; - - if (card_index == 0) { - err = pcxhr_create_mixer(chip->mgr); - if (err < 0) - return err; - } - err = snd_card_register(chip->card); - if (err < 0) - return err; - } - err = pcxhr_start_pipes(mgr); - if (err < 0) { - dev_err(&mgr->pci->dev, "pcxhr pipes could not be started\n"); - return err; - } - dev_dbg(&mgr->pci->dev, - "pcxhr firmware downloaded and successfully set up\n"); - - return 0; -} - -// Read: magic word + fpga version (32 bits access) -#define PCXHR_XLX_VERSION (0x70) - -static int get_xilinx_version(struct pcxhr_mgr *mgr){ - if (pcxhr_is_device_compatible_IE (mgr->pci->subsystem_device, PCXHR_DEVICE_IE5_ID)){ - int xlx_version = cpu_to_be32(PCXHR_INPL(mgr, PCXHR_DSP, PCXHR_XLX_VERSION)); - dev_err(&mgr->pci->dev, "Magic : %04x Version : %04x\n", xlx_version>>16, xlx_version&0x00ff); - } - return 0; -} - -/* - * fw loader entry - */ -int pcxhr_setup_firmware(struct pcxhr_mgr *mgr) -{ - static const char *fw_files[][5] = { - /* xilinx 1 xilinx 2 eeprom boot dsp */ - [0] = { "xlxint.dat", "xlxc882hr.dat", "dspe882.e56", "dspb882hr.b56", "dspd882.d56" }, - [1] = { "xlxint.dat", "xlxc882e.dat", "dspe882.e56", "dspb882e.b56", "dspd882.d56" }, - [2] = { "xlxint.dat", "xlxc1222hr.dat", "dspe882.e56", "dspb1222hr.b56", "dspd1222.d56" }, - [3] = { "xlxint.dat", "xlxc1222e.dat", "dspe882.e56", "dspb1222e.b56", "dspd1222.d56" }, - [4] = { NULL, "xlxc222.dat", "dspe924.e56", "dspb924.b56", "dspd222.d56" }, - [5] = { NULL, "xlxc924.dat", "dspe924.e56", "dspb924.b56", "dspd222.d56" }, - [6] = { NULL, NULL, "dspe924e5.e56", "dspb924.b56", "dspd222.d56" }, - [7] = { NULL, NULL, "dspe924e5.e56", "dspb924.b56", "dspd222.d56" }, - }; - char path[32]; - - const struct firmware *fw_entry; - int i, err; - int fw_set = mgr->fw_file_set; - - get_xilinx_version(mgr); - - for (i = 0; i < 5; i++) { - if (!fw_files[fw_set][i]) { - if( ((fw_set == 6) ||(fw_set == 7)) && (i==1)) { - pcxhr_reset_xilinx_com(mgr); - mdelay(1000); - } - continue; - } - sprintf(path, "pcxhr/%s", fw_files[fw_set][i]); - if (request_firmware(&fw_entry, path, &mgr->pci->dev)) { - dev_err(&mgr->pci->dev, - "pcxhr: can't load firmware %s\n", - path); - return -ENOENT; - } - /* fake hwdep dsp record */ - err = pcxhr_dsp_load(mgr, i, fw_entry); - release_firmware(fw_entry); - if (err < 0) - return err; - mgr->dsp_loaded |= 1 << i; - } - return 0; -} - -MODULE_FIRMWARE("pcxhr/xlxint.dat"); -MODULE_FIRMWARE("pcxhr/xlxc882hr.dat"); -MODULE_FIRMWARE("pcxhr/xlxc882e.dat"); -MODULE_FIRMWARE("pcxhr/dspe882.e56"); -MODULE_FIRMWARE("pcxhr/dspb882hr.b56"); -MODULE_FIRMWARE("pcxhr/dspb882e.b56"); -MODULE_FIRMWARE("pcxhr/dspd882.d56"); - -MODULE_FIRMWARE("pcxhr/xlxc1222hr.dat"); -MODULE_FIRMWARE("pcxhr/xlxc1222e.dat"); -MODULE_FIRMWARE("pcxhr/dspb1222hr.b56"); -MODULE_FIRMWARE("pcxhr/dspb1222e.b56"); -MODULE_FIRMWARE("pcxhr/dspd1222.d56"); - -MODULE_FIRMWARE("pcxhr/xlxc222.dat"); -MODULE_FIRMWARE("pcxhr/xlxc924.dat"); -MODULE_FIRMWARE("pcxhr/dspe924.e56"); -MODULE_FIRMWARE("pcxhr/dspe924e5.e56"); -MODULE_FIRMWARE("pcxhr/dspb924.b56"); -MODULE_FIRMWARE("pcxhr/dspd222.d56"); diff --git a/snd-pcxhr-dkms/src/pcxhr_hwdep.h b/snd-pcxhr-dkms/src/pcxhr_hwdep.h deleted file mode 100644 index f7a440e..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_hwdep.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Driver for Digigram pcxhr compatible soundcards - * - * definitions and makros for basic card access - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef __SOUND_PCXHR_HWDEP_H -#define __SOUND_PCXHR_HWDEP_H - - -/* firmware status codes */ -#define PCXHR_FIRMWARE_XLX_INT_INDEX 0 -#define PCXHR_FIRMWARE_XLX_COM_INDEX 1 -#define PCXHR_FIRMWARE_DSP_EPRM_INDEX 2 -#define PCXHR_FIRMWARE_DSP_BOOT_INDEX 3 -#define PCXHR_FIRMWARE_DSP_MAIN_INDEX 4 -#define PCXHR_FIRMWARE_FILES_MAX_INDEX 5 - - -/* exported */ -int pcxhr_setup_firmware(struct pcxhr_mgr *mgr); -void pcxhr_reset_board(struct pcxhr_mgr *mgr); - -#endif /* __SOUND_PCXHR_HWDEP_H */ diff --git a/snd-pcxhr-dkms/src/pcxhr_mix22.c b/snd-pcxhr-dkms/src/pcxhr_mix22.c deleted file mode 100644 index 57972ff..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_mix22.c +++ /dev/null @@ -1,1064 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * Driver for Digigram pcxhr compatible soundcards - * - * mixer interface for stereo cards - * - * Copyright (c) 2004 by Digigram - */ - -#include -#include -#include -#include -#include -#include -#include -#include "pcxhr.h" -#include "pcxhr_core.h" -#include "pcxhr_mix22.h" - -/* values for PCHR_DSP_RESET register */ -#define PCXHR_DSP_RESET_DSP 0x01 -#define PCXHR_DSP_RESET_MUTE 0x02 -#define PCXHR_DSP_RESET_CODEC 0x08 -#define PCXHR_DSP_RESET_SMPTE 0x10 -#define PCXHR_DSP_RESET_GPO_OFFSET 5 -#define PCXHR_DSP_RESET_GPO_MASK 0x60 - -/* values for PCHR_XLX_CFG register */ -#define PCXHR_CFG_SYNCDSP_MASK 0x80 -#define PCXHR_CFG_DEPENDENCY_MASK 0x60 -#define PCXHR_CFG_INDEPENDANT_SEL 0x00 -#define PCXHR_CFG_MASTER_SEL 0x40 -#define PCXHR_CFG_SLAVE_SEL 0x20 -#define PCXHR_CFG_DATA_UER1_SEL_MASK 0x10 /* 0 (UER0), 1(UER1) */ -#define PCXHR_CFG_DATAIN_SEL_MASK 0x08 /* 0 (ana), 1 (UER) */ -#define PCXHR_CFG_SRC_MASK 0x04 /* 0 (Bypass), 1 (SRC Actif) */ -#define PCXHR_CFG_CLOCK_UER1_SEL_MASK 0x02 /* 0 (UER0), 1(UER1) */ -#define PCXHR_CFG_CLOCKIN_SEL_MASK 0x01 /* 0 (internal), 1 (AES/EBU) */ - -/* values for PCHR_XLX_DATA register */ -#define PCXHR_DATA_CODEC 0x80 -#define AKM_POWER_CONTROL_CMD 0xA007 -#define AKM_RESET_ON_CMD 0xA100 -#define AKM_RESET_OFF_CMD 0xA103 -#define AKM_CLOCK_INF_55K_CMD 0xA240 -#define AKM_CLOCK_SUP_55K_CMD 0xA24D -#define AKM_MUTE_CMD 0xA38D -#define AKM_UNMUTE_CMD 0xA30D -#define AKM_LEFT_LEVEL_CMD 0xA600 -#define AKM_RIGHT_LEVEL_CMD 0xA700 - -/* values for PCHR_XLX_STATUS register - READ */ -#define PCXHR_STAT_SRC_LOCK 0x01 -#define PCXHR_STAT_LEVEL_IN 0x02 -#define PCXHR_STAT_GPI_OFFSET 2 -#define PCXHR_STAT_GPI_MASK 0x0C -#define PCXHR_STAT_MIC_CAPS 0x10 -/* values for PCHR_XLX_STATUS register - WRITE */ -#define PCXHR_STAT_FREQ_SYNC_MASK 0x01 -#define PCXHR_STAT_FREQ_UER1_MASK 0x02 -#define PCXHR_STAT_FREQ_SAVE_MASK 0x80 - -/* values for PCHR_XLX_CSUER register */ -#define PCXHR_SUER1_BIT_U_READ_MASK 0x80 -#define PCXHR_SUER1_BIT_C_READ_MASK 0x40 -#define PCXHR_SUER1_DATA_PRESENT_MASK 0x20 -#define PCXHR_SUER1_CLOCK_PRESENT_MASK 0x10 -#define PCXHR_SUER_BIT_U_READ_MASK 0x08 -#define PCXHR_SUER_BIT_C_READ_MASK 0x04 -#define PCXHR_SUER_DATA_PRESENT_MASK 0x02 -#define PCXHR_SUER_CLOCK_PRESENT_MASK 0x01 - -#define PCXHR_SUER_BIT_U_WRITE_MASK 0x02 -#define PCXHR_SUER_BIT_C_WRITE_MASK 0x01 - -/* values for PCXHR_XLX_SELMIC register - WRITE */ -#define PCXHR_SELMIC_PREAMPLI_OFFSET 2 -#define PCXHR_SELMIC_PREAMPLI_MASK 0x0C -#define PCXHR_SELMIC_PHANTOM_ALIM 0x80 - -/* Values for PCXHR_XLX_MUTEIN register - WRITE */ -#define PCXHR_XLX_MUTEIN_CMD_ON 1 -#define PCXHR_XLX_MUTEIN_CMD_OFF 0 - -/* CODEC set in reset delay (in ms) */ -#define PCXHR_CODEC_RESET_TIME_MS_MS 5 -#define PCXHR_AKM_CODECS_SETTLING_TIME_MS 5 -#define PCXHR_XLX_PLL_SETTLING_TIME_MS 2 - -//Codec reset time (in ms). -#define PCXHR_CODEC_RESET_TIME_MS 5 - -/*************************************************************/ -/* TI codecs stuff */ -/*************************************************************/ -/* TI codecs registers /commands for IE7 boards, PCM1796 is the DAC, PCM4202 is an ADC but not programmable */ -//Actual address is on the upper byte only of the 16bit values -#define PCXHR_PCM1796_LEFT_LEVEL_REG_ADDR 0x1000 -#define PCXHR_PCM1796_RIGHT_LEVEL_REG_ADDR 0x1100 - -#define PCXHR_PCM1796_CONF_REG_ADDR 0x1200 -#define PCXHR_PCM1796_OPER_REG_ADDR 0x1300 - - -//MUTE level -#define PCXHR_PCM1796_LEVEL_MUTE_VALUE 0x00 - -//Operation : MUTE bit in conf register -#define PCXHR_PCM1796_CONF_MUTE_BIT (1<<0) - -//Init conf : ATLD|FMT(24b,left) -#define PCXHR_PCM1796_INIT_CONF_CMD PCXHR_PCM1796_CONF_REG_ADDR | 0xB0 - - -//Operation: default value : 0x00 according to DS -#define PCXHR_PCM1796_OPER_RESET_VALUE 0x00 - -//Operation : Enable/disable the DAC (OPE bit) in reg 19 -#define PCXHR_PCM1796_OPER_OPE_DISABLED_BIT (1<<4) - -//Operation base configuration : Attenuation rate selection : LRCK/2 -#define PCXHR_PCM1796_OPER_CONF_CMD PCXHR_PCM1796_OPER_REG_ADDR | 0x20 - -//Settling time once reset Off. -#define PCXHR_TI_CODECS_SETTLING_TIME_MS 10 - -//The default sampling rate (in Hz) -static const unsigned int PCXHR_TI_CODECS_DEFAULT_SAMPLING_RATE = 48000; - -//Follow Datasheet table and input values as given in comments of m_OutputLevelAKM[] -// Range : from 0dB downto -50dB (level : 0 to 100) -static const unsigned int PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE = 255; -static const unsigned int PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL = 100; -static const unsigned int PCXHR_PCM1796_MUTE_OUTPUT_GAIN_VALUE = 0; -static const unsigned int PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE = PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE - PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL; - -//! ADC FS ranges border see PCM4202 data sheet (in kHz) -static const unsigned int PCXHR_TI_ADC_SINGLE_RATE_UPPER_BORDER = 54000; -static const unsigned int PCXHR_TI_ADC_DUAL_RATE_UPPER_BORDER = 108000; - -//! The FS rates for the TI PCM4202 ADC -typedef enum _PCXHR_TI_ADC_FS_RATES -{ - PCXHR_TI_ADC_FS_SINGLE_RATE = 0, - PCXHR_TI_ADC_FS_DUAL_RATE = 1, - PCXHR_TI_ADC_FS_QUAD_RATE = 2, -} PCXHR_TI_ADC_FS_RATES; - - -/**************************************************************/ -/* KM codecs stuff */ -/**************************************************************/ - -static const unsigned char g_hr222_p_level[] = { - 0x00, /* [000] -49.5 dB: AKM[000] = -1.#INF dB (mute) */ - 0x01, /* [001] -49.0 dB: AKM[001] = -48.131 dB (diff=0.86920 dB) */ - 0x01, /* [002] -48.5 dB: AKM[001] = -48.131 dB (diff=0.36920 dB) */ - 0x01, /* [003] -48.0 dB: AKM[001] = -48.131 dB (diff=0.13080 dB) */ - 0x01, /* [004] -47.5 dB: AKM[001] = -48.131 dB (diff=0.63080 dB) */ - 0x01, /* [005] -46.5 dB: AKM[001] = -48.131 dB (diff=1.63080 dB) */ - 0x01, /* [006] -47.0 dB: AKM[001] = -48.131 dB (diff=1.13080 dB) */ - 0x01, /* [007] -46.0 dB: AKM[001] = -48.131 dB (diff=2.13080 dB) */ - 0x01, /* [008] -45.5 dB: AKM[001] = -48.131 dB (diff=2.63080 dB) */ - 0x02, /* [009] -45.0 dB: AKM[002] = -42.110 dB (diff=2.88980 dB) */ - 0x02, /* [010] -44.5 dB: AKM[002] = -42.110 dB (diff=2.38980 dB) */ - 0x02, /* [011] -44.0 dB: AKM[002] = -42.110 dB (diff=1.88980 dB) */ - 0x02, /* [012] -43.5 dB: AKM[002] = -42.110 dB (diff=1.38980 dB) */ - 0x02, /* [013] -43.0 dB: AKM[002] = -42.110 dB (diff=0.88980 dB) */ - 0x02, /* [014] -42.5 dB: AKM[002] = -42.110 dB (diff=0.38980 dB) */ - 0x02, /* [015] -42.0 dB: AKM[002] = -42.110 dB (diff=0.11020 dB) */ - 0x02, /* [016] -41.5 dB: AKM[002] = -42.110 dB (diff=0.61020 dB) */ - 0x02, /* [017] -41.0 dB: AKM[002] = -42.110 dB (diff=1.11020 dB) */ - 0x02, /* [018] -40.5 dB: AKM[002] = -42.110 dB (diff=1.61020 dB) */ - 0x03, /* [019] -40.0 dB: AKM[003] = -38.588 dB (diff=1.41162 dB) */ - 0x03, /* [020] -39.5 dB: AKM[003] = -38.588 dB (diff=0.91162 dB) */ - 0x03, /* [021] -39.0 dB: AKM[003] = -38.588 dB (diff=0.41162 dB) */ - 0x03, /* [022] -38.5 dB: AKM[003] = -38.588 dB (diff=0.08838 dB) */ - 0x03, /* [023] -38.0 dB: AKM[003] = -38.588 dB (diff=0.58838 dB) */ - 0x03, /* [024] -37.5 dB: AKM[003] = -38.588 dB (diff=1.08838 dB) */ - 0x04, /* [025] -37.0 dB: AKM[004] = -36.090 dB (diff=0.91040 dB) */ - 0x04, /* [026] -36.5 dB: AKM[004] = -36.090 dB (diff=0.41040 dB) */ - 0x04, /* [027] -36.0 dB: AKM[004] = -36.090 dB (diff=0.08960 dB) */ - 0x04, /* [028] -35.5 dB: AKM[004] = -36.090 dB (diff=0.58960 dB) */ - 0x05, /* [029] -35.0 dB: AKM[005] = -34.151 dB (diff=0.84860 dB) */ - 0x05, /* [030] -34.5 dB: AKM[005] = -34.151 dB (diff=0.34860 dB) */ - 0x05, /* [031] -34.0 dB: AKM[005] = -34.151 dB (diff=0.15140 dB) */ - 0x05, /* [032] -33.5 dB: AKM[005] = -34.151 dB (diff=0.65140 dB) */ - 0x06, /* [033] -33.0 dB: AKM[006] = -32.568 dB (diff=0.43222 dB) */ - 0x06, /* [034] -32.5 dB: AKM[006] = -32.568 dB (diff=0.06778 dB) */ - 0x06, /* [035] -32.0 dB: AKM[006] = -32.568 dB (diff=0.56778 dB) */ - 0x07, /* [036] -31.5 dB: AKM[007] = -31.229 dB (diff=0.27116 dB) */ - 0x07, /* [037] -31.0 dB: AKM[007] = -31.229 dB (diff=0.22884 dB) */ - 0x08, /* [038] -30.5 dB: AKM[008] = -30.069 dB (diff=0.43100 dB) */ - 0x08, /* [039] -30.0 dB: AKM[008] = -30.069 dB (diff=0.06900 dB) */ - 0x09, /* [040] -29.5 dB: AKM[009] = -29.046 dB (diff=0.45405 dB) */ - 0x09, /* [041] -29.0 dB: AKM[009] = -29.046 dB (diff=0.04595 dB) */ - 0x0a, /* [042] -28.5 dB: AKM[010] = -28.131 dB (diff=0.36920 dB) */ - 0x0a, /* [043] -28.0 dB: AKM[010] = -28.131 dB (diff=0.13080 dB) */ - 0x0b, /* [044] -27.5 dB: AKM[011] = -27.303 dB (diff=0.19705 dB) */ - 0x0b, /* [045] -27.0 dB: AKM[011] = -27.303 dB (diff=0.30295 dB) */ - 0x0c, /* [046] -26.5 dB: AKM[012] = -26.547 dB (diff=0.04718 dB) */ - 0x0d, /* [047] -26.0 dB: AKM[013] = -25.852 dB (diff=0.14806 dB) */ - 0x0e, /* [048] -25.5 dB: AKM[014] = -25.208 dB (diff=0.29176 dB) */ - 0x0e, /* [049] -25.0 dB: AKM[014] = -25.208 dB (diff=0.20824 dB) */ - 0x0f, /* [050] -24.5 dB: AKM[015] = -24.609 dB (diff=0.10898 dB) */ - 0x10, /* [051] -24.0 dB: AKM[016] = -24.048 dB (diff=0.04840 dB) */ - 0x11, /* [052] -23.5 dB: AKM[017] = -23.522 dB (diff=0.02183 dB) */ - 0x12, /* [053] -23.0 dB: AKM[018] = -23.025 dB (diff=0.02535 dB) */ - 0x13, /* [054] -22.5 dB: AKM[019] = -22.556 dB (diff=0.05573 dB) */ - 0x14, /* [055] -22.0 dB: AKM[020] = -22.110 dB (diff=0.11020 dB) */ - 0x15, /* [056] -21.5 dB: AKM[021] = -21.686 dB (diff=0.18642 dB) */ - 0x17, /* [057] -21.0 dB: AKM[023] = -20.896 dB (diff=0.10375 dB) */ - 0x18, /* [058] -20.5 dB: AKM[024] = -20.527 dB (diff=0.02658 dB) */ - 0x1a, /* [059] -20.0 dB: AKM[026] = -19.831 dB (diff=0.16866 dB) */ - 0x1b, /* [060] -19.5 dB: AKM[027] = -19.504 dB (diff=0.00353 dB) */ - 0x1d, /* [061] -19.0 dB: AKM[029] = -18.883 dB (diff=0.11716 dB) */ - 0x1e, /* [062] -18.5 dB: AKM[030] = -18.588 dB (diff=0.08838 dB) */ - 0x20, /* [063] -18.0 dB: AKM[032] = -18.028 dB (diff=0.02780 dB) */ - 0x22, /* [064] -17.5 dB: AKM[034] = -17.501 dB (diff=0.00123 dB) */ - 0x24, /* [065] -17.0 dB: AKM[036] = -17.005 dB (diff=0.00475 dB) */ - 0x26, /* [066] -16.5 dB: AKM[038] = -16.535 dB (diff=0.03513 dB) */ - 0x28, /* [067] -16.0 dB: AKM[040] = -16.090 dB (diff=0.08960 dB) */ - 0x2b, /* [068] -15.5 dB: AKM[043] = -15.461 dB (diff=0.03857 dB) */ - 0x2d, /* [069] -15.0 dB: AKM[045] = -15.067 dB (diff=0.06655 dB) */ - 0x30, /* [070] -14.5 dB: AKM[048] = -14.506 dB (diff=0.00598 dB) */ - 0x33, /* [071] -14.0 dB: AKM[051] = -13.979 dB (diff=0.02060 dB) */ - 0x36, /* [072] -13.5 dB: AKM[054] = -13.483 dB (diff=0.01707 dB) */ - 0x39, /* [073] -13.0 dB: AKM[057] = -13.013 dB (diff=0.01331 dB) */ - 0x3c, /* [074] -12.5 dB: AKM[060] = -12.568 dB (diff=0.06778 dB) */ - 0x40, /* [075] -12.0 dB: AKM[064] = -12.007 dB (diff=0.00720 dB) */ - 0x44, /* [076] -11.5 dB: AKM[068] = -11.481 dB (diff=0.01937 dB) */ - 0x48, /* [077] -11.0 dB: AKM[072] = -10.984 dB (diff=0.01585 dB) */ - 0x4c, /* [078] -10.5 dB: AKM[076] = -10.515 dB (diff=0.01453 dB) */ - 0x51, /* [079] -10.0 dB: AKM[081] = -9.961 dB (diff=0.03890 dB) */ - 0x55, /* [080] -9.5 dB: AKM[085] = -9.542 dB (diff=0.04243 dB) */ - 0x5a, /* [081] -9.0 dB: AKM[090] = -9.046 dB (diff=0.04595 dB) */ - 0x60, /* [082] -8.5 dB: AKM[096] = -8.485 dB (diff=0.01462 dB) */ - 0x66, /* [083] -8.0 dB: AKM[102] = -7.959 dB (diff=0.04120 dB) */ - 0x6c, /* [084] -7.5 dB: AKM[108] = -7.462 dB (diff=0.03767 dB) */ - 0x72, /* [085] -7.0 dB: AKM[114] = -6.993 dB (diff=0.00729 dB) */ - 0x79, /* [086] -6.5 dB: AKM[121] = -6.475 dB (diff=0.02490 dB) */ - 0x80, /* [087] -6.0 dB: AKM[128] = -5.987 dB (diff=0.01340 dB) */ - 0x87, /* [088] -5.5 dB: AKM[135] = -5.524 dB (diff=0.02413 dB) */ - 0x8f, /* [089] -5.0 dB: AKM[143] = -5.024 dB (diff=0.02408 dB) */ - 0x98, /* [090] -4.5 dB: AKM[152] = -4.494 dB (diff=0.00607 dB) */ - 0xa1, /* [091] -4.0 dB: AKM[161] = -3.994 dB (diff=0.00571 dB) */ - 0xaa, /* [092] -3.5 dB: AKM[170] = -3.522 dB (diff=0.02183 dB) */ - 0xb5, /* [093] -3.0 dB: AKM[181] = -2.977 dB (diff=0.02277 dB) */ - 0xbf, /* [094] -2.5 dB: AKM[191] = -2.510 dB (diff=0.01014 dB) */ - 0xcb, /* [095] -2.0 dB: AKM[203] = -1.981 dB (diff=0.01912 dB) */ - 0xd7, /* [096] -1.5 dB: AKM[215] = -1.482 dB (diff=0.01797 dB) */ - 0xe3, /* [097] -1.0 dB: AKM[227] = -1.010 dB (diff=0.01029 dB) */ - 0xf1, /* [098] -0.5 dB: AKM[241] = -0.490 dB (diff=0.00954 dB) */ - 0xff, /* [099] +0.0 dB: AKM[255] = +0.000 dB (diff=0.00000 dB) */ -}; - -static void hr222_write_to_codec(struct pcxhr_mgr *mgr, unsigned short toWrite) -{ - /* - * This is Bit banging of a 16 bit value - * Activate access to codec registers - */ - - unsigned short bit_mask = 0x8000; - - dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); - - dev_dbg(&mgr->pci->dev, "%s() to write : 0x%x\n", __FUNCTION__, toWrite); - - /* activate access to codec registers */ - PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_HIFREQ); - - while (bit_mask) { - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA, - toWrite & bit_mask ? PCXHR_DATA_CODEC : 0); - bit_mask >>= 1; - } - /* termiate access to codec registers */ - PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_RUER); -} - -//Return 1 if this is a valid output level -static inline unsigned int pcxhr_ti_is_valid_output_gain_level (const int level) -{ - return (level >= 0) && - (level <= PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL) ? 1 : 0; -} - -// Return the TI DAC gain value from the given level value. -static unsigned int pcxhr_ti_gain_level_to_register_value(const unsigned int level) -{ - if (level == 0) - return PCXHR_PCM1796_MUTE_OUTPUT_GAIN_VALUE; - - if ((PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE + level) <= PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE) - return PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE + level; //See PCM1796 datasheet p26. - else - return PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE; //saturate -} - -#if 0 -/* NOT NEEDED AT THIS TIME */ -static PCXHR_TI_ADC_FS_RATES pcxhr_get_ti_adc_sampling_range (const unsigned int rate) -{ - if (rate <= PCXHR_TI_ADC_SINGLE_RATE_UPPER_BORDER) - return PCXHR_TI_ADC_FS_SINGLE_RATE; - - if (rate <= PCXHR_TI_ADC_DUAL_RATE_UPPER_BORDER) - return PCXHR_TI_ADC_FS_DUAL_RATE; - - return PCXHR_TI_ADC_FS_QUAD_RATE; - -} - -#endif -static int hr222_set_ti_hw_playback_level(struct pcxhr_mgr *mgr, - int channel_id, int level) -{ - unsigned short cmd; - - if (channel_id > 1 || !pcxhr_ti_is_valid_output_gain_level(level)) - return -EINVAL; - - cmd = (channel_id == 0) ? PCXHR_PCM1796_LEFT_LEVEL_REG_ADDR : - PCXHR_PCM1796_RIGHT_LEVEL_REG_ADDR; - - cmd |= pcxhr_ti_gain_level_to_register_value(level); - - hr222_write_to_codec(mgr, cmd); - return 0; -} - - -static int hr222_set_akm_hw_playback_level(struct pcxhr_mgr *mgr, - int channel_id, int level) -{ - unsigned short cmd; - - dev_dbg(&mgr->pci->dev, - "%s(channel:%d, level:%d) CALLED\n", __FUNCTION__, channel_id, level); - - if (channel_id > 1 || - level < 0 || - level >= ARRAY_SIZE(g_hr222_p_level)) - return -EINVAL; - - if (channel_id == 0) - cmd = AKM_LEFT_LEVEL_CMD; - else - cmd = AKM_RIGHT_LEVEL_CMD; - - /* conversion from PmBoardCodedLevel to AKM nonlinear programming */ - cmd += g_hr222_p_level[level]; - - hr222_write_to_codec(mgr, cmd); - return 0; -} - - -static int hr222_set_hw_capture_level(struct pcxhr_mgr *mgr, - int level_l, int level_r, int level_mic) -{ - /* program all input levels at the same time */ - unsigned int data; - int i; - - if (!mgr->capture_chips) - return -EINVAL; /* no PCX22 */ - - data = ((level_mic & 0xff) << 24); /* micro is mono, but apply */ - data |= ((level_mic & 0xff) << 16); /* level on both channels */ - data |= ((level_r & 0xff) << 8); /* line input right channel */ - data |= (level_l & 0xff); /* line input left channel */ - - PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA); /* activate input codec */ - /* send 32 bits (4 x 8 bits) */ - for (i = 0; i < 32; i++, data <<= 1) { - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA, - (data & 0x80000000) ? PCXHR_DATA_CODEC : 0); - } - PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_RUER); /* close input level codec */ - return 0; -} - -static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level) -{ - unsigned char boost_mask; - boost_mask = (unsigned char) (level << PCXHR_SELMIC_PREAMPLI_OFFSET); - if (boost_mask & (~PCXHR_SELMIC_PREAMPLI_MASK)) - return; /* only values form 0 to 3 accepted */ - - mgr->xlx_selmic &= ~PCXHR_SELMIC_PREAMPLI_MASK; - mgr->xlx_selmic |= boost_mask; - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_SELMIC, mgr->xlx_selmic); - - dev_dbg(&mgr->pci->dev, "hr222_micro_boost : set %x\n", boost_mask); -} - - - -static int hr222_ti_sub_init (struct pcxhr_mgr *mgr) -{ - dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); - - //set the PCM1796 specific values - mgr->pcm1796_operation_reg_value = PCXHR_PCM1796_OPER_RESET_VALUE; - - /* config TI Codecs */ - hr222_write_to_codec(mgr, PCXHR_PCM1796_INIT_CONF_CMD); - - return 0; -} - - -static int hr222_akm_sub_init (struct pcxhr_mgr *mgr) -{ - dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); - /* config AKM */ - hr222_write_to_codec(mgr, AKM_POWER_CONTROL_CMD); - hr222_write_to_codec(mgr, AKM_CLOCK_INF_55K_CMD); - hr222_write_to_codec(mgr, AKM_UNMUTE_CMD); - hr222_write_to_codec(mgr, AKM_RESET_OFF_CMD); - - return 0; -} - -int hr222_sub_init(struct pcxhr_mgr *mgr) -{ - unsigned char reg; - - mgr->board_has_analog = 1; /* analog always available */ - mgr->xlx_cfg = PCXHR_CFG_SYNCDSP_MASK; - - reg = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS); - if (reg & PCXHR_STAT_MIC_CAPS) - mgr->board_has_mic = 1; /* microphone available */ - dev_dbg(&mgr->pci->dev, - "MIC input available = %d\n", mgr->board_has_mic); - - /* reset codec */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, - PCXHR_DSP_RESET_DSP); - - msleep(PCXHR_CODEC_RESET_TIME_MS); - - mgr->dsp_reset = PCXHR_DSP_RESET_DSP | - PCXHR_DSP_RESET_MUTE | - PCXHR_DSP_RESET_CODEC; - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, mgr->dsp_reset); - /* hr222_write_gpo(mgr, 0); does the same */ - msleep(pcxhr_is_board_revision(mgr, PCXHR_BOARD_REVISION_7) ? - PCXHR_TI_CODECS_SETTLING_TIME_MS : - PCXHR_AKM_CODECS_SETTLING_TIME_MS); - - dev_dbg(&mgr->pci->dev, "init board %s\n", - pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? "IE7" : "IE5"); - pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? hr222_ti_sub_init(mgr) : hr222_akm_sub_init(mgr); - - /* init micro boost */ - hr222_micro_boost(mgr, 0); - - return 0; -} - - -/* calc PLL register */ -/* TODO : there is a very similar fct in pcxhr.c */ -static int hr222_compute_pll_freq_register(unsigned int freq, - unsigned int *pllreg, - unsigned int *realfreq) -{ - unsigned int reg; - - if (freq < 6900 || freq > 219000) - return -EINVAL; - reg = (28224000 * 2) / freq; - reg = (reg - 1) / 2; - if (reg < 0x100) - *pllreg = reg + 0xC00; - else if (reg < 0x200) - *pllreg = reg + 0x800; - else if (reg < 0x400) - *pllreg = reg & 0x1ff; - else if (reg < 0x800) { - *pllreg = ((reg >> 1) & 0x1ff) + 0x200; - reg &= ~1; - } else { - *pllreg = ((reg >> 2) & 0x1ff) + 0x400; - reg &= ~3; - } - if (realfreq) - *realfreq = (28224000 / (reg + 1)); - return 0; -} - - -static int hr222_sub_set_pll_reg( struct pcxhr_mgr* mgr, unsigned int reg_value) -{ - //Set Clock at DSP level. - if (mgr->use_clock_type == HR22_CLOCK_TYPE_INTERNAL) { - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_HIFREQ, reg_value >> 8); - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_LOFREQ, reg_value & 0xff); - } - - /* set clock source */ - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_CFG, mgr->xlx_cfg); - - //PLL Settling time - msleep(PCXHR_XLX_PLL_SETTLING_TIME_MS); - - return 0; -} - -static int hr222_ti_sub_set_clock(struct pcxhr_mgr *mgr, - unsigned int rate, unsigned int pllreg) - -{ - //full MUTE, set the clock, unmute - - // Mute DAC Out : disable operation - - hr222_write_to_codec(mgr, - PCXHR_PCM1796_OPER_REG_ADDR | mgr->pcm1796_operation_reg_value | PCXHR_PCM1796_OPER_OPE_DISABLED_BIT); - - // Mute DSP (OUT), use the cached value - mgr->dsp_reset &= ~PCXHR_DSP_RESET_MUTE ; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET , mgr->dsp_reset ); - - //Mute Input : FPGA Command - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_MUTEIN, PCXHR_XLX_MUTEIN_CMD_ON); - - hr222_sub_set_pll_reg(mgr, pllreg); - - //UN-MUTE - //Unmute Input : FPGA Command - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_MUTEIN, PCXHR_XLX_MUTEIN_CMD_OFF); - - // Unmute DSP (OUT), use the cached value (MUTE unmute in fact !!) - mgr->dsp_reset |= PCXHR_DSP_RESET_MUTE ; - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET , mgr->dsp_reset ); - - //unmutes DAC : just re-enable - hr222_write_to_codec(mgr, - PCXHR_PCM1796_OPER_REG_ADDR | mgr->pcm1796_operation_reg_value); - - return 0; -} - - -static int hr222_akm_sub_set_clock(struct pcxhr_mgr *mgr, - unsigned int rate, unsigned int pllreg) - -{ - unsigned int speed = 0; - - hr222_write_to_codec(mgr, AKM_MUTE_CMD); - - hr222_sub_set_pll_reg(mgr, pllreg); - - /* codec speed modes */ - speed = rate < 55000 ? 0 : 1; - if (mgr->codec_speed != speed) { - mgr->codec_speed = speed; - if (speed == 0) - hr222_write_to_codec(mgr, AKM_CLOCK_INF_55K_CMD); - else - hr222_write_to_codec(mgr, AKM_CLOCK_SUP_55K_CMD); - } - - hr222_write_to_codec(mgr, AKM_UNMUTE_CMD); - - return 0; -} - -int hr222_sub_set_clock(struct pcxhr_mgr *mgr, - unsigned int rate, - int *changed) -{ - unsigned int pllreg = 0; - int err; - unsigned realfreq = rate; - - switch (mgr->use_clock_type) { - case HR22_CLOCK_TYPE_INTERNAL: - err = hr222_compute_pll_freq_register(rate, &pllreg, &realfreq); - if (err) - return err; - - mgr->xlx_cfg &= ~(PCXHR_CFG_CLOCKIN_SEL_MASK | - PCXHR_CFG_CLOCK_UER1_SEL_MASK); - break; - case HR22_CLOCK_TYPE_AES_SYNC: - mgr->xlx_cfg |= PCXHR_CFG_CLOCKIN_SEL_MASK; - mgr->xlx_cfg &= ~PCXHR_CFG_CLOCK_UER1_SEL_MASK; - break; - case HR22_CLOCK_TYPE_AES_1: - if (!mgr->board_has_aes1) - return -EINVAL; - - mgr->xlx_cfg |= (PCXHR_CFG_CLOCKIN_SEL_MASK | - PCXHR_CFG_CLOCK_UER1_SEL_MASK); - break; - default: - return -EINVAL; - } - //Codec specific code. - pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? hr222_ti_sub_set_clock(mgr, rate, pllreg) : hr222_akm_sub_set_clock(mgr, rate, pllreg); - - mgr->sample_rate_real = realfreq; - mgr->cur_clock_type = mgr->use_clock_type; - - if (changed) - *changed = 1; - - dev_dbg(&mgr->pci->dev, "set_clock to %dHz (realfreq=%d pllreg=%x)\n", - rate, realfreq, pllreg); - return 0; -} - -int hr222_get_external_clock(struct pcxhr_mgr *mgr, - enum pcxhr_clock_type clock_type, - int *sample_rate) -{ - int rate, calc_rate = 0; - unsigned int ticks; - unsigned char mask, reg; - - if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) { - - mask = (PCXHR_SUER_CLOCK_PRESENT_MASK | - PCXHR_SUER_DATA_PRESENT_MASK); - reg = PCXHR_STAT_FREQ_SYNC_MASK; - - } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) { - - mask = (PCXHR_SUER1_CLOCK_PRESENT_MASK | - PCXHR_SUER1_DATA_PRESENT_MASK); - reg = PCXHR_STAT_FREQ_UER1_MASK; - - } else { - dev_dbg(&mgr->pci->dev, - "get_external_clock : type %d not supported\n", - clock_type); - return -EINVAL; /* other clocks not supported */ - } - - if ((PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_CSUER) & mask) != mask) { - dev_dbg(&mgr->pci->dev, - "get_external_clock(%d) = 0 Hz\n", clock_type); - *sample_rate = 0; - return 0; /* no external clock locked */ - } - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS, reg); /* calculate freq */ - - /* save the measured clock frequency */ - reg |= PCXHR_STAT_FREQ_SAVE_MASK; - - if (mgr->last_reg_stat != reg) { - udelay(500); /* wait min 2 cycles of lowest freq (8000) */ - mgr->last_reg_stat = reg; - } - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS, reg); /* save */ - - /* get the frequency */ - ticks = (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_CFG); - ticks = (ticks & 0x03) << 8; - ticks |= (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET); - - if (ticks != 0) - calc_rate = 28224000 / ticks; - /* rounding */ - if (calc_rate > 184200) - rate = 192000; - else if (calc_rate > 152200) - rate = 176400; - else if (calc_rate > 112000) - rate = 128000; - else if (calc_rate > 92100) - rate = 96000; - else if (calc_rate > 76100) - rate = 88200; - else if (calc_rate > 56000) - rate = 64000; - else if (calc_rate > 46050) - rate = 48000; - else if (calc_rate > 38050) - rate = 44100; - else if (calc_rate > 28000) - rate = 32000; - else if (calc_rate > 23025) - rate = 24000; - else if (calc_rate > 19025) - rate = 22050; - else if (calc_rate > 14000) - rate = 16000; - else if (calc_rate > 11512) - rate = 12000; - else if (calc_rate > 9512) - rate = 11025; - else if (calc_rate > 7000) - rate = 8000; - else - rate = 0; - - dev_dbg(&mgr->pci->dev, "External clock is at %d Hz (measured %d Hz)\n", - rate, calc_rate); - *sample_rate = rate; - return 0; -} - - -int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value) -{ - if (is_gpi) { - unsigned char reg = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS); - *value = (int)(reg & PCXHR_STAT_GPI_MASK) >> - PCXHR_STAT_GPI_OFFSET; - } else { - *value = (int)(mgr->dsp_reset & PCXHR_DSP_RESET_GPO_MASK) >> - PCXHR_DSP_RESET_GPO_OFFSET; - } - return 0; -} - - -int hr222_write_gpo(struct pcxhr_mgr *mgr, int value) -{ - unsigned char reg = mgr->dsp_reset & ~PCXHR_DSP_RESET_GPO_MASK; - - reg |= (unsigned char)(value << PCXHR_DSP_RESET_GPO_OFFSET) & - PCXHR_DSP_RESET_GPO_MASK; - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, reg); - mgr->dsp_reset = reg; - return 0; -} - -int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable) -{ - if (enable) - mgr->dsp_reset |= PCXHR_DSP_RESET_SMPTE; - else - mgr->dsp_reset &= ~PCXHR_DSP_RESET_SMPTE; - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, mgr->dsp_reset); - return 0; -} - -int hr222_update_analog_audio_level(struct snd_pcxhr *chip, - int is_capture, int channel) -{ - dev_dbg(chip->card->dev, - "hr222_update_analog_audio_level(%s chan=%d)\n", - snd_pcm_direction_name(is_capture), channel); - if (is_capture) { - int level_l, level_r, level_mic; - /* we have to update all levels */ - if (chip->analog_capture_active) { - level_l = chip->analog_capture_volume[0]; - level_r = chip->analog_capture_volume[1]; - } else { - level_l = HR222_LINE_CAPTURE_LEVEL_MIN; - level_r = HR222_LINE_CAPTURE_LEVEL_MIN; - } - if (chip->mic_active) - level_mic = chip->mic_volume; - else - level_mic = HR222_MICRO_CAPTURE_LEVEL_MIN; - return hr222_set_hw_capture_level(chip->mgr, - level_l, level_r, level_mic); - } else { - int vol; - if (chip->analog_playback_active[channel]) - vol = chip->analog_playback_volume[channel]; - else - vol = HR222_LINE_PLAYBACK_LEVEL_MIN; - - return pcxhr_is_board_revision(chip->mgr, PCXHR_BOARD_REVISION_7) ? - hr222_set_ti_hw_playback_level(chip->mgr, channel, vol) : - hr222_set_akm_hw_playback_level(chip->mgr, channel, vol); - } -} - - -/*texts[5] = {"Line", "Digital", "Digi+SRC", "Mic", "Line+Mic"}*/ -#define SOURCE_LINE 0 -#define SOURCE_DIGITAL 1 -#define SOURCE_DIGISRC 2 -#define SOURCE_MIC 3 -#define SOURCE_LINEMIC 4 - -int hr222_set_audio_source(struct snd_pcxhr *chip) -{ - int digital = 0; - /* default analog source */ - chip->mgr->xlx_cfg &= ~(PCXHR_CFG_SRC_MASK | - PCXHR_CFG_DATAIN_SEL_MASK | - PCXHR_CFG_DATA_UER1_SEL_MASK); - - if (chip->audio_capture_source == SOURCE_DIGISRC) { - chip->mgr->xlx_cfg |= PCXHR_CFG_SRC_MASK; - digital = 1; - } else { - if (chip->audio_capture_source == SOURCE_DIGITAL) - digital = 1; - } - if (digital) { - chip->mgr->xlx_cfg |= PCXHR_CFG_DATAIN_SEL_MASK; - if (chip->mgr->board_has_aes1) { - /* get data from the AES1 plug */ - chip->mgr->xlx_cfg |= PCXHR_CFG_DATA_UER1_SEL_MASK; - } - /* chip->mic_active = 0; */ - /* chip->analog_capture_active = 0; */ - } else { - int update_lvl = 0; - chip->analog_capture_active = 0; - chip->mic_active = 0; - if (chip->audio_capture_source == SOURCE_LINE || - chip->audio_capture_source == SOURCE_LINEMIC) { - if (chip->analog_capture_active == 0) - update_lvl = 1; - chip->analog_capture_active = 1; - } - if (chip->audio_capture_source == SOURCE_MIC || - chip->audio_capture_source == SOURCE_LINEMIC) { - if (chip->mic_active == 0) - update_lvl = 1; - chip->mic_active = 1; - } - if (update_lvl) { - /* capture: update all 3 mutes/unmutes with one call */ - hr222_update_analog_audio_level(chip, 1, 0); - } - } - /* set the source infos (max 3 bits modified) */ - PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CFG, chip->mgr->xlx_cfg); - return 0; -} - - -int hr222_iec958_capture_byte(struct snd_pcxhr *chip, - int aes_idx, unsigned char *aes_bits) -{ - unsigned char idx = (unsigned char)(aes_idx * 8); - unsigned char temp = 0; - unsigned char mask = chip->mgr->board_has_aes1 ? - PCXHR_SUER1_BIT_C_READ_MASK : PCXHR_SUER_BIT_C_READ_MASK; - int i; - for (i = 0; i < 8; i++) { - PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_RUER, idx++); /* idx < 192 */ - temp <<= 1; - if (PCXHR_INPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CSUER) & mask) - temp |= 1; - } - dev_dbg(chip->card->dev, "read iec958 AES %d byte %d = 0x%x\n", - chip->chip_idx, aes_idx, temp); - *aes_bits = temp; - return 0; -} - - -int hr222_iec958_update_byte(struct snd_pcxhr *chip, - int aes_idx, unsigned char aes_bits) -{ - int i; - unsigned char new_bits = aes_bits; - unsigned char old_bits = chip->aes_bits[aes_idx]; - unsigned char idx = (unsigned char)(aes_idx * 8); - for (i = 0; i < 8; i++) { - if ((old_bits & 0x01) != (new_bits & 0x01)) { - /* idx < 192 */ - PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_RUER, idx); - /* write C and U bit */ - PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CSUER, new_bits&0x01 ? - PCXHR_SUER_BIT_C_WRITE_MASK : 0); - } - idx++; - old_bits >>= 1; - new_bits >>= 1; - } - chip->aes_bits[aes_idx] = aes_bits; - return 0; -} - -static void hr222_phantom_power(struct pcxhr_mgr *mgr, int power) -{ - if (power) - mgr->xlx_selmic |= PCXHR_SELMIC_PHANTOM_ALIM; - else - mgr->xlx_selmic &= ~PCXHR_SELMIC_PHANTOM_ALIM; - - PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_SELMIC, mgr->xlx_selmic); - - dev_dbg(&mgr->pci->dev, "hr222_phantom_power : set %d\n", power); -} - - -/* mic level */ -static const DECLARE_TLV_DB_SCALE(db_scale_mic_hr222, -9850, 50, 650); - -static int hr222_mic_vol_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 1; - uinfo->value.integer.min = HR222_MICRO_CAPTURE_LEVEL_MIN; /* -98 dB */ - /* gains from 9 dB to 31.5 dB not recommended; use micboost instead */ - uinfo->value.integer.max = HR222_MICRO_CAPTURE_LEVEL_MAX; /* +7 dB */ - return 0; -} - -static int hr222_mic_vol_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->mic_volume; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int hr222_mic_vol_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - mutex_lock(&chip->mgr->mixer_mutex); - if (chip->mic_volume != ucontrol->value.integer.value[0]) { - changed = 1; - chip->mic_volume = ucontrol->value.integer.value[0]; - hr222_update_analog_audio_level(chip, 1, 0); - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new hr222_control_mic_level = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_TLV_READ), - .name = "Mic Capture Volume", - .info = hr222_mic_vol_info, - .get = hr222_mic_vol_get, - .put = hr222_mic_vol_put, - .tlv = { .p = db_scale_mic_hr222 }, -}; - - -/* mic boost level */ -static const DECLARE_TLV_DB_SCALE(db_scale_micboost_hr222, 0, 1800, 5400); - -static int hr222_mic_boost_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 1; - uinfo->value.integer.min = 0; /* 0 dB */ - uinfo->value.integer.max = 3; /* 54 dB */ - return 0; -} - -static int hr222_mic_boost_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->mic_boost; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int hr222_mic_boost_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - mutex_lock(&chip->mgr->mixer_mutex); - if (chip->mic_boost != ucontrol->value.integer.value[0]) { - changed = 1; - chip->mic_boost = ucontrol->value.integer.value[0]; - hr222_micro_boost(chip->mgr, chip->mic_boost); - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new hr222_control_mic_boost = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_TLV_READ), - .name = "MicBoost Capture Volume", - .info = hr222_mic_boost_info, - .get = hr222_mic_boost_get, - .put = hr222_mic_boost_put, - .tlv = { .p = db_scale_micboost_hr222 }, -}; - - -/******************* Phantom power switch *******************/ -#define hr222_phantom_power_info snd_ctl_boolean_mono_info - -static int hr222_phantom_power_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->phantom_power; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int hr222_phantom_power_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int power, changed = 0; - - mutex_lock(&chip->mgr->mixer_mutex); - power = !!ucontrol->value.integer.value[0]; - if (chip->phantom_power != power) { - hr222_phantom_power(chip->mgr, power); - chip->phantom_power = power; - changed = 1; - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new hr222_phantom_power_switch = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Phantom Power Switch", - .info = hr222_phantom_power_info, - .get = hr222_phantom_power_get, - .put = hr222_phantom_power_put, -}; - - -int hr222_add_mic_controls(struct snd_pcxhr *chip) -{ - int err; - if (!chip->mgr->board_has_mic) - return 0; - - /* controls */ - err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_level, - chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_boost, - chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_phantom_power_switch, - chip)); - return err; -} diff --git a/snd-pcxhr-dkms/src/pcxhr_mix22.h b/snd-pcxhr-dkms/src/pcxhr_mix22.h deleted file mode 100644 index b1e4ffc..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_mix22.h +++ /dev/null @@ -1,47 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Driver for Digigram pcxhr compatible soundcards - * - * low level interface with interrupt ans message handling - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef __SOUND_PCXHR_MIX22_H -#define __SOUND_PCXHR_MIX22_H - -struct pcxhr_mgr; - -int hr222_sub_init(struct pcxhr_mgr *mgr); -int hr222_sub_set_clock(struct pcxhr_mgr *mgr, unsigned int rate, - int *changed); -int hr222_get_external_clock(struct pcxhr_mgr *mgr, - enum pcxhr_clock_type clock_type, - int *sample_rate); - -int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value); -int hr222_write_gpo(struct pcxhr_mgr *mgr, int value); -int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable); - -#define HR222_LINE_PLAYBACK_LEVEL_MIN 0 /* -25.5 dB */ -#define HR222_LINE_PLAYBACK_ZERO_LEVEL 51 /* 0.0 dB */ -#define HR222_LINE_PLAYBACK_LEVEL_MAX 99 /* +24.0 dB */ - -#define HR222_LINE_CAPTURE_LEVEL_MIN 0 /* -111.5 dB */ -#define HR222_LINE_CAPTURE_ZERO_LEVEL 223 /* 0.0 dB */ -#define HR222_LINE_CAPTURE_LEVEL_MAX 255 /* +16 dB */ -#define HR222_MICRO_CAPTURE_LEVEL_MIN 0 /* -98.5 dB */ -#define HR222_MICRO_CAPTURE_LEVEL_MAX 210 /* +6.5 dB */ - -int hr222_update_analog_audio_level(struct snd_pcxhr *chip, - int is_capture, - int channel); -int hr222_set_audio_source(struct snd_pcxhr *chip); -int hr222_iec958_capture_byte(struct snd_pcxhr *chip, int aes_idx, - unsigned char *aes_bits); -int hr222_iec958_update_byte(struct snd_pcxhr *chip, int aes_idx, - unsigned char aes_bits); - -int hr222_add_mic_controls(struct snd_pcxhr *chip); - -#endif /* __SOUND_PCXHR_MIX22_H */ diff --git a/snd-pcxhr-dkms/src/pcxhr_mixer.c b/snd-pcxhr-dkms/src/pcxhr_mixer.c deleted file mode 100644 index aec5094..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_mixer.c +++ /dev/null @@ -1,1246 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -#define __NO_VERSION__ -/* - * Driver for Digigram pcxhr compatible soundcards - * - * mixer callbacks - * - * Copyright (c) 2004 by Digigram - */ - -#include -#include -#include -#include -#include -#include "pcxhr.h" -#include "pcxhr_hwdep.h" -#include "pcxhr_core.h" -#include -#include -#include -#include "pcxhr_mixer.h" -#include "pcxhr_mix22.h" - -#define PCXHR_LINE_CAPTURE_LEVEL_MIN 0 /* -112.0 dB */ -#define PCXHR_LINE_CAPTURE_LEVEL_MAX 255 /* +15.5 dB */ -#define PCXHR_LINE_CAPTURE_ZERO_LEVEL 224 /* 0.0 dB ( 0 dBu -> 0 dBFS ) */ - -#define PCXHR_LINE_PLAYBACK_LEVEL_MIN 0 /* -104.0 dB */ -#define PCXHR_LINE_PLAYBACK_LEVEL_MAX 128 /* +24.0 dB */ -#define PCXHR_LINE_PLAYBACK_ZERO_LEVEL 104 /* 0.0 dB ( 0 dBFS -> 0 dBu ) */ - -static const DECLARE_TLV_DB_SCALE(db_scale_analog_capture, -11200, 50, 1550); -static const DECLARE_TLV_DB_SCALE(db_scale_analog_playback, -10400, 100, 2400); - -static const DECLARE_TLV_DB_SCALE(db_scale_a_hr222_capture, -11150, 50, 1600); -static const DECLARE_TLV_DB_SCALE(db_scale_a_hr222_playback, -2550, 50, 2400); - -static int pcxhr_update_analog_audio_level(struct snd_pcxhr *chip, - int is_capture, int channel) -{ - int err, vol; - struct pcxhr_rmh rmh; - - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - if (is_capture) { - rmh.cmd[0] |= IO_NUM_REG_IN_ANA_LEVEL; - rmh.cmd[2] = chip->analog_capture_volume[channel]; - } else { - rmh.cmd[0] |= IO_NUM_REG_OUT_ANA_LEVEL; - if (chip->analog_playback_active[channel]) - vol = chip->analog_playback_volume[channel]; - else - vol = PCXHR_LINE_PLAYBACK_LEVEL_MIN; - /* playback analog levels are inversed */ - rmh.cmd[2] = PCXHR_LINE_PLAYBACK_LEVEL_MAX - vol; - } - rmh.cmd[1] = 1 << ((2 * chip->chip_idx) + channel); /* audio mask */ - rmh.cmd_len = 3; - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err < 0) { - dev_dbg(chip->card->dev, - "error update_analog_audio_level card(%d)" - " is_capture(%d) err(%x)\n", - chip->chip_idx, is_capture, err); - return -EINVAL; - } - return 0; -} - -/* - * analog level control - */ -static int pcxhr_analog_vol_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 2; - if (kcontrol->private_value == 0) { /* playback */ - if (chip->mgr->is_hr_stereo) { - uinfo->value.integer.min = - HR222_LINE_PLAYBACK_LEVEL_MIN; /* -25 dB */ - uinfo->value.integer.max = - HR222_LINE_PLAYBACK_LEVEL_MAX; /* +24 dB */ - } else { - uinfo->value.integer.min = - PCXHR_LINE_PLAYBACK_LEVEL_MIN; /*-104 dB */ - uinfo->value.integer.max = - PCXHR_LINE_PLAYBACK_LEVEL_MAX; /* +24 dB */ - } - } else { /* capture */ - if (chip->mgr->is_hr_stereo) { - uinfo->value.integer.min = - HR222_LINE_CAPTURE_LEVEL_MIN; /*-112 dB */ - uinfo->value.integer.max = - HR222_LINE_CAPTURE_LEVEL_MAX; /* +15.5 dB */ - } else { - uinfo->value.integer.min = - PCXHR_LINE_CAPTURE_LEVEL_MIN; /*-112 dB */ - uinfo->value.integer.max = - PCXHR_LINE_CAPTURE_LEVEL_MAX; /* +15.5 dB */ - } - } - return 0; -} - -static int pcxhr_analog_vol_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - if (kcontrol->private_value == 0) { /* playback */ - ucontrol->value.integer.value[0] = chip->analog_playback_volume[0]; - ucontrol->value.integer.value[1] = chip->analog_playback_volume[1]; - } else { /* capture */ - ucontrol->value.integer.value[0] = chip->analog_capture_volume[0]; - ucontrol->value.integer.value[1] = chip->analog_capture_volume[1]; - } - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_analog_vol_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - int is_capture, i; - - mutex_lock(&chip->mgr->mixer_mutex); - is_capture = (kcontrol->private_value != 0); - for (i = 0; i < 2; i++) { - int new_volume = ucontrol->value.integer.value[i]; - int *stored_volume = is_capture ? - &chip->analog_capture_volume[i] : - &chip->analog_playback_volume[i]; - if (is_capture) { - if (chip->mgr->is_hr_stereo) { - if (new_volume < HR222_LINE_CAPTURE_LEVEL_MIN || - new_volume > HR222_LINE_CAPTURE_LEVEL_MAX) - continue; - } else { - if (new_volume < PCXHR_LINE_CAPTURE_LEVEL_MIN || - new_volume > PCXHR_LINE_CAPTURE_LEVEL_MAX) - continue; - } - } else { - if (chip->mgr->is_hr_stereo) { - if (new_volume < HR222_LINE_PLAYBACK_LEVEL_MIN || - new_volume > HR222_LINE_PLAYBACK_LEVEL_MAX) - continue; - } else { - if (new_volume < PCXHR_LINE_PLAYBACK_LEVEL_MIN || - new_volume > PCXHR_LINE_PLAYBACK_LEVEL_MAX) - continue; - } - } - if (*stored_volume != new_volume) { - *stored_volume = new_volume; - changed = 1; - if (chip->mgr->is_hr_stereo) - hr222_update_analog_audio_level(chip, - is_capture, i); - else - pcxhr_update_analog_audio_level(chip, - is_capture, i); - } - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new pcxhr_control_analog_level = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_TLV_READ), - /* name will be filled later */ - .info = pcxhr_analog_vol_info, - .get = pcxhr_analog_vol_get, - .put = pcxhr_analog_vol_put, - /* tlv will be filled later */ -}; - -/* shared */ - -#define pcxhr_sw_info snd_ctl_boolean_stereo_info - -static int pcxhr_audio_sw_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->analog_playback_active[0]; - ucontrol->value.integer.value[1] = chip->analog_playback_active[1]; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_audio_sw_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int i, changed = 0; - mutex_lock(&chip->mgr->mixer_mutex); - for(i = 0; i < 2; i++) { - if (chip->analog_playback_active[i] != - ucontrol->value.integer.value[i]) { - chip->analog_playback_active[i] = - !!ucontrol->value.integer.value[i]; - changed = 1; - /* update playback levels */ - if (chip->mgr->is_hr_stereo) - hr222_update_analog_audio_level(chip, 0, i); - else - pcxhr_update_analog_audio_level(chip, 0, i); - } - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new pcxhr_control_output_switch = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Master Playback Switch", - .info = pcxhr_sw_info, /* shared */ - .get = pcxhr_audio_sw_get, - .put = pcxhr_audio_sw_put -}; - - -#define PCXHR_DIGITAL_LEVEL_MIN 0x000 /* -110 dB */ -#define PCXHR_DIGITAL_LEVEL_MAX 0x1ff /* +18 dB */ -#define PCXHR_DIGITAL_ZERO_LEVEL 0x1b7 /* 0 dB */ - -static const DECLARE_TLV_DB_SCALE(db_scale_digital, -10975, 25, 1800); - -#define MORE_THAN_ONE_STREAM_LEVEL 0x000001 -#define VALID_STREAM_PAN_LEVEL_MASK 0x800000 -#define VALID_STREAM_LEVEL_MASK 0x400000 -#define VALID_STREAM_LEVEL_1_MASK 0x200000 -#define VALID_STREAM_LEVEL_2_MASK 0x100000 - -static int pcxhr_update_playback_stream_level(struct snd_pcxhr* chip, int idx) -{ - int err; - struct pcxhr_rmh rmh; - struct pcxhr_pipe *pipe = &chip->playback_pipe; - int left, right; - - if (chip->digital_playback_active[idx][0]) - left = chip->digital_playback_volume[idx][0]; - else - left = PCXHR_DIGITAL_LEVEL_MIN; - if (chip->digital_playback_active[idx][1]) - right = chip->digital_playback_volume[idx][1]; - else - right = PCXHR_DIGITAL_LEVEL_MIN; - - pcxhr_init_rmh(&rmh, CMD_STREAM_OUT_LEVEL_ADJUST); - /* add pipe and stream mask */ - pcxhr_set_pipe_cmd_params(&rmh, 0, pipe->first_audio, 0, 1<left / right->right panoramic level */ - rmh.cmd[0] |= MORE_THAN_ONE_STREAM_LEVEL; - rmh.cmd[2] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_1_MASK; - rmh.cmd[2] |= (left << 10); - rmh.cmd[3] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_2_MASK; - rmh.cmd[3] |= right; - rmh.cmd_len = 4; - - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err < 0) { - dev_dbg(chip->card->dev, "error update_playback_stream_level " - "card(%d) err(%x)\n", chip->chip_idx, err); - return -EINVAL; - } - return 0; -} - -#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000 -#define AUDIO_IO_HAS_MUTE_MONITOR_1 0x200000 -#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x000001 -#define VALID_AUDIO_IO_MONITOR_LEVEL 0x000002 -#define VALID_AUDIO_IO_MUTE_LEVEL 0x000004 -#define VALID_AUDIO_IO_MUTE_MONITOR_1 0x000008 - -static int pcxhr_update_audio_pipe_level(struct snd_pcxhr *chip, - int capture, int channel) -{ - int err; - struct pcxhr_rmh rmh; - struct pcxhr_pipe *pipe; - - if (capture) - pipe = &chip->capture_pipe[0]; - else - pipe = &chip->playback_pipe; - - pcxhr_init_rmh(&rmh, CMD_AUDIO_LEVEL_ADJUST); - /* add channel mask */ - pcxhr_set_pipe_cmd_params(&rmh, capture, 0, 0, - 1 << (channel + pipe->first_audio)); - /* TODO : if mask (3 << pipe->first_audio) is used, left and right - * channel will be programmed to the same params */ - if (capture) { - rmh.cmd[0] |= VALID_AUDIO_IO_DIGITAL_LEVEL; - /* VALID_AUDIO_IO_MUTE_LEVEL not yet handled - * (capture pipe level) */ - rmh.cmd[2] = chip->digital_capture_volume[channel]; - } else { - rmh.cmd[0] |= VALID_AUDIO_IO_MONITOR_LEVEL | - VALID_AUDIO_IO_MUTE_MONITOR_1; - /* VALID_AUDIO_IO_DIGITAL_LEVEL and VALID_AUDIO_IO_MUTE_LEVEL - * not yet handled (playback pipe level) - */ - rmh.cmd[2] = chip->monitoring_volume[channel] << 10; - if (chip->monitoring_active[channel] == 0) - rmh.cmd[2] |= AUDIO_IO_HAS_MUTE_MONITOR_1; - } - rmh.cmd_len = 3; - - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err < 0) { - dev_dbg(chip->card->dev, - "error update_audio_level(%d) err=%x\n", - chip->chip_idx, err); - return -EINVAL; - } - return 0; -} - - -/* shared */ -static int pcxhr_digital_vol_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 2; - uinfo->value.integer.min = PCXHR_DIGITAL_LEVEL_MIN; /* -109.5 dB */ - uinfo->value.integer.max = PCXHR_DIGITAL_LEVEL_MAX; /* 18.0 dB */ - return 0; -} - - -static int pcxhr_pcm_vol_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ - int *stored_volume; - int is_capture = kcontrol->private_value; - - mutex_lock(&chip->mgr->mixer_mutex); - if (is_capture) /* digital capture */ - stored_volume = chip->digital_capture_volume; - else /* digital playback */ - stored_volume = chip->digital_playback_volume[idx]; - ucontrol->value.integer.value[0] = stored_volume[0]; - ucontrol->value.integer.value[1] = stored_volume[1]; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_pcm_vol_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ - int changed = 0; - int is_capture = kcontrol->private_value; - int *stored_volume; - int i; - - mutex_lock(&chip->mgr->mixer_mutex); - if (is_capture) /* digital capture */ - stored_volume = chip->digital_capture_volume; - else /* digital playback */ - stored_volume = chip->digital_playback_volume[idx]; - for (i = 0; i < 2; i++) { - int vol = ucontrol->value.integer.value[i]; - if (vol < PCXHR_DIGITAL_LEVEL_MIN || - vol > PCXHR_DIGITAL_LEVEL_MAX) - continue; - if (stored_volume[i] != vol) { - stored_volume[i] = vol; - changed = 1; - if (is_capture) /* update capture volume */ - pcxhr_update_audio_pipe_level(chip, 1, i); - } - } - if (!is_capture && changed) /* update playback volume */ - pcxhr_update_playback_stream_level(chip, idx); - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new snd_pcxhr_pcm_vol = -{ - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_TLV_READ), - /* name will be filled later */ - /* count will be filled later */ - .info = pcxhr_digital_vol_info, /* shared */ - .get = pcxhr_pcm_vol_get, - .put = pcxhr_pcm_vol_put, - .tlv = { .p = db_scale_digital }, -}; - - -static int pcxhr_pcm_sw_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ - - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->digital_playback_active[idx][0]; - ucontrol->value.integer.value[1] = chip->digital_playback_active[idx][1]; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_pcm_sw_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ - int i, j; - - mutex_lock(&chip->mgr->mixer_mutex); - j = idx; - for (i = 0; i < 2; i++) { - if (chip->digital_playback_active[j][i] != - ucontrol->value.integer.value[i]) { - chip->digital_playback_active[j][i] = - !!ucontrol->value.integer.value[i]; - changed = 1; - } - } - if (changed) - pcxhr_update_playback_stream_level(chip, idx); - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new pcxhr_control_pcm_switch = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "PCM Playback Switch", - .count = PCXHR_PLAYBACK_STREAMS, - .info = pcxhr_sw_info, /* shared */ - .get = pcxhr_pcm_sw_get, - .put = pcxhr_pcm_sw_put -}; - - -/* - * monitoring level control - */ - -static int pcxhr_monitor_vol_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->monitoring_volume[0]; - ucontrol->value.integer.value[1] = chip->monitoring_volume[1]; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_monitor_vol_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - int i; - - mutex_lock(&chip->mgr->mixer_mutex); - for (i = 0; i < 2; i++) { - if (chip->monitoring_volume[i] != - ucontrol->value.integer.value[i]) { - chip->monitoring_volume[i] = - ucontrol->value.integer.value[i]; - if (chip->monitoring_active[i]) - /* update monitoring volume and mute */ - /* do only when monitoring is unmuted */ - pcxhr_update_audio_pipe_level(chip, 0, i); - changed = 1; - } - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new pcxhr_control_monitor_vol = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | - SNDRV_CTL_ELEM_ACCESS_TLV_READ), - .name = "Monitoring Playback Volume", - .info = pcxhr_digital_vol_info, /* shared */ - .get = pcxhr_monitor_vol_get, - .put = pcxhr_monitor_vol_put, - .tlv = { .p = db_scale_digital }, -}; - -/* - * monitoring switch control - */ - -static int pcxhr_monitor_sw_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - mutex_lock(&chip->mgr->mixer_mutex); - ucontrol->value.integer.value[0] = chip->monitoring_active[0]; - ucontrol->value.integer.value[1] = chip->monitoring_active[1]; - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_monitor_sw_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int changed = 0; - int i; - - mutex_lock(&chip->mgr->mixer_mutex); - for (i = 0; i < 2; i++) { - if (chip->monitoring_active[i] != - ucontrol->value.integer.value[i]) { - chip->monitoring_active[i] = - !!ucontrol->value.integer.value[i]; - changed |= (1<mgr->mixer_mutex); - return (changed != 0); -} - -static const struct snd_kcontrol_new pcxhr_control_monitor_sw = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Monitoring Playback Switch", - .info = pcxhr_sw_info, /* shared */ - .get = pcxhr_monitor_sw_get, - .put = pcxhr_monitor_sw_put -}; - - - -/* - * audio source select - */ -#define PCXHR_SOURCE_AUDIO01_UER 0x000100 -#define PCXHR_SOURCE_AUDIO01_SYNC 0x000200 -#define PCXHR_SOURCE_AUDIO23_UER 0x000400 -#define PCXHR_SOURCE_AUDIO45_UER 0x001000 -#define PCXHR_SOURCE_AUDIO67_UER 0x040000 - -static int pcxhr_set_audio_source(struct snd_pcxhr* chip) -{ - struct pcxhr_rmh rmh; - unsigned int mask, reg; - unsigned int codec; - int err, changed; - - switch (chip->chip_idx) { - case 0 : mask = PCXHR_SOURCE_AUDIO01_UER; codec = CS8420_01_CS; break; - case 1 : mask = PCXHR_SOURCE_AUDIO23_UER; codec = CS8420_23_CS; break; - case 2 : mask = PCXHR_SOURCE_AUDIO45_UER; codec = CS8420_45_CS; break; - case 3 : mask = PCXHR_SOURCE_AUDIO67_UER; codec = CS8420_67_CS; break; - default: return -EINVAL; - } - if (chip->audio_capture_source != 0) { - reg = mask; /* audio source from digital plug */ - } else { - reg = 0; /* audio source from analog plug */ - } - /* set the input source */ - pcxhr_write_io_num_reg_cont(chip->mgr, mask, reg, &changed); - /* resync them (otherwise channel inversion possible) */ - if (changed) { - pcxhr_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS); - rmh.cmd[0] |= (1 << chip->chip_idx); - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - return err; - } - if (chip->mgr->board_aes_in_192k) { - int i; - unsigned int src_config = 0xC0; - /* update all src configs with one call */ - for (i = 0; (i < 4) && (i < chip->mgr->capture_chips); i++) { - if (chip->mgr->chip[i]->audio_capture_source == 2) - src_config |= (1 << (3 - i)); - } - /* set codec SRC on off */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd_len = 2; - rmh.cmd[0] |= IO_NUM_REG_CONFIG_SRC; - rmh.cmd[1] = src_config; - err = pcxhr_send_msg(chip->mgr, &rmh); - } else { - int use_src = 0; - if (chip->audio_capture_source == 2) - use_src = 1; - /* set codec SRC on off */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd_len = 3; - rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; - rmh.cmd[1] = codec; - rmh.cmd[2] = ((CS8420_DATA_FLOW_CTL & CHIP_SIG_AND_MAP_SPI) | - (use_src ? 0x41 : 0x54)); - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - return err; - rmh.cmd[2] = ((CS8420_CLOCK_SRC_CTL & CHIP_SIG_AND_MAP_SPI) | - (use_src ? 0x41 : 0x49)); - err = pcxhr_send_msg(chip->mgr, &rmh); - } - return err; -} - -static int pcxhr_audio_src_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - static const char *texts[5] = { - "Line", "Digital", "Digi+SRC", "Mic", "Line+Mic" - }; - int i; - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - - i = 2; /* no SRC, no Mic available */ - if (chip->mgr->board_has_aes1) { - i = 3; /* SRC available */ - if (chip->mgr->board_has_mic) - i = 5; /* Mic and MicroMix available */ - } - return snd_ctl_enum_info(uinfo, 1, i, texts); -} - -static int pcxhr_audio_src_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - ucontrol->value.enumerated.item[0] = chip->audio_capture_source; - return 0; -} - -static int pcxhr_audio_src_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int ret = 0; - int i = 2; /* no SRC, no Mic available */ - if (chip->mgr->board_has_aes1) { - i = 3; /* SRC available */ - if (chip->mgr->board_has_mic) - i = 5; /* Mic and MicroMix available */ - } - if (ucontrol->value.enumerated.item[0] >= i) - return -EINVAL; - mutex_lock(&chip->mgr->mixer_mutex); - if (chip->audio_capture_source != ucontrol->value.enumerated.item[0]) { - chip->audio_capture_source = ucontrol->value.enumerated.item[0]; - if (chip->mgr->is_hr_stereo) - hr222_set_audio_source(chip); - else - pcxhr_set_audio_source(chip); - ret = 1; - } - mutex_unlock(&chip->mgr->mixer_mutex); - return ret; -} - -static const struct snd_kcontrol_new pcxhr_control_audio_src = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Capture Source", - .info = pcxhr_audio_src_info, - .get = pcxhr_audio_src_get, - .put = pcxhr_audio_src_put, -}; - - -/* - * clock type selection - * enum pcxhr_clock_type { - * PCXHR_CLOCK_TYPE_INTERNAL = 0, - * PCXHR_CLOCK_TYPE_WORD_CLOCK, - * PCXHR_CLOCK_TYPE_AES_SYNC, - * PCXHR_CLOCK_TYPE_AES_1, - * PCXHR_CLOCK_TYPE_AES_2, - * PCXHR_CLOCK_TYPE_AES_3, - * PCXHR_CLOCK_TYPE_AES_4, - * PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4, - * HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL, - * HR22_CLOCK_TYPE_AES_SYNC, - * HR22_CLOCK_TYPE_AES_1, - * HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1, - * }; - */ - -static int pcxhr_clock_type_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - static const char *textsPCXHR[7] = { - "Internal", "WordClock", "AES Sync", - "AES 1", "AES 2", "AES 3", "AES 4" - }; - static const char *textsHR22[3] = { - "Internal", "AES Sync", "AES 1" - }; - const char **texts; - struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); - int clock_items = 2; /* at least Internal and AES Sync clock */ - if (mgr->board_has_aes1) { - clock_items += mgr->capture_chips; /* add AES x */ - if (!mgr->is_hr_stereo) - clock_items += 1; /* add word clock */ - } - if (mgr->is_hr_stereo) { - texts = textsHR22; - snd_BUG_ON(clock_items > (HR22_CLOCK_TYPE_MAX+1)); - } else { - texts = textsPCXHR; - snd_BUG_ON(clock_items > (PCXHR_CLOCK_TYPE_MAX+1)); - } - return snd_ctl_enum_info(uinfo, 1, clock_items, texts); -} - -static int pcxhr_clock_type_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); - ucontrol->value.enumerated.item[0] = mgr->use_clock_type; - return 0; -} - -static int pcxhr_clock_type_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); - int rate, ret = 0; - unsigned int clock_items = 2; /* at least Internal and AES Sync clock */ - if (mgr->board_has_aes1) { - clock_items += mgr->capture_chips; /* add AES x */ - if (!mgr->is_hr_stereo) - clock_items += 1; /* add word clock */ - } - if (ucontrol->value.enumerated.item[0] >= clock_items) - return -EINVAL; - mutex_lock(&mgr->mixer_mutex); - if (mgr->use_clock_type != ucontrol->value.enumerated.item[0]) { - mutex_lock(&mgr->setup_mutex); - mgr->use_clock_type = ucontrol->value.enumerated.item[0]; - rate = 0; - if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) { - pcxhr_get_external_clock(mgr, mgr->use_clock_type, - &rate); - } else { - rate = mgr->sample_rate; - if (!rate) - rate = 48000; - } - if (rate) { - pcxhr_set_clock(mgr, rate); - if (mgr->sample_rate) - mgr->sample_rate = rate; - } - mutex_unlock(&mgr->setup_mutex); - ret = 1; /* return 1 even if the set was not done. ok ? */ - } - mutex_unlock(&mgr->mixer_mutex); - return ret; -} - -static const struct snd_kcontrol_new pcxhr_control_clock_type = { - .iface = SNDRV_CTL_ELEM_IFACE_MIXER, - .name = "Clock Mode", - .info = pcxhr_clock_type_info, - .get = pcxhr_clock_type_get, - .put = pcxhr_clock_type_put, -}; - -/* - * clock rate control - * specific control that scans the sample rates on the external plugs - */ -static int pcxhr_clock_rate_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); - uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; - uinfo->count = 3 + mgr->capture_chips; - uinfo->value.integer.min = 0; /* clock not present */ - uinfo->value.integer.max = 192000; /* max sample rate 192 kHz */ - return 0; -} - -static int pcxhr_clock_rate_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); - int i, err, rate; - - mutex_lock(&mgr->mixer_mutex); - for(i = 0; i < 3 + mgr->capture_chips; i++) { - if (i == PCXHR_CLOCK_TYPE_INTERNAL) - rate = mgr->sample_rate_real; - else { - err = pcxhr_get_external_clock(mgr, i, &rate); - if (err) - break; - } - ucontrol->value.integer.value[i] = rate; - } - mutex_unlock(&mgr->mixer_mutex); - return 0; -} - -static const struct snd_kcontrol_new pcxhr_control_clock_rate = { - .access = SNDRV_CTL_ELEM_ACCESS_READ, - .iface = SNDRV_CTL_ELEM_IFACE_CARD, - .name = "Clock Rates", - .info = pcxhr_clock_rate_info, - .get = pcxhr_clock_rate_get, -}; - -/* - * IEC958 status bits - */ -static int pcxhr_iec958_info(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_info *uinfo) -{ - uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; - uinfo->count = 1; - return 0; -} - -static int pcxhr_iec958_capture_byte(struct snd_pcxhr *chip, - int aes_idx, unsigned char *aes_bits) -{ - int i, err; - unsigned char temp; - struct pcxhr_rmh rmh; - - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); - rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; - switch (chip->chip_idx) { - /* instead of CS8420_01_CS use CS8416_01_CS for AES SYNC plug */ - case 0: rmh.cmd[1] = CS8420_01_CS; break; - case 1: rmh.cmd[1] = CS8420_23_CS; break; - case 2: rmh.cmd[1] = CS8420_45_CS; break; - case 3: rmh.cmd[1] = CS8420_67_CS; break; - default: return -EINVAL; - } - if (chip->mgr->board_aes_in_192k) { - switch (aes_idx) { - case 0: rmh.cmd[2] = CS8416_CSB0; break; - case 1: rmh.cmd[2] = CS8416_CSB1; break; - case 2: rmh.cmd[2] = CS8416_CSB2; break; - case 3: rmh.cmd[2] = CS8416_CSB3; break; - case 4: rmh.cmd[2] = CS8416_CSB4; break; - default: return -EINVAL; - } - } else { - switch (aes_idx) { - /* instead of CS8420_CSB0 use CS8416_CSBx for AES SYNC plug */ - case 0: rmh.cmd[2] = CS8420_CSB0; break; - case 1: rmh.cmd[2] = CS8420_CSB1; break; - case 2: rmh.cmd[2] = CS8420_CSB2; break; - case 3: rmh.cmd[2] = CS8420_CSB3; break; - case 4: rmh.cmd[2] = CS8420_CSB4; break; - default: return -EINVAL; - } - } - /* size and code the chip id for the fpga */ - rmh.cmd[1] &= 0x0fffff; - /* chip signature + map for spi read */ - rmh.cmd[2] &= CHIP_SIG_AND_MAP_SPI; - rmh.cmd_len = 3; - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - return err; - - if (chip->mgr->board_aes_in_192k) { - temp = (unsigned char)rmh.stat[1]; - } else { - temp = 0; - /* reversed bit order (not with CS8416_01_CS) */ - for (i = 0; i < 8; i++) { - temp <<= 1; - if (rmh.stat[1] & (1 << i)) - temp |= 1; - } - } - dev_dbg(chip->card->dev, "read iec958 AES %d byte %d = 0x%x\n", - chip->chip_idx, aes_idx, temp); - *aes_bits = temp; - return 0; -} - -static int pcxhr_iec958_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - unsigned char aes_bits; - int i, err; - - mutex_lock(&chip->mgr->mixer_mutex); - for(i = 0; i < 5; i++) { - if (kcontrol->private_value == 0) /* playback */ - aes_bits = chip->aes_bits[i]; - else { /* capture */ - if (chip->mgr->is_hr_stereo) - err = hr222_iec958_capture_byte(chip, i, - &aes_bits); - else - err = pcxhr_iec958_capture_byte(chip, i, - &aes_bits); - if (err) - break; - } - ucontrol->value.iec958.status[i] = aes_bits; - } - mutex_unlock(&chip->mgr->mixer_mutex); - return 0; -} - -static int pcxhr_iec958_mask_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - int i; - for (i = 0; i < 5; i++) - ucontrol->value.iec958.status[i] = 0xff; - return 0; -} - -static int pcxhr_iec958_update_byte(struct snd_pcxhr *chip, - int aes_idx, unsigned char aes_bits) -{ - int i, err, cmd; - unsigned char new_bits = aes_bits; - unsigned char old_bits = chip->aes_bits[aes_idx]; - struct pcxhr_rmh rmh; - - for (i = 0; i < 8; i++) { - if ((old_bits & 0x01) != (new_bits & 0x01)) { - cmd = chip->chip_idx & 0x03; /* chip index 0..3 */ - if (chip->chip_idx > 3) - /* new bit used if chip_idx>3 (PCX1222HR) */ - cmd |= 1 << 22; - cmd |= ((aes_idx << 3) + i) << 2; /* add bit offset */ - cmd |= (new_bits & 0x01) << 23; /* add bit value */ - pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); - rmh.cmd[0] |= IO_NUM_REG_CUER; - rmh.cmd[1] = cmd; - rmh.cmd_len = 2; - dev_dbg(chip->card->dev, - "write iec958 AES %d byte %d bit %d (cmd %x)\n", - chip->chip_idx, aes_idx, i, cmd); - err = pcxhr_send_msg(chip->mgr, &rmh); - if (err) - return err; - } - old_bits >>= 1; - new_bits >>= 1; - } - chip->aes_bits[aes_idx] = aes_bits; - return 0; -} - -static int pcxhr_iec958_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); - int i, changed = 0; - - /* playback */ - mutex_lock(&chip->mgr->mixer_mutex); - for (i = 0; i < 5; i++) { - if (ucontrol->value.iec958.status[i] != chip->aes_bits[i]) { - if (chip->mgr->is_hr_stereo) - hr222_iec958_update_byte(chip, i, - ucontrol->value.iec958.status[i]); - else - pcxhr_iec958_update_byte(chip, i, - ucontrol->value.iec958.status[i]); - changed = 1; - } - } - mutex_unlock(&chip->mgr->mixer_mutex); - return changed; -} - -static const struct snd_kcontrol_new pcxhr_control_playback_iec958_mask = { - .access = SNDRV_CTL_ELEM_ACCESS_READ, - .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), - .info = pcxhr_iec958_info, - .get = pcxhr_iec958_mask_get -}; -static const struct snd_kcontrol_new pcxhr_control_playback_iec958 = { - .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), - .info = pcxhr_iec958_info, - .get = pcxhr_iec958_get, - .put = pcxhr_iec958_put, - .private_value = 0 /* playback */ -}; - -static const struct snd_kcontrol_new pcxhr_control_capture_iec958_mask = { - .access = SNDRV_CTL_ELEM_ACCESS_READ, - .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), - .info = pcxhr_iec958_info, - .get = pcxhr_iec958_mask_get -}; -static const struct snd_kcontrol_new pcxhr_control_capture_iec958 = { - .access = SNDRV_CTL_ELEM_ACCESS_READ, - .iface = SNDRV_CTL_ELEM_IFACE_PCM, - .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), - .info = pcxhr_iec958_info, - .get = pcxhr_iec958_get, - .private_value = 1 /* capture */ -}; - -static void pcxhr_init_audio_levels(struct snd_pcxhr *chip) -{ - int i; - - for (i = 0; i < 2; i++) { - if (chip->nb_streams_play) { - int j; - /* at boot time the digital volumes are unmuted 0dB */ - for (j = 0; j < PCXHR_PLAYBACK_STREAMS; j++) { - chip->digital_playback_active[j][i] = 1; - chip->digital_playback_volume[j][i] = - PCXHR_DIGITAL_ZERO_LEVEL; - } - /* after boot, only two bits are set on the uer - * interface - */ - chip->aes_bits[0] = (IEC958_AES0_PROFESSIONAL | - IEC958_AES0_PRO_FS_48000); -#ifdef CONFIG_SND_DEBUG - /* analog volumes for playback - * (is LEVEL_MIN after boot) - */ - chip->analog_playback_active[i] = 1; - if (chip->mgr->is_hr_stereo) - chip->analog_playback_volume[i] = - HR222_LINE_PLAYBACK_ZERO_LEVEL; - else { - chip->analog_playback_volume[i] = - PCXHR_LINE_PLAYBACK_ZERO_LEVEL; - pcxhr_update_analog_audio_level(chip, 0, i); - } -#endif - /* stereo cards need to be initialised after boot */ - if (chip->mgr->is_hr_stereo) - hr222_update_analog_audio_level(chip, 0, i); - } - if (chip->nb_streams_capt) { - /* at boot time the digital volumes are unmuted 0dB */ - chip->digital_capture_volume[i] = - PCXHR_DIGITAL_ZERO_LEVEL; - chip->analog_capture_active = 1; -#ifdef CONFIG_SND_DEBUG - /* analog volumes for playback - * (is LEVEL_MIN after boot) - */ - if (chip->mgr->is_hr_stereo) - chip->analog_capture_volume[i] = - HR222_LINE_CAPTURE_ZERO_LEVEL; - else { - chip->analog_capture_volume[i] = - PCXHR_LINE_CAPTURE_ZERO_LEVEL; - pcxhr_update_analog_audio_level(chip, 1, i); - } -#endif - /* stereo cards need to be initialised after boot */ - if (chip->mgr->is_hr_stereo) - hr222_update_analog_audio_level(chip, 1, i); - } - } - - return; -} - - -int pcxhr_create_mixer(struct pcxhr_mgr *mgr) -{ - struct snd_pcxhr *chip; - int err, i; - - mutex_init(&mgr->mixer_mutex); /* can be in another place */ - - for (i = 0; i < mgr->num_cards; i++) { - struct snd_kcontrol_new temp; - chip = mgr->chip[i]; - - if (chip->nb_streams_play) { - /* analog output level control */ - temp = pcxhr_control_analog_level; - temp.name = "Master Playback Volume"; - temp.private_value = 0; /* playback */ - if (mgr->is_hr_stereo) - temp.tlv.p = db_scale_a_hr222_playback; - else - temp.tlv.p = db_scale_analog_playback; - err = snd_ctl_add(chip->card, - snd_ctl_new1(&temp, chip)); - if (err < 0) - return err; - - /* output mute controls */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_output_switch, - chip)); - if (err < 0) - return err; - - temp = snd_pcxhr_pcm_vol; - temp.name = "PCM Playback Volume"; - temp.count = PCXHR_PLAYBACK_STREAMS; - temp.private_value = 0; /* playback */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&temp, chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_pcm_switch, chip)); - if (err < 0) - return err; - - /* IEC958 controls */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_playback_iec958_mask, - chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_playback_iec958, - chip)); - if (err < 0) - return err; - } - if (chip->nb_streams_capt) { - /* analog input level control */ - temp = pcxhr_control_analog_level; - temp.name = "Line Capture Volume"; - temp.private_value = 1; /* capture */ - if (mgr->is_hr_stereo) - temp.tlv.p = db_scale_a_hr222_capture; - else - temp.tlv.p = db_scale_analog_capture; - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&temp, chip)); - if (err < 0) - return err; - - temp = snd_pcxhr_pcm_vol; - temp.name = "PCM Capture Volume"; - temp.count = 1; - temp.private_value = 1; /* capture */ - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&temp, chip)); - if (err < 0) - return err; - - /* Audio source */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_audio_src, chip)); - if (err < 0) - return err; - - /* IEC958 controls */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_capture_iec958_mask, - chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_capture_iec958, - chip)); - if (err < 0) - return err; - - if (mgr->is_hr_stereo) { - err = hr222_add_mic_controls(chip); - if (err < 0) - return err; - } - } - /* monitoring only if playback and capture device available */ - if (chip->nb_streams_capt > 0 && chip->nb_streams_play > 0) { - /* monitoring */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_monitor_vol, chip)); - if (err < 0) - return err; - - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_monitor_sw, chip)); - if (err < 0) - return err; - } - - if (i == 0) { - /* clock mode only one control per pcxhr */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_clock_type, mgr)); - if (err < 0) - return err; - /* non standard control used to scan - * the external clock presence/frequencies - */ - err = snd_ctl_add(chip->card, - snd_ctl_new1(&pcxhr_control_clock_rate, mgr)); - if (err < 0) - return err; - } - - /* init values for the mixer data */ - pcxhr_init_audio_levels(chip); - } - - return 0; -} diff --git a/snd-pcxhr-dkms/src/pcxhr_mixer.h b/snd-pcxhr-dkms/src/pcxhr_mixer.h deleted file mode 100644 index 9c08620..0000000 --- a/snd-pcxhr-dkms/src/pcxhr_mixer.h +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ -/* - * Driver for Digigram pcxhr compatible soundcards - * - * include file for mixer - * - * Copyright (c) 2004 by Digigram - */ - -#ifndef __SOUND_PCXHR_MIXER_H -#define __SOUND_PCXHR_MIXER_H - -/* exported */ -int pcxhr_create_mixer(struct pcxhr_mgr *mgr); - -#endif /* __SOUND_PCXHR_MIXER_H */ diff --git a/snd-pcxhr/debian/changelog b/snd-pcxhr/debian/changelog new file mode 100644 index 0000000..f5a948c --- /dev/null +++ b/snd-pcxhr/debian/changelog @@ -0,0 +1,12 @@ +snd-pcxhr (2.0.13-2) unstable; urgency=medium + + * split package into dkms and firmware + + -- Christian Pointner Thu, 08 May 2025 19:08:47 +0200 + +snd-pcxhr (2.0.13-1) unstable; urgency=medium + + * import base version from https://github.com/Digigram-audio/pcxhr + * add patches to fix build for bookworm + + -- Christian Pointner Thu, 27 Mar 2025 20:24:47 +0100 diff --git a/snd-pcxhr/debian/control b/snd-pcxhr/debian/control new file mode 100644 index 0000000..9092ce3 --- /dev/null +++ b/snd-pcxhr/debian/control @@ -0,0 +1,18 @@ +Source: snd-pcxhr +Section: kernel +Priority: optional +Maintainer: Christian Pointner +Build-Depends: debhelper-compat (= 13), + dh-sequence-dkms, +Standards-Version: 4.6.0 +Rules-Requires-Root: no + +Package: snd-pcxhr-dkms +Architecture: all +Depends: snd-pcxhr-firmware, ${misc:Depends} +Description: ALSA Driver for Digigram VX/PCX cards + +Package: snd-pcxhr-firmware +Architecture: all +Depends: ${misc:Depends} +Description: Firmware files for Digigram VX/PCX soundcards diff --git a/snd-pcxhr/debian/rules b/snd-pcxhr/debian/rules new file mode 100755 index 0000000..69bc5cc --- /dev/null +++ b/snd-pcxhr/debian/rules @@ -0,0 +1,18 @@ +#!/usr/bin/make -f + +include /usr/share/dpkg/pkg-info.mk + +%: + dh $@ --with dkms + +override_dh_auto_install: + install -d $$(pwd)/debian/tmp/usr/src/snd-pcxhr-$(DEB_VERSION_UPSTREAM)/ + install $$(pwd)/src/Makefile $$(pwd)/src/*.c $$(pwd)/src/*.h $$(pwd)/debian/tmp/usr/src/snd-pcxhr-$(DEB_VERSION_UPSTREAM)/ + install -d $$(pwd)/debian/tmp/lib/firmware/pcxhr/ + install $$(pwd)/src/firmware/* $$(pwd)/debian/tmp/lib/firmware/pcxhr/ + +override_dh_auto_configure: +override_dh_auto_build: +override_dh_auto_test: +override_dh_auto_install: +override_dh_auto_clean: diff --git a/snd-pcxhr/debian/snd-pcxhr-dkms.dkms b/snd-pcxhr/debian/snd-pcxhr-dkms.dkms new file mode 120000 index 0000000..8366489 --- /dev/null +++ b/snd-pcxhr/debian/snd-pcxhr-dkms.dkms @@ -0,0 +1 @@ +../src/dkms.conf \ No newline at end of file diff --git a/snd-pcxhr/debian/snd-pcxhr-dkms.install b/snd-pcxhr/debian/snd-pcxhr-dkms.install new file mode 100644 index 0000000..b601f22 --- /dev/null +++ b/snd-pcxhr/debian/snd-pcxhr-dkms.install @@ -0,0 +1 @@ +usr/src diff --git a/snd-pcxhr/debian/snd-pcxhr-firmware.install b/snd-pcxhr/debian/snd-pcxhr-firmware.install new file mode 100644 index 0000000..89d87aa --- /dev/null +++ b/snd-pcxhr/debian/snd-pcxhr-firmware.install @@ -0,0 +1 @@ +lib/firmware/pcxhr/ diff --git a/snd-pcxhr/debian/source/format b/snd-pcxhr/debian/source/format new file mode 100644 index 0000000..d3827e7 --- /dev/null +++ b/snd-pcxhr/debian/source/format @@ -0,0 +1 @@ +1.0 diff --git a/snd-pcxhr/src/Makefile b/snd-pcxhr/src/Makefile new file mode 100644 index 0000000..d68eb62 --- /dev/null +++ b/snd-pcxhr/src/Makefile @@ -0,0 +1,41 @@ +# SPDX-License-Identifier: GPL-2.0-only +snd-pcxhr-y := pcxhr.o pcxhr_hwdep.o pcxhr_mixer.o pcxhr_core.o pcxhr_mix22.o pcxhr_hrtimer.o +# pcxhr_clock_monitoring.o +obj-$(CONFIG_SND_PCXHR) += snd-pcxhr.o + +# KVERSION is the kernel version +# If not defined, it is set to the current kernel version +KVERSION ?= $(shell uname -r) + +# KDIR is the location of the kernel source. The current standard is +# to link to the associated source tree from the directory containing +# the compiled modules. +KDIR := /lib/modules/$(KVERSION)/build + +# PWD is the current working directory and the location of our module +# source files. +PWD := $(shell pwd) + +# Set CFLAGS according to the needs +#Activate sound logs +#CFLAGS_MODULE += -DCONFIG_SND_DEBUG_VERBOSE + +MODULES_DIR := /lib/modules/$(shell uname -r)/digigram +# default is the default make target. The rule here says to run make +# with a working directory of the directory containing the kernel +# source and compile only the modules in the PWD (local) directory. +default: + $(MAKE) -C $(KDIR) M=$(PWD) modules + +all: clean default + +clean: + $(MAKE) -C $(KDIR) M=$(PWD) clean + +install: + test -d $(MODULES_DIR) || mkdir $(MODULES_DIR) + cp *.ko /lib/modules/$(shell uname -r)/digigram + depmod -ae + + +.PHONY: default all clean install diff --git a/snd-pcxhr/src/dkms.conf b/snd-pcxhr/src/dkms.conf new file mode 100644 index 0000000..e43bdfb --- /dev/null +++ b/snd-pcxhr/src/dkms.conf @@ -0,0 +1,8 @@ +PACKAGE_NAME="snd-pcxhr" +PACKAGE_VERSION="2.0.13" +CLEAN="make clean" +MAKE[0]="make all KVERSION=$kernelver" +BUILT_MODULE_NAME[0]="snd-pcxhr" +DEST_MODULE_NAME[0]="snd-pcxhr-ng" +DEST_MODULE_LOCATION[0]="/updates" +AUTOINSTALL="yes" diff --git a/snd-pcxhr/src/firmware/b321_512.b56 b/snd-pcxhr/src/firmware/b321_512.b56 new file mode 100644 index 0000000..3e82688 Binary files /dev/null and b/snd-pcxhr/src/firmware/b321_512.b56 differ diff --git a/snd-pcxhr/src/firmware/d321_512.d56 b/snd-pcxhr/src/firmware/d321_512.d56 new file mode 100644 index 0000000..9531b2c Binary files /dev/null and b/snd-pcxhr/src/firmware/d321_512.d56 differ diff --git a/snd-pcxhr/src/firmware/dspb1222e.b56 b/snd-pcxhr/src/firmware/dspb1222e.b56 new file mode 100644 index 0000000..8ec982e Binary files /dev/null and b/snd-pcxhr/src/firmware/dspb1222e.b56 differ diff --git a/snd-pcxhr/src/firmware/dspb1222hr.b56 b/snd-pcxhr/src/firmware/dspb1222hr.b56 new file mode 100644 index 0000000..068390a Binary files /dev/null and b/snd-pcxhr/src/firmware/dspb1222hr.b56 differ diff --git a/snd-pcxhr/src/firmware/dspb882e.b56 b/snd-pcxhr/src/firmware/dspb882e.b56 new file mode 100644 index 0000000..39e6621 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspb882e.b56 differ diff --git a/snd-pcxhr/src/firmware/dspb882hr.b56 b/snd-pcxhr/src/firmware/dspb882hr.b56 new file mode 100644 index 0000000..edcac1e Binary files /dev/null and b/snd-pcxhr/src/firmware/dspb882hr.b56 differ diff --git a/snd-pcxhr/src/firmware/dspb924.b56 b/snd-pcxhr/src/firmware/dspb924.b56 new file mode 100644 index 0000000..1c5b415 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspb924.b56 differ diff --git a/snd-pcxhr/src/firmware/dspd1222.d56 b/snd-pcxhr/src/firmware/dspd1222.d56 new file mode 100644 index 0000000..66f8e83 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspd1222.d56 differ diff --git a/snd-pcxhr/src/firmware/dspd222.d56 b/snd-pcxhr/src/firmware/dspd222.d56 new file mode 100644 index 0000000..27b3a9a Binary files /dev/null and b/snd-pcxhr/src/firmware/dspd222.d56 differ diff --git a/snd-pcxhr/src/firmware/dspd882.d56 b/snd-pcxhr/src/firmware/dspd882.d56 new file mode 100644 index 0000000..6d46f0f Binary files /dev/null and b/snd-pcxhr/src/firmware/dspd882.d56 differ diff --git a/snd-pcxhr/src/firmware/dspe882.e56 b/snd-pcxhr/src/firmware/dspe882.e56 new file mode 100644 index 0000000..6289320 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspe882.e56 differ diff --git a/snd-pcxhr/src/firmware/dspe924.e56 b/snd-pcxhr/src/firmware/dspe924.e56 new file mode 100644 index 0000000..1448af7 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspe924.e56 differ diff --git a/snd-pcxhr/src/firmware/dspe924e5.e56 b/snd-pcxhr/src/firmware/dspe924e5.e56 new file mode 100644 index 0000000..6858cf5 Binary files /dev/null and b/snd-pcxhr/src/firmware/dspe924e5.e56 differ diff --git a/snd-pcxhr/src/firmware/e321_512.e56 b/snd-pcxhr/src/firmware/e321_512.e56 new file mode 100644 index 0000000..5a13498 Binary files /dev/null and b/snd-pcxhr/src/firmware/e321_512.e56 differ diff --git a/snd-pcxhr/src/firmware/xc_1_882.dat b/snd-pcxhr/src/firmware/xc_1_882.dat new file mode 100644 index 0000000..5ed6cd7 Binary files /dev/null and b/snd-pcxhr/src/firmware/xc_1_882.dat differ diff --git a/snd-pcxhr/src/firmware/xi_1_882.dat b/snd-pcxhr/src/firmware/xi_1_882.dat new file mode 100644 index 0000000..6329571 Binary files /dev/null and b/snd-pcxhr/src/firmware/xi_1_882.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc1222e.dat b/snd-pcxhr/src/firmware/xlxc1222e.dat new file mode 100644 index 0000000..f6aac85 Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc1222e.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc1222hr.dat b/snd-pcxhr/src/firmware/xlxc1222hr.dat new file mode 100644 index 0000000..21dabde Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc1222hr.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc222.dat b/snd-pcxhr/src/firmware/xlxc222.dat new file mode 100644 index 0000000..f93a792 Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc222.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc882e.dat b/snd-pcxhr/src/firmware/xlxc882e.dat new file mode 100644 index 0000000..8f88656 Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc882e.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc882hr.dat b/snd-pcxhr/src/firmware/xlxc882hr.dat new file mode 100644 index 0000000..d59dfe0 Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc882hr.dat differ diff --git a/snd-pcxhr/src/firmware/xlxc924.dat b/snd-pcxhr/src/firmware/xlxc924.dat new file mode 100644 index 0000000..ba3fc2f Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxc924.dat differ diff --git a/snd-pcxhr/src/firmware/xlxint.dat b/snd-pcxhr/src/firmware/xlxint.dat new file mode 100644 index 0000000..d57d0cd Binary files /dev/null and b/snd-pcxhr/src/firmware/xlxint.dat differ diff --git a/snd-pcxhr/src/pcxhr.c b/snd-pcxhr/src/pcxhr.c new file mode 100644 index 0000000..0793e69 --- /dev/null +++ b/snd-pcxhr/src/pcxhr.c @@ -0,0 +1,1813 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * main file with alsa callbacks + * + * Copyright (c) 2004 by Digigram + */ + + +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#if (LINUX_VERSION_CODE > KERNEL_VERSION(3,7,0)) +#include +#else +#include +#endif + +#include +#include +#include +#include +#include +#include +#include "pcxhr.h" +#include "pcxhr_mixer.h" +#include "pcxhr_hwdep.h" +#include "pcxhr_core.h" +#include "pcxhr_mix22.h" + +#define DRIVER_NAME "pcxhr" + + +MODULE_AUTHOR("Gilbert Passador , " + "Loïc Boissy "); +MODULE_DESCRIPTION("Digigram " DRIVER_NAME " " PCXHR_DRIVER_VERSION_STRING); +MODULE_LICENSE("GPL"); + +static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ +static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ +static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */ +static bool mono[SNDRV_CARDS]; /* capture mono only */ + +module_param_array(index, int, NULL, 0444); +MODULE_PARM_DESC(index, "Index value for Digigram " DRIVER_NAME " soundcard"); +module_param_array(id, charp, NULL, 0444); +MODULE_PARM_DESC(id, "ID string for Digigram " DRIVER_NAME " soundcard"); +module_param_array(enable, bool, NULL, 0444); +MODULE_PARM_DESC(enable, "Enable Digigram " DRIVER_NAME " soundcard"); +module_param_array(mono, bool, NULL, 0444); +MODULE_PARM_DESC(mono, "Mono capture mode (default is stereo)"); + +enum { + PCI_ID_VX882HR, + PCI_ID_PCX882HR, + PCI_ID_VX881HR, + PCI_ID_PCX881HR, + PCI_ID_VX882E, + PCI_ID_PCX882E, + PCI_ID_VX881E, + PCI_ID_PCX881E, + PCI_ID_VX1222HR, + PCI_ID_PCX1222HR, + PCI_ID_VX1221HR, + PCI_ID_PCX1221HR, + PCI_ID_VX1222E, + PCI_ID_PCX1222E, + PCI_ID_VX1221E, + PCI_ID_PCX1221E, + PCI_ID_VX222HR, + PCI_ID_VX222E, + PCI_ID_PCX22HR, + PCI_ID_PCX22E, + PCI_ID_VX222HRMIC, + PCI_ID_VX222E_MIC, + PCI_ID_PCX924HR, + PCI_ID_PCX924E, + PCI_ID_PCX924HRMIC, + PCI_ID_PCX924E_MIC, + PCI_ID_VX442HR, + PCI_ID_PCX442HR, + PCI_ID_VX442E, + PCI_ID_PCX442E, + PCI_ID_VX822HR, + PCI_ID_PCX822HR, + PCI_ID_VX822E, + PCI_ID_PCX822E, + PCI_ID_VX222E_IE5, + PCI_ID_PCX924E_IE5, + PCI_ID_VX222E_MIC_IE5, + PCI_ID_PCX22E_IE5, + PCI_ID_PCX924E_MIC_IE5, + PCI_ID_VX222E_IE7, + PCI_ID_PCX924E_IE7, + PCI_ID_VX222E_MIC_IE7, + PCI_ID_PCX22E_IE7, + PCI_ID_PCX924E_MIC_IE7, + PCI_ID_LAST +}; + +static const struct pci_device_id pcxhr_ids[] = { + { 0x10b5, 0x9656, 0x1369, 0xb001, 0, 0, PCI_ID_VX882HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb101, 0, 0, PCI_ID_PCX882HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb201, 0, 0, PCI_ID_VX881HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb301, 0, 0, PCI_ID_PCX881HR, }, + { 0x10b5, 0x9056, 0x1369, 0xb021, 0, 0, PCI_ID_VX882E, }, + { 0x10b5, 0x9056, 0x1369, 0xb121, 0, 0, PCI_ID_PCX882E, }, + { 0x10b5, 0x9056, 0x1369, 0xb221, 0, 0, PCI_ID_VX881E, }, + { 0x10b5, 0x9056, 0x1369, 0xb321, 0, 0, PCI_ID_PCX881E, }, + { 0x10b5, 0x9656, 0x1369, 0xb401, 0, 0, PCI_ID_VX1222HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb501, 0, 0, PCI_ID_PCX1222HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb601, 0, 0, PCI_ID_VX1221HR, }, + { 0x10b5, 0x9656, 0x1369, 0xb701, 0, 0, PCI_ID_PCX1221HR, }, + { 0x10b5, 0x9056, 0x1369, 0xb421, 0, 0, PCI_ID_VX1222E, }, + { 0x10b5, 0x9056, 0x1369, 0xb521, 0, 0, PCI_ID_PCX1222E, }, + { 0x10b5, 0x9056, 0x1369, 0xb621, 0, 0, PCI_ID_VX1221E, }, + { 0x10b5, 0x9056, 0x1369, 0xb721, 0, 0, PCI_ID_PCX1221E, }, + { 0x10b5, 0x9056, 0x1369, 0xba01, 0, 0, PCI_ID_VX222HR, }, + { 0x10b5, 0x9056, 0x1369, 0xba21, 0, 0, PCI_ID_VX222E, }, + { 0x10b5, 0x9056, 0x1369, 0xbd01, 0, 0, PCI_ID_PCX22HR, }, + { 0x10b5, 0x9056, 0x1369, 0xbd21, 0, 0, PCI_ID_PCX22E, }, + { 0x10b5, 0x9056, 0x1369, 0xbc01, 0, 0, PCI_ID_VX222HRMIC, }, + { 0x10b5, 0x9056, 0x1369, 0xbc21, 0, 0, PCI_ID_VX222E_MIC, }, + { 0x10b5, 0x9056, 0x1369, 0xbb01, 0, 0, PCI_ID_PCX924HR, }, + { 0x10b5, 0x9056, 0x1369, 0xbb21, 0, 0, PCI_ID_PCX924E, }, + { 0x10b5, 0x9056, 0x1369, 0xbf01, 0, 0, PCI_ID_PCX924HRMIC, }, + { 0x10b5, 0x9056, 0x1369, 0xbf21, 0, 0, PCI_ID_PCX924E_MIC, }, + { 0x10b5, 0x9656, 0x1369, 0xd001, 0, 0, PCI_ID_VX442HR, }, + { 0x10b5, 0x9656, 0x1369, 0xd101, 0, 0, PCI_ID_PCX442HR, }, + { 0x10b5, 0x9056, 0x1369, 0xd021, 0, 0, PCI_ID_VX442E, }, + { 0x10b5, 0x9056, 0x1369, 0xd121, 0, 0, PCI_ID_PCX442E, }, + { 0x10b5, 0x9656, 0x1369, 0xd201, 0, 0, PCI_ID_VX822HR, }, + { 0x10b5, 0x9656, 0x1369, 0xd301, 0, 0, PCI_ID_PCX822HR, }, + { 0x10b5, 0x9056, 0x1369, 0xd221, 0, 0, PCI_ID_VX822E, }, + { 0x10b5, 0x9056, 0x1369, 0xd321, 0, 0, PCI_ID_PCX822E, }, + { 0x10b5, 0x9056, 0x1369, 0xba41, 0, 0, PCI_ID_VX222E_IE5, }, + { 0x10b5, 0x9056, 0x1369, 0xbb41, 0, 0, PCI_ID_PCX924E_IE5, }, + { 0x10b5, 0x9056, 0x1369, 0xbc41, 0, 0, PCI_ID_VX222E_MIC_IE5, }, + { 0x10b5, 0x9056, 0x1369, 0xbd41, 0, 0, PCI_ID_PCX22E_IE5, }, + { 0x10b5, 0x9056, 0x1369, 0xbf41, 0, 0, PCI_ID_PCX924E_MIC_IE5, }, + { 0x10b5, 0x9056, 0x1369, 0xba61, 0, 0, PCI_ID_VX222E_IE7, }, + { 0x10b5, 0x9056, 0x1369, 0xbb61, 0, 0, PCI_ID_PCX924E_IE7, }, + { 0x10b5, 0x9056, 0x1369, 0xbc61, 0, 0, PCI_ID_VX222E_MIC_IE7, }, + { 0x10b5, 0x9056, 0x1369, 0xbd61, 0, 0, PCI_ID_PCX22E_IE7, }, + { 0x10b5, 0x9056, 0x1369, 0xbf61, 0, 0, PCI_ID_PCX924E_MIC_IE7, }, + { 0, } +}; + +MODULE_DEVICE_TABLE(pci, pcxhr_ids); + +struct board_parameters { + char* board_name; + short playback_chips; + short capture_chips; + short fw_file_set; + short firmware_num; +}; +static const struct board_parameters pcxhr_board_params[] = { +[PCI_ID_VX882HR] = { "VX882HR", 4, 4, 0, 41 }, +[PCI_ID_PCX882HR] = { "PCX882HR", 4, 4, 0, 41 }, +[PCI_ID_VX881HR] = { "VX881HR", 4, 4, 0, 41 }, +[PCI_ID_PCX881HR] = { "PCX881HR", 4, 4, 0, 41 }, +[PCI_ID_VX882E] = { "VX882e", 4, 4, 1, 41 }, +[PCI_ID_PCX882E] = { "PCX882e", 4, 4, 1, 41 }, +[PCI_ID_VX881E] = { "VX881e", 4, 4, 1, 41 }, +[PCI_ID_PCX881E] = { "PCX881e", 4, 4, 1, 41 }, +[PCI_ID_VX1222HR] = { "VX1222HR", 6, 1, 2, 42 }, +[PCI_ID_PCX1222HR] = { "PCX1222HR", 6, 1, 2, 42 }, +[PCI_ID_VX1221HR] = { "VX1221HR", 6, 1, 2, 42 }, +[PCI_ID_PCX1221HR] = { "PCX1221HR", 6, 1, 2, 42 }, +[PCI_ID_VX1222E] = { "VX1222e", 6, 1, 3, 42 }, +[PCI_ID_PCX1222E] = { "PCX1222e", 6, 1, 3, 42 }, +[PCI_ID_VX1221E] = { "VX1221e", 6, 1, 3, 42 }, +[PCI_ID_PCX1221E] = { "PCX1221e", 6, 1, 3, 42 }, +[PCI_ID_VX222HR] = { "VX222HR", 1, 1, 4, 44 }, +[PCI_ID_VX222E] = { "VX222e", 1, 1, 4, 44 }, +[PCI_ID_PCX22HR] = { "PCX22HR", 1, 0, 4, 44 }, +[PCI_ID_PCX22E] = { "PCX22e", 1, 0, 4, 44 }, +[PCI_ID_VX222HRMIC] = { "VX222HR-Mic", 1, 1, 5, 44 }, +[PCI_ID_VX222E_MIC] = { "VX222e-Mic", 1, 1, 5, 44 }, +[PCI_ID_PCX924HR] = { "PCX924HR", 1, 1, 5, 44 }, +[PCI_ID_PCX924E] = { "PCX924e", 1, 1, 5, 44 }, +[PCI_ID_PCX924HRMIC] = { "PCX924HR-Mic", 1, 1, 5, 44 }, +[PCI_ID_PCX924E_MIC] = { "PCX924e-Mic", 1, 1, 5, 44 }, +[PCI_ID_VX442HR] = { "VX442HR", 2, 2, 0, 41 }, +[PCI_ID_PCX442HR] = { "PCX442HR", 2, 2, 0, 41 }, +[PCI_ID_VX442E] = { "VX442e", 2, 2, 1, 41 }, +[PCI_ID_PCX442E] = { "PCX442e", 2, 2, 1, 41 }, +[PCI_ID_VX822HR] = { "VX822HR", 4, 1, 2, 42 }, +[PCI_ID_PCX822HR] = { "PCX822HR", 4, 1, 2, 42 }, +[PCI_ID_VX822E] = { "VX822e", 4, 1, 3, 42 }, +[PCI_ID_PCX822E] = { "PCX822e", 4, 1, 3, 42 }, +[PCI_ID_VX222E_IE5] = { "VX222e", 1, 1, 6, 44 }, +[PCI_ID_PCX924E_IE5] = { "PCX924e", 1, 1, 7, 44 }, +[PCI_ID_VX222E_MIC_IE5] = { "VX222e-Mic", 1, 1, 7, 44 }, +[PCI_ID_PCX22E_IE5] = { "PCX22e", 1, 0, 6, 44 }, +[PCI_ID_PCX924E_MIC_IE5] = { "PCX924e-Mic", 1, 1, 7, 44 }, +[PCI_ID_VX222E_IE7] = { "VX222e", 1, 1, 6, 44 }, +[PCI_ID_PCX924E_IE7] = { "PCX924e", 1, 1, 7, 44 }, +[PCI_ID_VX222E_MIC_IE7] = { "VX222e-Mic", 1, 1, 7, 44 }, +[PCI_ID_PCX22E_IE7] = { "PCX22e", 1, 0, 6, 44 }, +[PCI_ID_PCX924E_MIC_IE7] = { "PCX924e-Mic", 1, 1, 7, 44 }, +}; + +/* boards without hw AES1 and SRC onboard are all using fw_file_set==4 */ +/* VX222HR, VX222e, PCX22HR and PCX22e */ +#define PCXHR_BOARD_HAS_AES1(x) ((x->fw_file_set != 4) && (x->fw_file_set != 6)) +/* some boards do not support 192kHz on digital AES input plugs */ +#define PCXHR_BOARD_AESIN_NO_192K(x) ((x->capture_chips == 0) || \ + (x->fw_file_set == 0) || \ + (x->fw_file_set == 2)) + +static int pcxhr_pll_freq_register(unsigned int freq, unsigned int* pllreg, + unsigned int* realfreq) +{ + unsigned int reg; + + if (freq < 6900 || freq > 110000) + return -EINVAL; + reg = (28224000 * 2) / freq; + reg = (reg - 1) / 2; + if (reg < 0x200) + *pllreg = reg + 0x800; + else if (reg < 0x400) + *pllreg = reg & 0x1ff; + else if (reg < 0x800) { + *pllreg = ((reg >> 1) & 0x1ff) + 0x200; + reg &= ~1; + } else { + *pllreg = ((reg >> 2) & 0x1ff) + 0x400; + reg &= ~3; + } + if (realfreq) + *realfreq = (28224000 / (reg + 1)); + return 0; +} + + +#define PCXHR_FREQ_REG_MASK 0x1f +#define PCXHR_FREQ_QUARTZ_48000 0x00 +#define PCXHR_FREQ_QUARTZ_24000 0x01 +#define PCXHR_FREQ_QUARTZ_12000 0x09 +#define PCXHR_FREQ_QUARTZ_32000 0x08 +#define PCXHR_FREQ_QUARTZ_16000 0x04 +#define PCXHR_FREQ_QUARTZ_8000 0x0c +#define PCXHR_FREQ_QUARTZ_44100 0x02 +#define PCXHR_FREQ_QUARTZ_22050 0x0a +#define PCXHR_FREQ_QUARTZ_11025 0x06 +#define PCXHR_FREQ_PLL 0x05 +#define PCXHR_FREQ_QUARTZ_192000 0x10 +#define PCXHR_FREQ_QUARTZ_96000 0x18 +#define PCXHR_FREQ_QUARTZ_176400 0x14 +#define PCXHR_FREQ_QUARTZ_88200 0x1c +#define PCXHR_FREQ_QUARTZ_128000 0x12 +#define PCXHR_FREQ_QUARTZ_64000 0x1a + +#define PCXHR_FREQ_WORD_CLOCK 0x0f +#define PCXHR_FREQ_SYNC_AES 0x0e +#define PCXHR_FREQ_AES_1 0x07 +#define PCXHR_FREQ_AES_2 0x0b +#define PCXHR_FREQ_AES_3 0x03 +#define PCXHR_FREQ_AES_4 0x0d + +static int pcxhr_get_clock_reg(struct pcxhr_mgr *mgr, unsigned int rate, + unsigned int *reg, unsigned int *freq) +{ + unsigned int val, realfreq, pllreg; + struct pcxhr_rmh rmh; + int err; + + realfreq = rate; + switch (mgr->use_clock_type) { + case PCXHR_CLOCK_TYPE_INTERNAL : /* clock by quartz or pll */ + switch (rate) { + case 48000 : val = PCXHR_FREQ_QUARTZ_48000; break; + case 24000 : val = PCXHR_FREQ_QUARTZ_24000; break; + case 12000 : val = PCXHR_FREQ_QUARTZ_12000; break; + case 32000 : val = PCXHR_FREQ_QUARTZ_32000; break; + case 16000 : val = PCXHR_FREQ_QUARTZ_16000; break; + case 8000 : val = PCXHR_FREQ_QUARTZ_8000; break; + case 44100 : val = PCXHR_FREQ_QUARTZ_44100; break; + case 22050 : val = PCXHR_FREQ_QUARTZ_22050; break; + case 11025 : val = PCXHR_FREQ_QUARTZ_11025; break; + case 192000 : val = PCXHR_FREQ_QUARTZ_192000; break; + case 96000 : val = PCXHR_FREQ_QUARTZ_96000; break; + case 176400 : val = PCXHR_FREQ_QUARTZ_176400; break; + case 88200 : val = PCXHR_FREQ_QUARTZ_88200; break; + case 128000 : val = PCXHR_FREQ_QUARTZ_128000; break; + case 64000 : val = PCXHR_FREQ_QUARTZ_64000; break; + default : + val = PCXHR_FREQ_PLL; + /* get the value for the pll register */ + err = pcxhr_pll_freq_register(rate, &pllreg, &realfreq); + if (err) + return err; + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd[0] |= IO_NUM_REG_GENCLK; + rmh.cmd[1] = pllreg & MASK_DSP_WORD; + rmh.cmd[2] = pllreg >> 24; + rmh.cmd_len = 3; + err = pcxhr_send_msg(mgr, &rmh); + if (err < 0) { + dev_err(&mgr->pci->dev, + "error CMD_ACCESS_IO_WRITE " + "for PLL register : %x!\n", err); + return err; + } + } + break; + case PCXHR_CLOCK_TYPE_WORD_CLOCK: + val = PCXHR_FREQ_WORD_CLOCK; + break; + case PCXHR_CLOCK_TYPE_AES_SYNC: + val = PCXHR_FREQ_SYNC_AES; + break; + case PCXHR_CLOCK_TYPE_AES_1: + val = PCXHR_FREQ_AES_1; + break; + case PCXHR_CLOCK_TYPE_AES_2: + val = PCXHR_FREQ_AES_2; + break; + case PCXHR_CLOCK_TYPE_AES_3: + val = PCXHR_FREQ_AES_3; + break; + case PCXHR_CLOCK_TYPE_AES_4: + val = PCXHR_FREQ_AES_4; + break; + default: + return -EINVAL; + } + *reg = val; + *freq = realfreq; + return 0; +} + + +static int pcxhr_sub_set_clock(struct pcxhr_mgr *mgr, + unsigned int rate, + int *changed) +{ + unsigned int val, realfreq, speed; + struct pcxhr_rmh rmh; + int err; + + err = pcxhr_get_clock_reg(mgr, rate, &val, &realfreq); + if (err) + return err; + + /* codec speed modes */ + if (rate < 55000) + speed = 0; /* single speed */ + else if (rate < 100000) + speed = 1; /* dual speed */ + else + speed = 2; /* quad speed */ + if (mgr->codec_speed != speed) { + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* mute outputs */ + rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; + if (DSP_EXT_CMD_SET(mgr)) { + rmh.cmd[1] = 1; + rmh.cmd_len = 2; + } + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); /* set speed ratio */ + rmh.cmd[0] |= IO_NUM_SPEED_RATIO; + rmh.cmd[1] = speed; + rmh.cmd_len = 2; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + } + /* set the new frequency */ + dev_dbg(&mgr->pci->dev, "clock register : set %x\n", val); + err = pcxhr_write_io_num_reg_cont(mgr, PCXHR_FREQ_REG_MASK, + val, changed); + if (err) + return err; + + mgr->sample_rate_real = realfreq; + mgr->cur_clock_type = mgr->use_clock_type; + + /* unmute after codec speed modes */ + if (mgr->codec_speed != speed) { + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); /* unmute outputs */ + rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; + if (DSP_EXT_CMD_SET(mgr)) { + rmh.cmd[1] = 1; + rmh.cmd_len = 2; + } + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + mgr->codec_speed = speed; /* save new codec speed */ + } + + dev_dbg(&mgr->pci->dev, "%s to %dHz (realfreq=%d)\n", __func__, + rate, realfreq); + return 0; +} + +#define PCXHR_MODIFY_CLOCK_S_BIT 0x04 + +#define PCXHR_IRQ_TIMER_FREQ 92000 +#define PCXHR_IRQ_TIMER_PERIOD 48 + +int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate) +{ + struct pcxhr_rmh rmh; + int err, changed; + + if (rate == 0) + return 0; /* nothing to do */ + + if (mgr->is_hr_stereo) + err = hr222_sub_set_clock(mgr, rate, &changed); + else + err = pcxhr_sub_set_clock(mgr, rate, &changed); + + if (err) + return err; + + if (changed) { + pcxhr_init_rmh(&rmh, CMD_MODIFY_CLOCK); + rmh.cmd[0] |= PCXHR_MODIFY_CLOCK_S_BIT; /* resync fifos */ + if (rate < PCXHR_IRQ_TIMER_FREQ) + rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD; + else + rmh.cmd[1] = PCXHR_IRQ_TIMER_PERIOD * 2; + rmh.cmd[2] = rate; + rmh.cmd_len = 3; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + } + return 0; +} + + +static int pcxhr_sub_get_external_clock(struct pcxhr_mgr *mgr, + enum pcxhr_clock_type clock_type, + int *sample_rate) +{ + struct pcxhr_rmh rmh; + unsigned char reg; + int err, rate; + + switch (clock_type) { + case PCXHR_CLOCK_TYPE_WORD_CLOCK: + reg = REG_STATUS_WORD_CLOCK; + break; + case PCXHR_CLOCK_TYPE_AES_SYNC: + reg = REG_STATUS_AES_SYNC; + break; + case PCXHR_CLOCK_TYPE_AES_1: + reg = REG_STATUS_AES_1; + break; + case PCXHR_CLOCK_TYPE_AES_2: + reg = REG_STATUS_AES_2; + break; + case PCXHR_CLOCK_TYPE_AES_3: + reg = REG_STATUS_AES_3; + break; + case PCXHR_CLOCK_TYPE_AES_4: + reg = REG_STATUS_AES_4; + break; + default: + return -EINVAL; + } + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); + rmh.cmd_len = 2; + rmh.cmd[0] |= IO_NUM_REG_STATUS; + if (mgr->last_reg_stat != reg) { + rmh.cmd[1] = reg; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + udelay(100); /* wait minimum 2 sample_frames at 32kHz ! */ + mgr->last_reg_stat = reg; + } + rmh.cmd[1] = REG_STATUS_CURRENT; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + switch (rmh.stat[1] & 0x0f) { + case REG_STATUS_SYNC_32000 : rate = 32000; break; + case REG_STATUS_SYNC_44100 : rate = 44100; break; + case REG_STATUS_SYNC_48000 : rate = 48000; break; + case REG_STATUS_SYNC_64000 : rate = 64000; break; + case REG_STATUS_SYNC_88200 : rate = 88200; break; + case REG_STATUS_SYNC_96000 : rate = 96000; break; + case REG_STATUS_SYNC_128000 : rate = 128000; break; + case REG_STATUS_SYNC_176400 : rate = 176400; break; + case REG_STATUS_SYNC_192000 : rate = 192000; break; + default: rate = 0; + } + dev_dbg(&mgr->pci->dev, "External clock is at %d Hz\n", rate); + *sample_rate = rate; + return 0; +} + + +int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, + enum pcxhr_clock_type clock_type, + int *sample_rate) +{ + if (mgr->is_hr_stereo) + return hr222_get_external_clock(mgr, clock_type, + sample_rate); + else + return pcxhr_sub_get_external_clock(mgr, clock_type, + sample_rate); +} + +/* + * start or stop playback/capture substream + */ +static int pcxhr_set_stream_state(struct snd_pcxhr *chip, + struct pcxhr_stream *stream) +{ + int err; + struct pcxhr_rmh rmh; + int stream_mask, start; + + if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) + start = 1; + else { + if (stream->status != PCXHR_STREAM_STATUS_SCHEDULE_STOP) { + dev_err(chip->card->dev, + "%s CANNOT be stopped\n", __func__); + return -EINVAL; + } + start = 0; + } + if (!stream->substream) + return -EINVAL; + + stream->timer_abs_periods = 0; + stream->timer_period_frag = 0; /* reset theoretical stream pos */ + stream->timer_buf_periods = 0; + stream->timer_is_synced = 0; + + stream_mask = + stream->pipe->is_capture ? 1 : 1<substream->number; + + pcxhr_init_rmh(&rmh, start ? CMD_START_STREAM : CMD_STOP_STREAM); + pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, + stream->pipe->first_audio, 0, stream_mask); + + chip = snd_pcm_substream_chip(stream->substream); + + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + dev_err(chip->card->dev, + "ERROR %s err=%x;\n", __func__, err); + stream->status = + start ? PCXHR_STREAM_STATUS_STARTED : PCXHR_STREAM_STATUS_STOPPED; + return err; +} + +#define HEADER_FMT_BASE_LIN 0xfed00000 +#define HEADER_FMT_BASE_FLOAT 0xfad00000 +#define HEADER_FMT_INTEL 0x00008000 +#define HEADER_FMT_24BITS 0x00004000 +#define HEADER_FMT_16BITS 0x00002000 +#define HEADER_FMT_UPTO11 0x00000200 +#define HEADER_FMT_UPTO32 0x00000100 +#define HEADER_FMT_MONO 0x00000080 + +static int pcxhr_set_format(struct pcxhr_stream *stream) +{ + int err, is_capture, sample_rate, stream_num; + struct snd_pcxhr *chip; + struct pcxhr_rmh rmh; + unsigned int header; + + chip = snd_pcm_substream_chip(stream->substream); + switch (stream->format) { + case SNDRV_PCM_FORMAT_U8: + header = HEADER_FMT_BASE_LIN; + break; + case SNDRV_PCM_FORMAT_S16_LE: + header = HEADER_FMT_BASE_LIN | + HEADER_FMT_16BITS | HEADER_FMT_INTEL; + break; + case SNDRV_PCM_FORMAT_S16_BE: + header = HEADER_FMT_BASE_LIN | HEADER_FMT_16BITS; + break; + case SNDRV_PCM_FORMAT_S24_3LE: + header = HEADER_FMT_BASE_LIN | + HEADER_FMT_24BITS | HEADER_FMT_INTEL; + break; + case SNDRV_PCM_FORMAT_S24_3BE: + header = HEADER_FMT_BASE_LIN | HEADER_FMT_24BITS; + break; + case SNDRV_PCM_FORMAT_FLOAT_LE: + header = HEADER_FMT_BASE_FLOAT | HEADER_FMT_INTEL; + break; + default: + dev_err(chip->card->dev, + "error %s() : unknown format\n", __func__); + return -EINVAL; + } + + sample_rate = chip->mgr->sample_rate; + if (sample_rate <= 32000 && sample_rate !=0) { + if (sample_rate <= 11025) + header |= HEADER_FMT_UPTO11; + else + header |= HEADER_FMT_UPTO32; + } + if (stream->channels == 1) + header |= HEADER_FMT_MONO; + + is_capture = stream->pipe->is_capture; + stream_num = is_capture ? 0 : stream->substream->number; + + pcxhr_init_rmh(&rmh, is_capture ? + CMD_FORMAT_STREAM_IN : CMD_FORMAT_STREAM_OUT); + pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, + stream_num, 0); + if (is_capture) { + /* bug with old dsp versions: */ + /* bit 12 also sets the format of the playback stream */ + if (DSP_EXT_CMD_SET(chip->mgr)) + rmh.cmd[0] |= 1<<10; + else + rmh.cmd[0] |= 1<<12; + } + rmh.cmd[1] = 0; + rmh.cmd_len = 2; + if (DSP_EXT_CMD_SET(chip->mgr)) { + /* add channels and set bit 19 if channels>2 */ + rmh.cmd[1] = stream->channels; + if (!is_capture) { + /* playback : add channel mask to command */ + rmh.cmd[2] = (stream->channels == 1) ? 0x01 : 0x03; + rmh.cmd_len = 3; + } + } + rmh.cmd[rmh.cmd_len++] = header >> 8; + rmh.cmd[rmh.cmd_len++] = (header & 0xff) << 16; + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + dev_err(chip->card->dev, + "ERROR %s err=%x;\n", __func__, err); + return err; +} + +static int pcxhr_update_r_buffer(struct pcxhr_stream *stream) +{ + int err, is_capture, stream_num; + struct pcxhr_rmh rmh; + struct snd_pcm_substream *subs = stream->substream; + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + + is_capture = (subs->stream == SNDRV_PCM_STREAM_CAPTURE); + stream_num = is_capture ? 0 : subs->number; + + dev_dbg(chip->card->dev, + "%s(pcm%c%d) : addr(%p) bytes(%zx) subs(%d)\n", __func__, + is_capture ? 'c' : 'p', + chip->chip_idx, (void *)(long)subs->runtime->dma_addr, + subs->runtime->dma_bytes, subs->number); + + pcxhr_init_rmh(&rmh, CMD_UPDATE_R_BUFFERS); + pcxhr_set_pipe_cmd_params(&rmh, is_capture, stream->pipe->first_audio, + stream_num, 0); + + /* max buffer size is 2 MByte */ + snd_BUG_ON(subs->runtime->dma_bytes >= 0x200000); + /* size in bits */ + rmh.cmd[1] = subs->runtime->dma_bytes * 8; + /* most significant byte */ + rmh.cmd[2] = subs->runtime->dma_addr >> 24; + /* this is a circular buffer */ + rmh.cmd[2] |= 1<<19; + /* least 3 significant bytes */ + rmh.cmd[3] = subs->runtime->dma_addr & MASK_DSP_WORD; + rmh.cmd_len = 4; + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + dev_err(chip->card->dev, + "ERROR CMD_UPDATE_R_BUFFERS err=%x;\n", err); + return err; +} + + +#if 0 +static int pcxhr_pipe_sample_count(struct pcxhr_stream *stream, + snd_pcm_uframes_t *sample_count) +{ + struct pcxhr_rmh rmh; + int err; + pcxhr_t *chip = snd_pcm_substream_chip(stream->substream); + pcxhr_init_rmh(&rmh, CMD_PIPE_SAMPLE_COUNT); + pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, 0, 0, + 1<pipe->first_audio); + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err == 0) { + *sample_count = ((snd_pcm_uframes_t)rmh.stat[0]) << 24; + *sample_count += (snd_pcm_uframes_t)rmh.stat[1]; + } + dev_dbg(chip->card->dev, "PIPE_SAMPLE_COUNT = %lx\n", *sample_count); + return err; +} +#endif + +static inline int pcxhr_stream_scheduled_get_pipe(struct pcxhr_stream *stream, + struct pcxhr_pipe **pipe) +{ + if (stream->status == PCXHR_STREAM_STATUS_SCHEDULE_RUN) { + *pipe = stream->pipe; + return 1; + } + return 0; +} + +static void pcxhr_start_linked_stream(struct pcxhr_mgr *mgr) +{ + int i, j, err; + struct pcxhr_pipe *pipe; + struct snd_pcxhr *chip; + int capture_mask = 0; + int playback_mask = 0; + +#ifdef CONFIG_SND_DEBUG_VERBOSE + ktime_t start_time, stop_time, diff_time; + + start_time = ktime_get(); +#endif + mutex_lock(&mgr->setup_mutex); + + /* check the pipes concerned and build pipe_array */ + for (i = 0; i < mgr->num_cards; i++) { + chip = mgr->chip[i]; + for (j = 0; j < chip->nb_streams_capt; j++) { + if (pcxhr_stream_scheduled_get_pipe(&chip->capture_stream[j], &pipe)) + capture_mask |= (1 << pipe->first_audio); + } + for (j = 0; j < chip->nb_streams_play; j++) { + if (pcxhr_stream_scheduled_get_pipe(&chip->playback_stream[j], &pipe)) { + playback_mask |= (1 << pipe->first_audio); + break; /* add only once, as all playback + * streams of one chip use the same pipe + */ + } + } + } + if (capture_mask == 0 && playback_mask == 0) { + mutex_unlock(&mgr->setup_mutex); + dev_err(&mgr->pci->dev, "%s : no pipes\n", __func__); + return; + } + + dev_dbg(&mgr->pci->dev, "%s : playback_mask=%x capture_mask=%x\n", + __func__, playback_mask, capture_mask); + + /* synchronous stop of all the pipes concerned */ + err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); + if (err) { + mutex_unlock(&mgr->setup_mutex); + dev_err(&mgr->pci->dev, "%s : " + "error stop pipes (P%x C%x)\n", + __func__, playback_mask, capture_mask); + return; + } + + /* the dsp lost format and buffer info with the stop pipe */ + for (i = 0; i < mgr->num_cards; i++) { + struct pcxhr_stream *stream; + chip = mgr->chip[i]; + for (j = 0; j < chip->nb_streams_capt; j++) { + stream = &chip->capture_stream[j]; + if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { + err = pcxhr_set_format(stream); + err = pcxhr_update_r_buffer(stream); + } + } + for (j = 0; j < chip->nb_streams_play; j++) { + stream = &chip->playback_stream[j]; + if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) { + err = pcxhr_set_format(stream); + err = pcxhr_update_r_buffer(stream); + } + } + } + /* start all the streams */ + for (i = 0; i < mgr->num_cards; i++) { + struct pcxhr_stream *stream; + chip = mgr->chip[i]; + for (j = 0; j < chip->nb_streams_capt; j++) { + stream = &chip->capture_stream[j]; + if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) + err = pcxhr_set_stream_state(chip, stream); + } + for (j = 0; j < chip->nb_streams_play; j++) { + stream = &chip->playback_stream[j]; + if (pcxhr_stream_scheduled_get_pipe(stream, &pipe)) + err = pcxhr_set_stream_state(chip, stream); + } + } + + /* synchronous start of all the pipes concerned */ + err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); + if (err) { + mutex_unlock(&mgr->setup_mutex); + dev_err(&mgr->pci->dev, "%s : " + "error start pipes (P%x C%x)\n", + __func__, playback_mask, capture_mask); + return; + } + + /* put the streams into the running state now + * (increment pointer by interrupt) + */ + mutex_lock(&mgr->lock); + for ( i =0; i < mgr->num_cards; i++) { + struct pcxhr_stream *stream; + chip = mgr->chip[i]; + for(j = 0; j < chip->nb_streams_capt; j++) { + stream = &chip->capture_stream[j]; + if(stream->status == PCXHR_STREAM_STATUS_STARTED) + stream->status = PCXHR_STREAM_STATUS_RUNNING; + } + for (j = 0; j < chip->nb_streams_play; j++) { + stream = &chip->playback_stream[j]; + if (stream->status == PCXHR_STREAM_STATUS_STARTED) { + /* playback will already have advanced ! */ + stream->timer_period_frag += mgr->granularity; + stream->status = PCXHR_STREAM_STATUS_RUNNING; + } + } + } + mutex_unlock(&mgr->lock); + + mutex_unlock(&mgr->setup_mutex); + +#ifdef CONFIG_SND_DEBUG_VERBOSE + stop_time = ktime_get(); + diff_time = ktime_sub(stop_time, start_time); + dev_dbg(&mgr->pci->dev, "***TRIGGER START*** TIME = %ld (err = %x)\n", + (long)(ktime_to_ns(diff_time)), err); +#endif +} + + +/* + * trigger callback + */ +static int pcxhr_trigger(struct snd_pcm_substream *subs, int cmd) +{ + struct pcxhr_stream *stream; + struct snd_pcm_substream *s; + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + + switch (cmd) { + case SNDRV_PCM_TRIGGER_START: + dev_dbg(chip->card->dev, "SNDRV_PCM_TRIGGER_START\n"); + if (snd_pcm_stream_linked(subs)) { + snd_pcm_group_for_each_entry(s, subs) { + if (snd_pcm_substream_chip(s) != chip) + continue; + stream = s->runtime->private_data; + stream->status = + PCXHR_STREAM_STATUS_SCHEDULE_RUN; + snd_pcm_trigger_done(s, subs); + } + pcxhr_start_linked_stream(chip->mgr); + } else { + stream = subs->runtime->private_data; + dev_dbg(chip->card->dev, "Only one Substream %c %d\n", + stream->pipe->is_capture ? 'C' : 'P', + stream->pipe->first_audio); + if (pcxhr_set_format(stream)) + return -EINVAL; + if (pcxhr_update_r_buffer(stream)) + return -EINVAL; + + stream->status = PCXHR_STREAM_STATUS_SCHEDULE_RUN; + if (pcxhr_set_stream_state(chip, stream)) + return -EINVAL; + stream->status = PCXHR_STREAM_STATUS_RUNNING; + } + break; + case SNDRV_PCM_TRIGGER_STOP: + dev_dbg(chip->card->dev, "SNDRV_PCM_TRIGGER_STOP\n"); + snd_pcm_group_for_each_entry(s, subs) { + stream = s->runtime->private_data; + stream->status = PCXHR_STREAM_STATUS_SCHEDULE_STOP; + if (pcxhr_set_stream_state(chip, stream)) + return -EINVAL; + snd_pcm_trigger_done(s, subs); + } + break; + case SNDRV_PCM_TRIGGER_PAUSE_PUSH: + case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: + /* TODO */ + default: + return -EINVAL; + } + return 0; +} + + +static int pcxhr_hardware_timer(struct pcxhr_mgr *mgr, int start, unsigned int rate) +{ + struct pcxhr_rmh rmh; + int err; + //unsigned int regDoorbell, regIrq; + //printk(KERN_ERR "%s start %d\n", __func__, start); + pcxhr_init_rmh(&rmh, CMD_SET_TIMER_INTERRUPT); + if (start) { + /* last dsp time invalid */ + mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; + rmh.cmd[0] |= mgr->granularity; + } + err = pcxhr_send_msg(mgr, &rmh); + if (err < 0) + dev_err(&mgr->pci->dev, "error %s err(%x)\n", __func__, + err); + + pcxhr_hr_timer_trig(mgr, start, rate); + + return err; +} + +/* + * prepare callback for all pcms + */ +static int pcxhr_prepare(struct snd_pcm_substream *subs) +{ + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + struct pcxhr_mgr *mgr = chip->mgr; + int err = 0; + + dev_dbg(chip->card->dev, + "%s : period_size(%lx) periods(%x) buffer_size(%lx)\n", __func__, + subs->runtime->period_size, subs->runtime->periods, + subs->runtime->buffer_size); + + mutex_lock(&mgr->setup_mutex); + + do { + /* only the first stream can choose the sample rate */ + /* set the clock only once (first stream) */ + if (mgr->sample_rate != subs->runtime->rate) { + err = pcxhr_set_clock(mgr, subs->runtime->rate); + if (err) + break; + if (mgr->sample_rate == 0) + /* start the DSP-timer */ + err = pcxhr_hardware_timer(mgr, 1, subs->runtime->rate); + mgr->sample_rate = subs->runtime->rate; + } + } while(0); /* do only once (so we can use break instead of goto) */ + + mutex_unlock(&mgr->setup_mutex); + + return err; +} + + +/* + * HW_PARAMS callback for all pcms + */ +static int pcxhr_hw_params(struct snd_pcm_substream *subs, + struct snd_pcm_hw_params *hw) +{ + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + struct pcxhr_mgr *mgr = chip->mgr; + struct pcxhr_stream *stream = subs->runtime->private_data; + + mutex_lock(&mgr->setup_mutex); + + /* set up channels */ + stream->channels = params_channels(hw); + /* set up format for the stream */ + stream->format = params_format(hw); + + mutex_unlock(&mgr->setup_mutex); + + return 0; +} + + +/* + * CONFIGURATION SPACE for all pcms, mono pcm must update channels_max + */ +static const struct snd_pcm_hardware pcxhr_caps = +{ + .info = (SNDRV_PCM_INFO_MMAP | + SNDRV_PCM_INFO_INTERLEAVED | + SNDRV_PCM_INFO_MMAP_VALID | + SNDRV_PCM_INFO_SYNC_START), + .formats = (SNDRV_PCM_FMTBIT_U8 | + SNDRV_PCM_FMTBIT_S16_LE | + SNDRV_PCM_FMTBIT_S16_BE | + SNDRV_PCM_FMTBIT_S24_3LE | + SNDRV_PCM_FMTBIT_S24_3BE | + SNDRV_PCM_FMTBIT_FLOAT_LE), + .rates = (SNDRV_PCM_RATE_CONTINUOUS | + SNDRV_PCM_RATE_8000_192000), + .rate_min = 8000, + .rate_max = 192000, + .channels_min = 1, + .channels_max = 2, + .buffer_bytes_max = (32*1024), + /* 1 byte == 1 frame U8 mono (PCXHR_GRANULARITY is frames!) */ + .period_bytes_min = (2*PCXHR_GRANULARITY), + .period_bytes_max = (16*1024), + .periods_min = 2, + .periods_max = (32*1024/PCXHR_GRANULARITY), +}; + + +static int pcxhr_open(struct snd_pcm_substream *subs) +{ + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + struct pcxhr_mgr *mgr = chip->mgr; + struct snd_pcm_runtime *runtime = subs->runtime; + struct pcxhr_stream *stream; + int err; + + mutex_lock(&mgr->setup_mutex); + + /* copy the struct snd_pcm_hardware struct */ + runtime->hw = pcxhr_caps; + + if( subs->stream == SNDRV_PCM_STREAM_PLAYBACK ) { + dev_dbg(chip->card->dev, "%s playback chip%d subs%d\n", + __func__, chip->chip_idx, subs->number); + stream = &chip->playback_stream[subs->number]; + } else { + dev_dbg(chip->card->dev, "%s capture chip%d subs%d\n", + __func__, chip->chip_idx, subs->number); + if (mgr->mono_capture) + runtime->hw.channels_max = 1; + else + runtime->hw.channels_min = 2; + stream = &chip->capture_stream[subs->number]; + } + if (stream->status != PCXHR_STREAM_STATUS_FREE){ + /* streams in use */ + dev_err(chip->card->dev, "%s chip%d subs%d in use\n", + __func__, chip->chip_idx, subs->number); + mutex_unlock(&mgr->setup_mutex); + return -EBUSY; + } + + /* float format support is in some cases buggy on stereo cards */ + if (mgr->is_hr_stereo) + runtime->hw.formats &= ~SNDRV_PCM_FMTBIT_FLOAT_LE; + + /* buffer-size should better be multiple of period-size */ + err = snd_pcm_hw_constraint_integer(runtime, + SNDRV_PCM_HW_PARAM_PERIODS); + if (err < 0) { + mutex_unlock(&mgr->setup_mutex); + return err; + } + + /* if a sample rate is already used or fixed by external clock, + * the stream cannot change + */ + if (mgr->sample_rate) + runtime->hw.rate_min = runtime->hw.rate_max = mgr->sample_rate; + else { + if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) { + int external_rate; + if (pcxhr_get_external_clock(mgr, mgr->use_clock_type, + &external_rate) || + external_rate == 0) { + /* cannot detect the external clock rate */ + mutex_unlock(&mgr->setup_mutex); + return -EBUSY; + } + runtime->hw.rate_min = external_rate; + runtime->hw.rate_max = external_rate; + } + } + + stream->status = PCXHR_STREAM_STATUS_OPEN; + stream->substream = subs; + stream->channels = 0; /* not configured yet */ + + runtime->private_data = stream; + + /* better get a divisor of granularity values (96 or 192) */ + snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 32); + snd_pcm_hw_constraint_step(runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 32); + snd_pcm_set_sync(subs); + + mgr->ref_count_rate++; + + mutex_unlock(&mgr->setup_mutex); + return 0; +} + + +static int pcxhr_close(struct snd_pcm_substream *subs) +{ + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + struct pcxhr_mgr *mgr = chip->mgr; + struct pcxhr_stream *stream = subs->runtime->private_data; + + mutex_lock(&mgr->setup_mutex); + + dev_dbg(chip->card->dev, "%s chip%d subs%d\n", __func__, + chip->chip_idx, subs->number); + + /* sample rate released */ + if (--mgr->ref_count_rate == 0) { + mgr->sample_rate = 0; /* the sample rate is no more locked */ + pcxhr_hardware_timer(mgr, 0, 0); /* stop the DSP-timer */ + } + + stream->status = PCXHR_STREAM_STATUS_FREE; + stream->substream = NULL; + + mutex_unlock(&mgr->setup_mutex); + + return 0; +} + + +static snd_pcm_uframes_t pcxhr_stream_pointer(struct snd_pcm_substream *subs) +{ + u_int32_t timer_period_frag; + int timer_buf_periods; + struct snd_pcxhr *chip = snd_pcm_substream_chip(subs); + struct snd_pcm_runtime *runtime = subs->runtime; + struct pcxhr_stream *stream = runtime->private_data; + + mutex_lock(&chip->mgr->lock); + + /* get the period fragment and the nb of periods in the buffer */ + timer_period_frag = stream->timer_period_frag; + timer_buf_periods = stream->timer_buf_periods; + + mutex_unlock(&chip->mgr->lock); + + return (snd_pcm_uframes_t)((timer_buf_periods * runtime->period_size) + + timer_period_frag); +} + + +static const struct snd_pcm_ops pcxhr_ops = { + .open = pcxhr_open, + .close = pcxhr_close, + .prepare = pcxhr_prepare, + .hw_params = pcxhr_hw_params, + .trigger = pcxhr_trigger, + .pointer = pcxhr_stream_pointer, +}; + +/* + */ +int pcxhr_create_pcm(struct snd_pcxhr *chip) +{ + int err; + struct snd_pcm *pcm; + char name[32]; + + snprintf(name, sizeof(name), "pcxhr %d", chip->chip_idx); + err = snd_pcm_new(chip->card, name, 0, + chip->nb_streams_play, + chip->nb_streams_capt, &pcm); + if (err < 0) { + dev_err(chip->card->dev, "cannot create pcm %s\n", name); + return err; + } + pcm->private_data = chip; + + if (chip->nb_streams_play) + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &pcxhr_ops); + if (chip->nb_streams_capt) + snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &pcxhr_ops); + + pcm->info_flags = 0; + pcm->nonatomic = true; + strcpy(pcm->name, name); + + snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, + &chip->mgr->pci->dev, + 32*1024, 32*1024); + chip->pcm = pcm; + return 0; +} + +static int pcxhr_chip_free(struct snd_pcxhr *chip) +{ + kfree(chip); + return 0; +} + +static int pcxhr_chip_dev_free(struct snd_device *device) +{ + struct snd_pcxhr *chip = device->device_data; + return pcxhr_chip_free(chip); +} + + +/* + */ +static int pcxhr_create(struct pcxhr_mgr *mgr, + struct snd_card *card, int idx) +{ + int err; + struct snd_pcxhr *chip; + static const struct snd_device_ops ops = { + .dev_free = pcxhr_chip_dev_free, + }; + + chip = kzalloc(sizeof(*chip), GFP_KERNEL); + if (!chip) + return -ENOMEM; + + chip->card = card; + chip->chip_idx = idx; + chip->mgr = mgr; + card->sync_irq = mgr->irq; + + if (idx < mgr->playback_chips) + /* stereo or mono streams */ + chip->nb_streams_play = PCXHR_PLAYBACK_STREAMS; + + if (idx < mgr->capture_chips) { + if (mgr->mono_capture) + chip->nb_streams_capt = 2; /* 2 mono streams */ + else + chip->nb_streams_capt = 1; /* or 1 stereo stream */ + } + + err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); + if (err < 0) { + pcxhr_chip_free(chip); + return err; + } + + mgr->chip[idx] = chip; + + return 0; +} + +/* proc interface */ +static void pcxhr_proc_info(struct snd_info_entry *entry, + struct snd_info_buffer *buffer) +{ + struct snd_pcxhr *chip = entry->private_data; + struct pcxhr_mgr *mgr = chip->mgr; + int i = 0; + + snd_iprintf(buffer, "\n%s\n", mgr->name); + + /* stats available when embedded DSP is running */ + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { + struct pcxhr_rmh rmh; + short ver_maj = (mgr->dsp_version >> 16) & 0xff; + short ver_min = (mgr->dsp_version >> 8) & 0xff; + short ver_build = mgr->dsp_version & 0xff; + snd_iprintf(buffer, "module version %s\n", + PCXHR_DRIVER_VERSION_STRING); + snd_iprintf(buffer, "dsp version %d.%d.%d\n", + ver_maj, ver_min, ver_build); + if (mgr->board_has_analog) + snd_iprintf(buffer, "analog io available\n"); + else + snd_iprintf(buffer, "digital only board\n"); + + /* calc cpu load of the dsp */ + pcxhr_init_rmh(&rmh, CMD_GET_DSP_RESOURCES); + if( ! pcxhr_send_msg(mgr, &rmh) ) { + int cur = rmh.stat[0]; + int ref = rmh.stat[1]; + if (ref > 0) { + if (mgr->sample_rate_real != 0 && + mgr->sample_rate_real != 48000) { + ref = (ref * 48000) / + mgr->sample_rate_real; + if (mgr->sample_rate_real >= + PCXHR_IRQ_TIMER_FREQ) + ref *= 2; + } + cur = 100 - (100 * cur) / ref; + snd_iprintf(buffer, "cpu load %d%%\n", cur); + snd_iprintf(buffer, "buffer pool %d/%d\n", + rmh.stat[2], rmh.stat[3]); + } + } + snd_iprintf(buffer, "dma granularity : %d\n", + mgr->granularity); + snd_iprintf(buffer, "dsp time errors : %d\n", + mgr->dsp_time_err); + snd_iprintf(buffer, "hrtimer calls : %d\n", + mgr->hr_timer_calls); + snd_iprintf(buffer, "dsp async pipe xrun errors : %d\n", + mgr->async_err_pipe_xrun); + snd_iprintf(buffer, "dsp async stream xrun errors : %d\n", + mgr->async_err_stream_xrun); + snd_iprintf(buffer, "dsp async last other error : %x\n", + mgr->async_err_other_last); + + + + snd_iprintf(buffer, "IRQ ctrl : 0x%08x\n", + inl(mgr->port[1] + 0x68)); + snd_iprintf(buffer, "doorbell : 0x%08x\n", + inl(mgr->port[1] + 0x64)); + + snd_iprintf(buffer, "User IO CONTROL : 0x%08x\n", + inl(mgr->port[1] + 0x6c)); + + + snd_iprintf(buffer, "@port 0 : 0x%lx\n", + mgr->port[0]); + +// snd_iprintf(buffer, "port 0 : 0x%08x:0x%08x:0x%08x:0x%08x\n", +// inl(mgr->port[0] + 0x0), +// inl(mgr->port[0] + 0x4), +// inl(mgr->port[0] + 0x8), +// inl(mgr->port[0] + 0xc)); + + snd_iprintf(buffer, "@port 1 : 0x%lx\n", + mgr->port[1]); + + snd_iprintf(buffer, "@port 2 : 0x%lx\n", + mgr->port[2]); + + + + for(i = 0; i < 0x100; i+=4 ){ + snd_iprintf(buffer, "[0x%x(%i)]0x%08x\n",i,i, + inl(mgr->port[1] + i)); + } + + + + + + snd_iprintf(buffer, "dbg interrupts : \n\tall %d\n\tnone : %d\n\tfalse_none %d\n\thandled %d\n\tdummy %d\n\tirq %d\n\tasync %d\n\tincr %d\n\tloop %d\n", + mgr->dbg_cpt.interrupts_all, mgr->dbg_cpt.interrupts_none, mgr->dbg_cpt.interrupts_false_irq_none,mgr->dbg_cpt.interrupts_handled, mgr->dbg_cpt.interrupts_dummy, mgr->dbg_cpt.interrupts_irq, mgr->dbg_cpt.interrupts_async, mgr->dbg_cpt.interrupts_incr, mgr->dbg_cpt.interrupts_loop); + + + /* debug zone dsp */ + rmh.cmd[0] = 0x4200 + PCXHR_SIZE_MAX_STATUS; + rmh.cmd_len = 1; + rmh.stat_len = PCXHR_SIZE_MAX_STATUS; + rmh.dsp_stat = 0; + rmh.cmd_idx = CMD_LAST_INDEX; + if( ! pcxhr_send_msg(mgr, &rmh) ) { + int i; + if (rmh.stat_len > 8) + rmh.stat_len = 8; + for (i = 0; i < rmh.stat_len; i++) + snd_iprintf(buffer, "debug[%02d] = %06x\n", + i, rmh.stat[i]); + } + } else + snd_iprintf(buffer, "no firmware loaded\n"); + snd_iprintf(buffer, "\n"); +//////////////////GPR +//{ +// unsigned int uLoop; +// unsigned int dsp_time[9]; +// struct timespec64 tv[9]; +// for ( uLoop = 0; uLoop < 10; uLoop++ ) +// { +// dsp_time[uLoop] = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; +// ktime_get_real_ts64(&tv[uLoop]); +// udelay(500); +// } +// for ( uLoop = 0; uLoop < 10; uLoop++ ) +// { + // /1000 : nsec => usec +// printk(KERN_ERR "%s [%u] dsp_time_new %u time %u\n",__func__, uLoop, dsp_time[uLoop], (unsigned int)tv[uLoop].tv_nsec/1000); +// } +//} +///////////////GPR + +} +static void pcxhr_proc_sync(struct snd_info_entry *entry, + struct snd_info_buffer *buffer) +{ + struct snd_pcxhr *chip = entry->private_data; + struct pcxhr_mgr *mgr = chip->mgr; + static const char *textsHR22[3] = { + "Internal", "AES Sync", "AES 1" + }; + static const char *textsPCXHR[7] = { + "Internal", "Word", "AES Sync", + "AES 1", "AES 2", "AES 3", "AES 4" + }; + const char **texts; + int max_clock; + if (mgr->is_hr_stereo) { + texts = textsHR22; + max_clock = HR22_CLOCK_TYPE_MAX; + } else { + texts = textsPCXHR; + max_clock = PCXHR_CLOCK_TYPE_MAX; + } + + snd_iprintf(buffer, "\n%s\n", mgr->name); + snd_iprintf(buffer, "Current Sample Clock\t: %s\n", + texts[mgr->cur_clock_type]); + snd_iprintf(buffer, "Current Sample Rate\t= %d\n", + mgr->sample_rate_real); + /* commands available when embedded DSP is running */ + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { + int i, err, sample_rate; + for (i = 1; i <= max_clock; i++) { + err = pcxhr_get_external_clock(mgr, i, &sample_rate); + if (err) + break; + snd_iprintf(buffer, "%s Clock\t\t= %d\n", + texts[i], sample_rate); + } + } else + snd_iprintf(buffer, "no firmware loaded\n"); + snd_iprintf(buffer, "\n"); +} + +static void pcxhr_proc_gpio_read(struct snd_info_entry *entry, + struct snd_info_buffer *buffer) +{ + struct snd_pcxhr *chip = entry->private_data; + struct pcxhr_mgr *mgr = chip->mgr; + /* commands available when embedded DSP is running */ + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { + /* gpio ports on stereo boards only available */ + int value = 0; + hr222_read_gpio(mgr, 1, &value); /* GPI */ + snd_iprintf(buffer, "GPI: 0x%x\n", value); + hr222_read_gpio(mgr, 0, &value); /* GP0 */ + snd_iprintf(buffer, "GPO: 0x%x\n", value); + } else + snd_iprintf(buffer, "no firmware loaded\n"); + snd_iprintf(buffer, "\n"); +} +static void pcxhr_proc_gpo_write(struct snd_info_entry *entry, + struct snd_info_buffer *buffer) +{ + struct snd_pcxhr *chip = entry->private_data; + struct pcxhr_mgr *mgr = chip->mgr; + char line[64]; + int value; + /* commands available when embedded DSP is running */ + if (!(mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX))) + return; + while (!snd_info_get_line(buffer, line, sizeof(line))) { + if (sscanf(line, "GPO: 0x%x", &value) != 1) + continue; + hr222_write_gpo(mgr, value); /* GP0 */ + } +} + +/* Access to the results of the CMD_GET_TIME_CODE RMH */ +#define TIME_CODE_VALID_MASK 0x00800000 +#define TIME_CODE_NEW_MASK 0x00400000 +#define TIME_CODE_BACK_MASK 0x00200000 +#define TIME_CODE_WAIT_MASK 0x00100000 + +/* Values for the CMD_MANAGE_SIGNAL RMH */ +#define MANAGE_SIGNAL_TIME_CODE 0x01 +#define MANAGE_SIGNAL_MIDI 0x02 + +/* linear time code read proc*/ +static void pcxhr_proc_ltc(struct snd_info_entry *entry, + struct snd_info_buffer *buffer) +{ + struct snd_pcxhr *chip = entry->private_data; + struct pcxhr_mgr *mgr = chip->mgr; + struct pcxhr_rmh rmh; + unsigned int ltcHrs, ltcMin, ltcSec, ltcFrm; + int err; + /* commands available when embedded DSP is running */ + if (!(mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX))) { + snd_iprintf(buffer, "no firmware loaded\n"); + return; + } + if (!mgr->capture_ltc) { + pcxhr_init_rmh(&rmh, CMD_MANAGE_SIGNAL); + rmh.cmd[0] |= MANAGE_SIGNAL_TIME_CODE; + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + snd_iprintf(buffer, "ltc not activated (%d)\n", err); + return; + } + if (mgr->is_hr_stereo) + hr222_manage_timecode(mgr, 1); + else + pcxhr_write_io_num_reg_cont(mgr, REG_CONT_VALSMPTE, + REG_CONT_VALSMPTE, NULL); + mgr->capture_ltc = 1; + } + pcxhr_init_rmh(&rmh, CMD_GET_TIME_CODE); + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + snd_iprintf(buffer, "ltc read error (err=%d)\n", err); + return ; + } + ltcHrs = 10*((rmh.stat[0] >> 8) & 0x3) + (rmh.stat[0] & 0xf); + ltcMin = 10*((rmh.stat[1] >> 16) & 0x7) + ((rmh.stat[1] >> 8) & 0xf); + ltcSec = 10*(rmh.stat[1] & 0x7) + ((rmh.stat[2] >> 16) & 0xf); + ltcFrm = 10*((rmh.stat[2] >> 8) & 0x3) + (rmh.stat[2] & 0xf); + + snd_iprintf(buffer, "timecode: %02u:%02u:%02u-%02u\n", + ltcHrs, ltcMin, ltcSec, ltcFrm); + snd_iprintf(buffer, "raw: 0x%04x%06x%06x\n", rmh.stat[0] & 0x00ffff, + rmh.stat[1] & 0xffffff, rmh.stat[2] & 0xffffff); + /*snd_iprintf(buffer, "dsp ref time: 0x%06x%06x\n", + rmh.stat[3] & 0xffffff, rmh.stat[4] & 0xffffff);*/ + if (!(rmh.stat[0] & TIME_CODE_VALID_MASK)) { + snd_iprintf(buffer, "warning: linear timecode not valid\n"); + } +} + +static void pcxhr_proc_init(struct snd_pcxhr *chip) +{ + snd_card_ro_proc_new(chip->card, "info", chip, pcxhr_proc_info); + snd_card_ro_proc_new(chip->card, "sync", chip, pcxhr_proc_sync); + /* gpio available on stereo sound cards only */ + if (chip->mgr->is_hr_stereo) + snd_card_rw_proc_new(chip->card, "gpio", chip, + pcxhr_proc_gpio_read, + pcxhr_proc_gpo_write); + snd_card_ro_proc_new(chip->card, "ltc", chip, pcxhr_proc_ltc); +} +/* end of proc interface */ + +/* + * release all the cards assigned to a manager instance + */ +static int pcxhr_free(struct pcxhr_mgr *mgr) +{ + unsigned int i; + + for (i = 0; i < mgr->num_cards; i++) { + if (mgr->chip[i]) + snd_card_free(mgr->chip[i]->card); + } + + /* reset board if some firmware was loaded */ + if(mgr->dsp_loaded) { + pcxhr_reset_board(mgr); + dev_dbg(&mgr->pci->dev, "reset pcxhr !\n"); + } + + pcxhr_hr_timer_kill(mgr); + + /* release irq */ + if (mgr->irq >= 0) + free_irq(mgr->irq, mgr); + + pci_release_regions(mgr->pci); + + /* free hostport purgebuffer */ + if (mgr->hostport.area) { + snd_dma_free_pages(&mgr->hostport); + mgr->hostport.area = NULL; + } + + kfree(mgr->prmh); + + pci_disable_device(mgr->pci); + kfree(mgr); + return 0; +} + +/* + * probe function - creates the card manager + */ +static int pcxhr_probe(struct pci_dev *pci, + const struct pci_device_id *pci_id) +{ + static int dev; + struct pcxhr_mgr *mgr; + unsigned int i; + int err; + size_t size; + char *card_name; + + unsigned int regDoorbell, regIrq; + + if (dev >= SNDRV_CARDS) + return -ENODEV; + if (! enable[dev]) { + dev++; + return -ENOENT; + } + + /* enable PCI device */ + err = pci_enable_device(pci); + if (err < 0) + return err; + pci_set_master(pci); + + /* check if we can restrict PCI DMA transfers to 32 bits */ + if (dma_set_mask(&pci->dev, DMA_BIT_MASK(32)) < 0) { + dev_err(&pci->dev, + "architecture does not support 32bit PCI busmaster DMA\n"); + pci_disable_device(pci); + return -ENXIO; + } + + /* alloc card manager */ + mgr = kzalloc(sizeof(*mgr), GFP_KERNEL); + if (! mgr) { + pci_disable_device(pci); + return -ENOMEM; + } + + if (snd_BUG_ON(pci_id->driver_data >= PCI_ID_LAST)) { + kfree(mgr); + pci_disable_device(pci); + return -ENODEV; + } + + //Get the board IE from the sub system id. + if (pcxhr_is_device_IE (pci->subsystem_device, PCXHR_DEVICE_IE5_ID)) + { + mgr->board_revision = PCXHR_BOARD_REVISION_5; + dev_info(&pci->dev, "%s(): probed IE5 board\n", __FUNCTION__); + } + else if (pcxhr_is_device_IE (pci->subsystem_device, PCXHR_DEVICE_IE7_ID)) + { + mgr->board_revision = PCXHR_BOARD_REVISION_7; + dev_info(&pci->dev, "%s(): probed IE7 board\n", __FUNCTION__); + } + else + { + mgr->board_revision= PCXHR_BOARD_REVISION_BEFORE_5; + dev_info(&pci->dev, "%s(): probed pre-IE5 board\n", __FUNCTION__); + } + + //Select the right registers' addresses offset + mgr->dsp_reg_offset = pcxhr_is_board_revision(mgr, PCXHR_BOARD_REVISION_BEFORE_5) ? 0 : 3; + + card_name = + pcxhr_board_params[pci_id->driver_data].board_name; + mgr->playback_chips = + pcxhr_board_params[pci_id->driver_data].playback_chips; + mgr->capture_chips = + pcxhr_board_params[pci_id->driver_data].capture_chips; + mgr->fw_file_set = + pcxhr_board_params[pci_id->driver_data].fw_file_set; + mgr->firmware_num = + pcxhr_board_params[pci_id->driver_data].firmware_num; + mgr->mono_capture = mono[dev]; + mgr->is_hr_stereo = (mgr->playback_chips == 1); + mgr->board_has_aes1 = PCXHR_BOARD_HAS_AES1(mgr); + mgr->board_aes_in_192k = !PCXHR_BOARD_AESIN_NO_192K(mgr); + + if (mgr->is_hr_stereo) + mgr->granularity = PCXHR_GRANULARITY_HR22; + else + mgr->granularity = PCXHR_GRANULARITY; + + /* resource assignment */ + err = pci_request_regions(pci, card_name); + if (err < 0) { + kfree(mgr); + pci_disable_device(pci); + return err; + } + for (i = 0; i < 3; i++) + mgr->port[i] = pci_resource_start(pci, i); + + mgr->pci = pci; + mgr->irq = -1; + + regIrq = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); + regDoorbell = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, regDoorbell); + printk(KERN_ERR "%s PCXHR_PLX_L2PCIDB 0x%x, regIrq 0x%x\n", __func__, regDoorbell, regIrq); + + regIrq = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); + regDoorbell = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, regDoorbell); + printk(KERN_ERR "%s PCXHR_PLX_L2PCIDB 0x%x, regIrq 0x%x\n", __func__, regDoorbell, regIrq); + + pcxhr_hr_timer_init(mgr); + +// msi = pci_enable_msi(pci); +// printk(KERN_ERR "%s MSI = %d\n", __func__, msi); + + + if (request_threaded_irq(pci->irq, pcxhr_interrupt, + pcxhr_threaded_irq, IRQF_SHARED, + KBUILD_MODNAME, mgr)) { + dev_err(&pci->dev, "unable to grab IRQ %d\n", pci->irq); + pcxhr_free(mgr); + return -EBUSY; + } + mgr->irq = pci->irq; + + snprintf(mgr->name, sizeof(mgr->name), + "Digigram at 0x%lx & 0x%lx, 0x%lx irq %i", + mgr->port[0], mgr->port[1], mgr->port[2], mgr->irq); + + /* ISR lock */ + mutex_init(&mgr->lock); + mutex_init(&mgr->msg_lock); + + /* init setup mutex*/ + mutex_init(&mgr->setup_mutex); + + mgr->prmh = kmalloc(sizeof(*mgr->prmh) + + sizeof(u32) * (PCXHR_SIZE_MAX_LONG_STATUS - + PCXHR_SIZE_MAX_STATUS), + GFP_KERNEL); + if (! mgr->prmh) { + pcxhr_free(mgr); + return -ENOMEM; + } + + for (i=0; i < PCXHR_MAX_CARDS; i++) { + struct snd_card *card; + char tmpid[16]; + int idx; + + if (i >= max(mgr->playback_chips, mgr->capture_chips)) + break; + mgr->num_cards++; + + if (index[dev] < 0) + idx = index[dev]; + else + idx = index[dev] + i; + + snprintf(tmpid, sizeof(tmpid), "%s-%d", + id[dev] ? id[dev] : card_name, i); + err = snd_card_new(&pci->dev, idx, tmpid, THIS_MODULE, + 0, &card); + + if (err < 0) { + dev_err(&pci->dev, "cannot allocate the card %d\n", i); + pcxhr_free(mgr); + return err; + } + + strcpy(card->driver, DRIVER_NAME); + snprintf(card->shortname, sizeof(card->shortname), + "Digigram [PCM #%d]", i); + snprintf(card->longname, sizeof(card->longname), + "%s [PCM #%d]", mgr->name, i); + + err = pcxhr_create(mgr, card, i); + if (err < 0) { + snd_card_free(card); + pcxhr_free(mgr); + return err; + } + + if (i == 0) + /* init proc interface only for chip0 */ + pcxhr_proc_init(mgr->chip[i]); + + err = snd_card_register(card); + if (err < 0) { + pcxhr_free(mgr); + return err; + } + } + + /* create hostport purgebuffer */ + size = PAGE_ALIGN(sizeof(struct pcxhr_hostport)); + if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, + size, &mgr->hostport) < 0) { + pcxhr_free(mgr); + return -ENOMEM; + } + /* init purgebuffer */ + memset(mgr->hostport.area, 0, size); + + /* create a DSP loader */ + err = pcxhr_setup_firmware(mgr); + if (err < 0) { + pcxhr_free(mgr); + return err; + } + + pci_set_drvdata(pci, mgr); + dev++; + return 0; +} + +static void pcxhr_remove(struct pci_dev *pci) +{ + pcxhr_free(pci_get_drvdata(pci)); +} + +static struct pci_driver pcxhr_driver = { + .name = KBUILD_MODNAME, + .id_table = pcxhr_ids, + .probe = pcxhr_probe, + .remove = pcxhr_remove, +}; + +module_pci_driver(pcxhr_driver); diff --git a/snd-pcxhr/src/pcxhr.h b/snd-pcxhr/src/pcxhr.h new file mode 100644 index 0000000..bd7c40d --- /dev/null +++ b/snd-pcxhr/src/pcxhr.h @@ -0,0 +1,277 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Digigram pcxhr soundcards + * + * main header file + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef __SOUND_PCXHR_H +#define __SOUND_PCXHR_H + +#include +#include +#include +#include "pcxhr_hrtimer.h" + +/* Driver version : 2.0.13 */ +#define PCXHR_DRIVER_VERSION 0x020013 +#define PCXHR_DRIVER_VERSION_STRING "2.0.13" + +/* Workaround for CentOS/RHEL */ +#ifdef RHEL_RELEASE_CODE +# define HAVE_SND_CARD_NEW (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)) +# define PREALLOCATE_PAGES_FOR_ALL_RETURNS_NO_ERR (RHEL_RELEASE_CODE >= RHEL_RELEASE_VERSION(7,5)) +#else +# define HAVE_SND_CARD_NEW (LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0)) +# define PREALLOCATE_PAGES_FOR_ALL_RETURNS_NO_ERR (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 0, 0)) +#endif + +#define PCXHR_MAX_CARDS 6 +#define PCXHR_PLAYBACK_STREAMS 4 + +#define PCXHR_GRANULARITY 96 /* min 96 and multiple of 48 */ +/* transfer granularity of pipes and the dsp time (MBOX4) */ +#define PCXHR_GRANULARITY_MIN 96 +/* TODO : granularity could be 64 or 128 */ +#define PCXHR_GRANULARITY_HR22 192 /* granularity for stereo cards */ + +struct snd_pcxhr; +struct pcxhr_mgr; + +struct pcxhr_stream; +struct pcxhr_pipe; + +enum pcxhr_clock_type { + PCXHR_CLOCK_TYPE_INTERNAL = 0, + PCXHR_CLOCK_TYPE_WORD_CLOCK, + PCXHR_CLOCK_TYPE_AES_SYNC, + PCXHR_CLOCK_TYPE_AES_1, + PCXHR_CLOCK_TYPE_AES_2, + PCXHR_CLOCK_TYPE_AES_3, + PCXHR_CLOCK_TYPE_AES_4, + PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4, + HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL, + HR22_CLOCK_TYPE_AES_SYNC, + HR22_CLOCK_TYPE_AES_1, + HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1, +}; + +enum pcxhr_board_revision_id{ + PCXHR_BOARD_REVISION_BEFORE_5 = 0, + PCXHR_BOARD_REVISION_5 = 1, + PCXHR_BOARD_REVISION_7 = 2, +}; + +struct pcxhr_dbg_cpt { + unsigned int interrupts_all; + unsigned int interrupts_none; + unsigned int interrupts_handled; + unsigned int interrupts_dummy; + unsigned int interrupts_irq; + unsigned int interrupts_async; + unsigned int interrupts_incr; + unsigned int interrupts_loop; + unsigned int interrupts_false_irq_none; +}; + +struct pcxhr_mgr { + unsigned int num_cards; + struct snd_pcxhr *chip[PCXHR_MAX_CARDS]; + + struct pci_dev *pci; + + int irq; + + int granularity; + + /* card access with 1 mem bar and 2 io bar's */ + unsigned long port[3]; + unsigned long dsp_reg_offset; + + /* share the name */ + char name[40]; /* name of this soundcard */ + + struct pcxhr_rmh *prmh; + + struct mutex lock; /* interrupt lock */ + struct mutex msg_lock; /* message lock */ + + struct mutex setup_mutex; /* mutex used in hw_params, open and close */ + struct mutex mixer_mutex; /* mutex for mixer */ + + /* hardware interface */ + unsigned int dsp_loaded; /* bit flags of loaded dsp indices */ + unsigned int dsp_version; /* read from embedded once firmware is loaded */ + int playback_chips; + int capture_chips; + int fw_file_set; + int firmware_num; + unsigned int is_hr_stereo:1; + unsigned int board_has_aes1:1; /* if 1 board has AES1 plug and SRC */ + unsigned int board_has_analog:1; /* if 0 the board is digital only */ + unsigned int board_has_mic:1; /* if 1 the board has microphone input */ + unsigned int board_aes_in_192k:1;/* if 1 the aes input plugs do support 192kHz */ + unsigned int mono_capture:1; /* if 1 the board does mono capture */ + unsigned int capture_ltc:1; /* if 1 the board captures LTC input */ + + struct snd_dma_buffer hostport; + + enum pcxhr_clock_type use_clock_type; /* clock type selected by mixer */ + enum pcxhr_clock_type cur_clock_type; /* current clock type synced */ + int sample_rate; + int ref_count_rate; + int timer_toggle; /* timer interrupt toggles between the two values 0x200 and 0x300 */ + int dsp_time_last; /* the last dsp time (read by interrupt) */ + int dsp_time_err; /* dsp time errors */ + int hr_timer_calls; /* hrtimer calls */ + unsigned int src_it_dsp; /* dsp interrupt source */ + unsigned int io_num_reg_cont; /* backup of IO_NUM_REG_CONT */ + unsigned int codec_speed; /* speed mode of the codecs */ + unsigned int sample_rate_real; /* current real sample rate */ + int last_reg_stat; + int async_err_stream_xrun; + int async_err_pipe_xrun; + int async_err_other_last; + + unsigned char xlx_cfg; /* copy of PCXHR_XLX_CFG register */ + unsigned char xlx_selmic; /* copy of PCXHR_XLX_SELMIC register */ + unsigned char dsp_reset; /* copy of PCXHR_DSP_RESET register */ + + ktime_t hr_timer_period_time; + atomic_t hr_timer_running; + struct hrtimer hr_timer; + struct tasklet_struct hr_timer_tasklet; + + struct pcxhr_dbg_cpt dbg_cpt; + + enum pcxhr_board_revision_id board_revision; /* Current board revision (IE values)*/ + unsigned int pcm1796_operation_reg_value; /* copy of the operation register (REG 19, @0x13) of the PCM1796*/ +}; + +/* IE support*/ +static const unsigned int PCXHR_DEVICE_IE_ID_MASK = 0x00F0; +static const unsigned int PCXHR_DEVICE_IE5_ID = 0x0040; +static const unsigned int PCXHR_DEVICE_IE7_ID = 0x0060; + + +/* pcxhr_mgr board revision helper */ +static inline unsigned int pcxhr_is_board_revision (const struct pcxhr_mgr* toTest, const unsigned int tested_revision) +{ + return toTest->board_revision == tested_revision; +} + + + +enum pcxhr_stream_status { + PCXHR_STREAM_STATUS_FREE, + PCXHR_STREAM_STATUS_OPEN, + PCXHR_STREAM_STATUS_SCHEDULE_RUN, + PCXHR_STREAM_STATUS_STARTED, + PCXHR_STREAM_STATUS_RUNNING, + PCXHR_STREAM_STATUS_SCHEDULE_STOP, + PCXHR_STREAM_STATUS_STOPPED, + PCXHR_STREAM_STATUS_PAUSED +}; + +struct pcxhr_stream { + struct snd_pcm_substream *substream; + snd_pcm_format_t format; + struct pcxhr_pipe *pipe; + + enum pcxhr_stream_status status; /* free, open, running, draining, pause */ + + u_int64_t timer_abs_periods; /* timer: samples elapsed since TRIGGER_START (multiple of period_size) */ + u_int32_t timer_period_frag; /* timer: samples elapsed since last call to snd_pcm_period_elapsed (0..period_size) */ + u_int32_t timer_buf_periods; /* nb of periods in the buffer that have already elapsed */ + int timer_is_synced; /* if(0) : timer needs to be resynced with real hardware pointer */ + + int channels; +}; + + +enum pcxhr_pipe_status { + PCXHR_PIPE_UNDEFINED, + PCXHR_PIPE_DEFINED +}; + +struct pcxhr_pipe { + enum pcxhr_pipe_status status; + int is_capture; /* this is a capture pipe */ + int first_audio; /* first audio num */ +}; + + +struct snd_pcxhr { + struct snd_card *card; + struct pcxhr_mgr *mgr; + int chip_idx; /* zero based */ + + struct snd_pcm *pcm; /* PCM */ + + struct pcxhr_pipe playback_pipe; /* 1 stereo pipe only */ + struct pcxhr_pipe capture_pipe[2]; /* 1 stereo or 2 mono pipes */ + + struct pcxhr_stream playback_stream[PCXHR_PLAYBACK_STREAMS]; + struct pcxhr_stream capture_stream[2]; /* 1 stereo or 2 mono streams */ + int nb_streams_play; + int nb_streams_capt; + + int analog_playback_active[2]; /* Mixer : Master Playback !mute */ + int analog_playback_volume[2]; /* Mixer : Master Playback Volume */ + int analog_capture_volume[2]; /* Mixer : Master Capture Volume */ + int digital_playback_active[PCXHR_PLAYBACK_STREAMS][2]; + int digital_playback_volume[PCXHR_PLAYBACK_STREAMS][2]; + int digital_capture_volume[2]; /* Mixer : Digital Capture Volume */ + int monitoring_active[2]; /* Mixer : Monitoring Active */ + int monitoring_volume[2]; /* Mixer : Monitoring Volume */ + int audio_capture_source; /* Mixer : Audio Capture Source */ + int mic_volume; /* used by cards with MIC only */ + int mic_boost; /* used by cards with MIC only */ + int mic_active; /* used by cards with MIC only */ + int analog_capture_active; /* used by cards with MIC only */ + int phantom_power; /* used by cards with MIC only */ + + unsigned char aes_bits[5]; /* Mixer : IEC958_AES bits */ +}; + +struct pcxhr_hostport +{ + char purgebuffer[6]; + char reserved[2]; +}; + +/* exported */ +int pcxhr_create_pcm(struct snd_pcxhr *chip); +int pcxhr_set_clock(struct pcxhr_mgr *mgr, unsigned int rate); +int pcxhr_get_external_clock(struct pcxhr_mgr *mgr, + enum pcxhr_clock_type clock_type, + int *sample_rate); + +/* + * @return true if the subsystem_id mathes the given ID mask + */ +static inline unsigned int pcxhr_is_device_IE (unsigned int sub_system_id, const unsigned int proposed_IE) +{ + return ((sub_system_id & PCXHR_DEVICE_IE_ID_MASK) == proposed_IE) ? 1 : 0 ; +} +/* + * @return true if the subsystem_id is compatible with the given ID + */ +static inline unsigned int pcxhr_is_device_compatible_IE (unsigned int sub_system_id, const unsigned int proposed_IE) +{ + //Only IE7 is compatible with IE5. + if (proposed_IE == PCXHR_DEVICE_IE5_ID) + { + //Ok for IE >= IE5 + return ((sub_system_id & PCXHR_DEVICE_IE_ID_MASK) >= proposed_IE )? 1 : 0; + } + else + { + return pcxhr_is_device_IE(sub_system_id, proposed_IE); + } +} + + +#endif /* __SOUND_PCXHR_H */ diff --git a/snd-pcxhr/src/pcxhr_clock_monitoring.c b/snd-pcxhr/src/pcxhr_clock_monitoring.c new file mode 100644 index 0000000..74043c0 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_clock_monitoring.c @@ -0,0 +1,158 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * Copyright (c) 2004 by Digigram + */ + + +#include +#include +#include // for threads +#include // for task_struct +#include // for using jiffies +#include +#include +#include +#include "pcxhr_clock_monitoring.h" +#include "pcxhr.h" + +/* + use case 1 + on démarre en AES et la clock disparait. + + use case 2 + La clock aes a disparut à un moment... et elle réapparait. + +*/ +void clock_monitoring_treatment(struct pcxhr_mgr *mgr) { + int rate = 0; + + if((mgr != NULL) ) + { + mutex_lock(&mgr->timer_mutex); + if( mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL ) { //on est cencé être sur de l AES + pcxhr_get_external_clock(mgr,mgr->use_clock_type,&rate); + if( rate == 0 ) { + dev_err(&mgr->pci->dev, "\tpcxhr_clock_monitoring_tasklet external clock disappears...\n"); + mgr->expected_clock_type = mgr->use_clock_type; + mgr->use_clock_type = PCXHR_CLOCK_TYPE_INTERNAL; + pcxhr_set_clock(mgr, mgr->sample_rate_real); + } + } + else { //on est déjà sur l horloge interne on test si l aes est de retour + pcxhr_get_external_clock(mgr,mgr->expected_clock_type,&rate); + if( rate != 0) { + dev_err(&mgr->pci->dev, "\tpcxhr_clock_monitoring_tasklet external clock reappears...\n"); + mgr->use_clock_type = mgr->expected_clock_type; + pcxhr_set_clock(mgr, rate); + } + } + mutex_unlock(&mgr->timer_mutex); + }else { + dev_err(&mgr->pci->dev, "\tclock_monitoring_treatment mgr pointer null\n"); + } +} + +int clock_monitoring_thread(void *ptr) { + struct pcxhr_mgr *mgr = (struct pcxhr_mgr*) ptr; + + printk(KERN_INFO "In thread %s", mgr->shortname); + while (1){ + set_current_state(TASK_INTERRUPTIBLE); + schedule(); + clock_monitoring_treatment(mgr); + } + dev_info(&mgr->pci->dev, "clock_monitoring_thread on sort\n"); + return 0; +} + +int clock_monitoring_thread_init(struct pcxhr_mgr *mgr) { + + char* our_thread="clockMonitoring thread"; + + mgr->thread = kthread_create(clock_monitoring_thread,mgr,our_thread); + if(mgr->thread == NULL) { + dev_err(&mgr->pci->dev, "clock_monitoring_thread_init kthread_create FAILED\n"); + return -ENOMEM; + } + wake_up_process(mgr->thread); + return 0; +} + +//void thread_cleanup(void) { +//} + +static void clockMonitor_timedout(unsigned long ptr) { + struct pcxhr_mgr *mgr = (struct pcxhr_mgr*) ptr; + + if( (mgr != NULL) && (mgr->timer_state == 1) ) { + mod_timer(mgr->clockMonitor_timer, (jiffies + msecs_to_jiffies(1000))); + wake_up_process(mgr->thread); + } + + if(mgr->timer_state == 0) { + dev_info(&mgr->pci->dev, "\tclockMonitor_timedout timer should stop do not reload it\n"); + } +} + + +int clockMonitor_stop(struct pcxhr_mgr *mgr){ + int result = 0; + mutex_lock(&mgr->timer_mutex); + + dev_info(&mgr->pci->dev, " clockMonitor_stop %s\n", mgr->shortname); + if((mgr->clockMonitor_timer != NULL)&& (mgr->timer_state == 1)) { +// result = del_timer(mgr->clockMonitor_timer); + result = del_timer_sync(mgr->clockMonitor_timer); + mgr->timer_state = 0; + } + mutex_unlock(&mgr->timer_mutex); + return 0; +} + +int clockMonitor_start(struct pcxhr_mgr *mgr){ + mutex_lock(&mgr->timer_mutex); + if(mgr->timer_state == 0) { //déjà était démarré... + dev_info(&mgr->pci->dev, "clockMonitor_start %s\n", mgr->shortname); + + init_timer(mgr->clockMonitor_timer); + mgr->clockMonitor_timer->function = clockMonitor_timedout; + mgr->clockMonitor_timer->data = (unsigned long)mgr; + mgr->clockMonitor_timer->expires = jiffies + msecs_to_jiffies(2000); + add_timer(mgr->clockMonitor_timer); + mgr->timer_state = 1; + } + mutex_unlock(&mgr->timer_mutex); + return 0; +} + + +int clockMonitor_init(struct pcxhr_mgr *mgr){ + dev_info(&mgr->pci->dev, "clockMonitor_init %s\n", mgr->shortname); + + mutex_init(&mgr->timer_mutex); + + mgr->clockMonitor_timer = (struct timer_list*) kmalloc(sizeof(struct timer_list), GFP_KERNEL); + if(mgr->clockMonitor_timer == NULL){ + dev_info(&mgr->pci->dev, "clockMonitor_init failed mgr->clockMonitor_timer NULL\n"); + return -ENOMEM; + } + //init_timer(mgr->clockMonitor_timer); + + mgr->timer_state = 0; + + return clock_monitoring_thread_init(mgr); +} + +int clockMonitor_free(struct pcxhr_mgr *mgr){ + dev_info(&mgr->pci->dev, "clockMonitor_free %s\n", mgr->shortname); + + if (mgr->clockMonitor_timer != NULL) + { + kfree(mgr->clockMonitor_timer); + } + mgr->timer_state = 0; + + return 0; +} diff --git a/snd-pcxhr/src/pcxhr_clock_monitoring.h b/snd-pcxhr/src/pcxhr_clock_monitoring.h new file mode 100644 index 0000000..9825f9d --- /dev/null +++ b/snd-pcxhr/src/pcxhr_clock_monitoring.h @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * Copyright (c) 2004 by Digigram + */ + + +#ifndef __SOUND_PCXHR_CLOCK_MONITORING_H +#define __SOUND_PCXHR_CLOCK_MONITORING_H +#include "pcxhr.h" + + + +/* +A timer wake up a hread wich monitor clock. +*/ + + +//initialise clock management +int clockMonitor_init(struct pcxhr_mgr *mgr); +//clean all kmalloc,etc... +int clockMonitor_free(struct pcxhr_mgr *mgr); + +//stop clock management +int clockMonitor_stop(struct pcxhr_mgr *mgr); +//start clock management. needs clockMonitor_init before +int clockMonitor_start(struct pcxhr_mgr *mgr); + + + + + +#endif //__SOUND_PCXHR_CLOCK_MONITORING_H diff --git a/snd-pcxhr/src/pcxhr_core.c b/snd-pcxhr/src/pcxhr_core.c new file mode 100644 index 0000000..020088b --- /dev/null +++ b/snd-pcxhr/src/pcxhr_core.c @@ -0,0 +1,1330 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * low level interface with interrupt and message handling implementation + * + * Copyright (c) 2004 by Digigram + */ + +#include +#include +#include +#include +#include +#include +#include "pcxhr.h" +#include "pcxhr_mixer.h" +#include "pcxhr_hwdep.h" +#include "pcxhr_core.h" + +/* params used with PCXHR_PLX_MBOX0 */ +#define PCXHR_MBOX0_HF5 (1 << 0) +#define PCXHR_MBOX0_HF4 (1 << 1) +#define PCXHR_MBOX0_BOOT_HERE (1 << 23) +/* params used with PCXHR_PLX_IRQCS */ +#define PCXHR_IRQCS_ENABLE_PCIIRQ (1 << 8) +#define PCXHR_IRQCS_ENABLE_PCIDB (1 << 9) +#define PCXHR_IRQCS_ACTIVE_PCIDB (1 << 13) +/* params used with PCXHR_PLX_CHIPSC */ +#define PCXHR_CHIPSC_INIT_VALUE 0x100D767E +#define PCXHR_CHIPSC_RESET_XILINX (1 << 16) +#define PCXHR_CHIPSC_GPI_USERI (1 << 17) +#define PCXHR_CHIPSC_DATA_CLK (1 << 24) +#define PCXHR_CHIPSC_DATA_IN (1 << 26) + +/* params used with PCXHR_DSP_ICR */ +#define PCXHR_ICR_HI08_RREQ 0x01 +#define PCXHR_ICR_HI08_TREQ 0x02 +#define PCXHR_ICR_HI08_HDRQ 0x04 +#define PCXHR_ICR_HI08_HF0 0x08 +#define PCXHR_ICR_HI08_HF1 0x10 +#define PCXHR_ICR_HI08_HLEND 0x20 +#define PCXHR_ICR_HI08_INIT 0x80 +/* params used with PCXHR_DSP_CVR */ +#define PCXHR_CVR_HI08_HC 0x80 +/* params used with PCXHR_DSP_ISR */ +#define PCXHR_ISR_HI08_RXDF 0x01 +#define PCXHR_ISR_HI08_TXDE 0x02 +#define PCXHR_ISR_HI08_TRDY 0x04 +#define PCXHR_ISR_HI08_ERR 0x08 +#define PCXHR_ISR_HI08_CHK 0x10 +#define PCXHR_ISR_HI08_HREQ 0x80 + + +/* constants used for delay in msec */ +#define PCXHR_WAIT_DEFAULT 2 +#define PCXHR_WAIT_IT 25 +#define PCXHR_WAIT_IT_EXTRA 65 + +/* + * pcxhr_check_reg_bit - wait for the specified bit is set/reset on a register + * @reg: register to check + * @mask: bit mask + * @bit: resultant bit to be checked + * @time: time-out of loop in msec + * + * returns zero if a bit matches, or a negative error code. + */ +static int pcxhr_check_reg_bit(struct pcxhr_mgr *mgr, unsigned int bar, unsigned int reg, + unsigned char mask, unsigned char bit, int time, + unsigned char* read) +{ + int i = 0; + unsigned long end_time = jiffies + (time * HZ + 999) / 1000; + do { + *read = PCXHR_INPB(mgr, bar, reg); + if ((*read & mask) == bit) { + if (i > 100) + dev_dbg(&mgr->pci->dev, + "ATTENTION! check_reg(%x) loopcount=%d\n", + reg, i); + return 0; + } + i++; + } while (time_after_eq(end_time, jiffies)); + dev_err(&mgr->pci->dev, + "pcxhr_check_reg_bit: timeout, bar=%x reg=%x, mask=0x%x, val=%x\n", + bar, reg, mask, *read); + return -EIO; +} + +/* constants used with pcxhr_check_reg_bit() */ +#define PCXHR_TIMEOUT_DSP 200 + + +#define PCXHR_MASK_EXTRA_INFO 0x0000FE +#define PCXHR_MASK_IT_HF0 0x000100 +#define PCXHR_MASK_IT_HF1 0x000200 +#define PCXHR_MASK_IT_NO_HF0_HF1 0x000400 +#define PCXHR_MASK_IT_MANAGE_HF5 0x000800 +#define PCXHR_MASK_IT_WAIT 0x010000 +#define PCXHR_MASK_IT_WAIT_EXTRA 0x020000 + +#define PCXHR_IT_SEND_BYTE_XILINX (0x0000003C | PCXHR_MASK_IT_HF0) +#define PCXHR_IT_TEST_XILINX (0x0000003C | PCXHR_MASK_IT_HF1 | \ + PCXHR_MASK_IT_MANAGE_HF5) +#define PCXHR_IT_DOWNLOAD_BOOT (0x0000000C | PCXHR_MASK_IT_HF1 | \ + PCXHR_MASK_IT_MANAGE_HF5 | \ + PCXHR_MASK_IT_WAIT) +#define PCXHR_IT_RESET_BOARD_FUNC (0x0000000C | PCXHR_MASK_IT_HF0 | \ + PCXHR_MASK_IT_MANAGE_HF5 | \ + PCXHR_MASK_IT_WAIT_EXTRA) +#define PCXHR_IT_DOWNLOAD_DSP (0x0000000C | \ + PCXHR_MASK_IT_MANAGE_HF5 | \ + PCXHR_MASK_IT_WAIT) +#define PCXHR_IT_DEBUG (0x0000005A | PCXHR_MASK_IT_NO_HF0_HF1) +#define PCXHR_IT_RESET_SEMAPHORE (0x0000005C | PCXHR_MASK_IT_NO_HF0_HF1) +#define PCXHR_IT_MESSAGE (0x00000074 | PCXHR_MASK_IT_NO_HF0_HF1) +#define PCXHR_IT_RESET_CHK (0x00000076 | PCXHR_MASK_IT_NO_HF0_HF1) +#define PCXHR_IT_UPDATE_RBUFFER (0x00000078 | PCXHR_MASK_IT_NO_HF0_HF1) + +static int pcxhr_send_it_dsp(struct pcxhr_mgr *mgr, + unsigned int itdsp, int atomic) +{ + int err; + unsigned char reg; + + if (itdsp & PCXHR_MASK_IT_MANAGE_HF5) { + /* clear hf5 bit */ + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, + PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & + ~PCXHR_MBOX0_HF5); + } + if ((itdsp & PCXHR_MASK_IT_NO_HF0_HF1) == 0) { + reg = (PCXHR_ICR_HI08_RREQ | + PCXHR_ICR_HI08_TREQ | + PCXHR_ICR_HI08_HDRQ); + if (itdsp & PCXHR_MASK_IT_HF0) + reg |= PCXHR_ICR_HI08_HF0; + if (itdsp & PCXHR_MASK_IT_HF1) + reg |= PCXHR_ICR_HI08_HF1; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); + } + reg = (unsigned char)(((itdsp & PCXHR_MASK_EXTRA_INFO) >> 1) | + PCXHR_CVR_HI08_HC); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_CVR, reg); + if (itdsp & PCXHR_MASK_IT_WAIT) { + if (atomic) + mdelay(PCXHR_WAIT_IT); + else + msleep(PCXHR_WAIT_IT); + } + if (itdsp & PCXHR_MASK_IT_WAIT_EXTRA) { + if (atomic) + mdelay(PCXHR_WAIT_IT_EXTRA); + else + msleep(PCXHR_WAIT_IT); + } + /* wait for CVR_HI08_HC == 0 */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_CVR, PCXHR_CVR_HI08_HC, 0, + PCXHR_TIMEOUT_DSP, ®); + if (err) { + dev_err(&mgr->pci->dev, "pcxhr_send_it_dsp : TIMEOUT CVR\n"); + return err; + } + if (itdsp & PCXHR_MASK_IT_MANAGE_HF5) { + /* wait for hf5 bit */ + err = pcxhr_check_reg_bit(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, + PCXHR_MBOX0_HF5, + PCXHR_MBOX0_HF5, + PCXHR_TIMEOUT_DSP, + ®); + if (err) { + dev_err(&mgr->pci->dev, + "pcxhr_send_it_dsp : TIMEOUT HF5\n"); + return err; + } + } + return 0; /* retry not handled here */ +} + +void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr) +{ + if (pcxhr_is_device_compatible_IE (mgr->pci->subsystem_device, PCXHR_DEVICE_IE5_ID)){ + unsigned int chipsc; + chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); + chipsc &= ~PCXHR_CHIPSC_RESET_XILINX; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC,chipsc); + mdelay(200); + + chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); + chipsc |= PCXHR_CHIPSC_RESET_XILINX; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); + mdelay(20); + }else{ + /* reset second xilinx */ + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, + PCXHR_CHIPSC_INIT_VALUE & ~PCXHR_CHIPSC_RESET_XILINX); + mdelay(20); + } +} + +static void pcxhr_enable_irq(struct pcxhr_mgr *mgr, int enable) +{ + unsigned int reg = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); + /* enable/disable interrupts */ + if (enable) + reg |= (PCXHR_IRQCS_ENABLE_PCIIRQ | PCXHR_IRQCS_ENABLE_PCIDB); + else + reg &= ~(PCXHR_IRQCS_ENABLE_PCIIRQ | PCXHR_IRQCS_ENABLE_PCIDB); + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS, reg); +} + +void pcxhr_reset_dsp(struct pcxhr_mgr *mgr) +{ + /* disable interrupts */ + pcxhr_enable_irq(mgr, 0); + + /* let's reset the DSP */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, 0); + msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, 3); + msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ + + /* reset mailbox */ + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, 0); +} + +void pcxhr_enable_dsp(struct pcxhr_mgr *mgr) +{ + /* enable interrupts */ + pcxhr_enable_irq(mgr, 1); +} + +/* + * load the xilinx image + */ +int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, + const struct firmware *xilinx, int second) +{ + unsigned int i; + unsigned int chipsc; + unsigned char data; + unsigned char mask; + const unsigned char *image; + + /* test first xilinx */ + chipsc = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC); + /* REV01 cards do not support the PCXHR_CHIPSC_GPI_USERI bit anymore */ + /* this bit will always be 1; + * no possibility to test presence of first xilinx + */ + if(second) { + if ((chipsc & PCXHR_CHIPSC_GPI_USERI) == 0) { + dev_err(&mgr->pci->dev, "error loading first xilinx\n"); + return -EINVAL; + } + /* activate second xilinx */ + chipsc |= PCXHR_CHIPSC_RESET_XILINX; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); + msleep( PCXHR_WAIT_DEFAULT ); /* wait 2 msec */ + } + image = xilinx->data; + for (i = 0; i < xilinx->size; i++, image++) { + data = *image; + mask = 0x80; + while (mask) { + chipsc &= ~(PCXHR_CHIPSC_DATA_CLK | + PCXHR_CHIPSC_DATA_IN); + if (data & mask) + chipsc |= PCXHR_CHIPSC_DATA_IN; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); + chipsc |= PCXHR_CHIPSC_DATA_CLK; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); + mask >>= 1; + } + /* don't take too much time in this loop... */ + cond_resched(); + } + chipsc &= ~(PCXHR_CHIPSC_DATA_CLK | PCXHR_CHIPSC_DATA_IN); + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_CHIPSC, chipsc); + /* wait 2 msec (time to boot the xilinx before any access) */ + msleep( PCXHR_WAIT_DEFAULT ); + return 0; +} + +/* + * send an executable file to the DSP + */ +static int pcxhr_download_dsp(struct pcxhr_mgr *mgr, const struct firmware *dsp) +{ + int err; + unsigned int i; + unsigned int len; + const unsigned char *data; + unsigned char dummy; + /* check the length of boot image */ + if (dsp->size <= 0) + return -EINVAL; + if (dsp->size % 3) + return -EINVAL; + if (snd_BUG_ON(!dsp->data)) + return -EINVAL; + /* transfert data buffer from PC to DSP */ + for (i = 0; i < dsp->size; i += 3) { + data = dsp->data + i; + if (i == 0) { + /* test data header consistency */ + len = (unsigned int)((data[0]<<16) + + (data[1]<<8) + + data[2]); + if (len && (dsp->size != (len + 2) * 3)) + return -EINVAL; + } + /* wait DSP ready for new transfer */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_TRDY, + PCXHR_ISR_HI08_TRDY, + PCXHR_TIMEOUT_DSP, &dummy); + if (err) { + dev_err(&mgr->pci->dev, + "dsp loading error at position %d\n", i); + return err; + } + /* send host data */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, data[0]); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, data[1]); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, data[2]); + + /* don't take too much time in this loop... */ + cond_resched(); + } + /* give some time to boot the DSP */ + msleep(PCXHR_WAIT_DEFAULT); + return 0; +} + +/* + * load the eeprom image + */ +int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, + const struct firmware *eeprom) +{ + int err; + unsigned char reg; + + /* init value of the ICR register */ + reg = PCXHR_ICR_HI08_RREQ | PCXHR_ICR_HI08_TREQ | PCXHR_ICR_HI08_HDRQ; + if (PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & PCXHR_MBOX0_BOOT_HERE) { + /* no need to load the eeprom binary, + * but init the HI08 interface + */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg | PCXHR_ICR_HI08_INIT); + msleep(PCXHR_WAIT_DEFAULT); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); + msleep(PCXHR_WAIT_DEFAULT); + dev_dbg(&mgr->pci->dev, "no need to load eeprom boot\n"); + return 0; + } + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_ICR, reg); + + err = pcxhr_download_dsp(mgr, eeprom); + if (err) + return err; + /* wait for chk bit */ + return pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, + PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); +} + +/* + * load the boot image + */ +int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot) +{ + int err; + unsigned int physaddr = mgr->hostport.addr; + unsigned char dummy; + + /* send the hostport address to the DSP (only the upper 24 bit !) */ + if (snd_BUG_ON(physaddr & 0xff)) + return -EINVAL; + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX1, (physaddr >> 8)); + + err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_BOOT, 0); + if (err) + return err; + /* clear hf5 bit */ + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, + PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0) & ~PCXHR_MBOX0_HF5); + + err = pcxhr_download_dsp(mgr, boot); + if (err) + return err; + /* wait for hf5 bit */ + return pcxhr_check_reg_bit(mgr, PCXHR_PLX, PCXHR_PLX_MBOX0, PCXHR_MBOX0_HF5, + PCXHR_MBOX0_HF5, PCXHR_TIMEOUT_DSP, &dummy); +} + +/* + * load the final dsp image + */ +int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp) +{ + int err; + unsigned char dummy; + err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_BOARD_FUNC, 0); + if (err) + return err; + err = pcxhr_send_it_dsp(mgr, PCXHR_IT_DOWNLOAD_DSP, 0); + if (err) + return err; + err = pcxhr_download_dsp(mgr, dsp); + if (err) + return err; + /* wait for chk bit */ + return pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_CHK, + PCXHR_ISR_HI08_CHK, + PCXHR_TIMEOUT_DSP, &dummy); +} + + +struct pcxhr_cmd_info { + u32 opcode; /* command word */ + u16 st_length; /* status length */ + u16 st_type; /* status type (RMH_SSIZE_XXX) */ +}; + +/* RMH status type */ +enum { + RMH_SSIZE_FIXED = 0, /* status size fix (st_length = 0..x) */ + RMH_SSIZE_ARG = 1, /* status size given in the LSB byte */ + RMH_SSIZE_MASK = 2, /* status size given in bitmask */ +}; + +/* + * Array of DSP commands + */ +static const struct pcxhr_cmd_info pcxhr_dsp_cmds[] = { +[CMD_VERSION] = { 0x010000, 1, RMH_SSIZE_FIXED }, +[CMD_SUPPORTED] = { 0x020000, 4, RMH_SSIZE_FIXED }, +[CMD_TEST_IT] = { 0x040000, 1, RMH_SSIZE_FIXED }, +[CMD_SEND_IRQA] = { 0x070001, 0, RMH_SSIZE_FIXED }, +[CMD_ACCESS_IO_WRITE] = { 0x090000, 1, RMH_SSIZE_ARG }, +[CMD_ACCESS_IO_READ] = { 0x094000, 1, RMH_SSIZE_ARG }, +[CMD_ASYNC] = { 0x0a0000, 1, RMH_SSIZE_ARG }, +[CMD_MODIFY_CLOCK] = { 0x0d0000, 0, RMH_SSIZE_FIXED }, +[CMD_RESYNC_AUDIO_INPUTS] = { 0x0e0000, 0, RMH_SSIZE_FIXED }, +[CMD_GET_DSP_RESOURCES] = { 0x100000, 4, RMH_SSIZE_FIXED }, +[CMD_SET_TIMER_INTERRUPT] = { 0x110000, 0, RMH_SSIZE_FIXED }, +[CMD_RES_PIPE] = { 0x400000, 0, RMH_SSIZE_FIXED }, +[CMD_FREE_PIPE] = { 0x410000, 0, RMH_SSIZE_FIXED }, +[CMD_CONF_PIPE] = { 0x422101, 0, RMH_SSIZE_FIXED }, +[CMD_STOP_PIPE] = { 0x470004, 0, RMH_SSIZE_FIXED }, +[CMD_PIPE_SAMPLE_COUNT] = { 0x49a000, 2, RMH_SSIZE_FIXED }, +[CMD_CAN_START_PIPE] = { 0x4b0000, 1, RMH_SSIZE_FIXED }, +[CMD_START_STREAM] = { 0x802000, 0, RMH_SSIZE_FIXED }, +[CMD_STREAM_OUT_LEVEL_ADJUST] = { 0x822000, 0, RMH_SSIZE_FIXED }, +[CMD_STOP_STREAM] = { 0x832000, 0, RMH_SSIZE_FIXED }, +[CMD_UPDATE_R_BUFFERS] = { 0x840000, 0, RMH_SSIZE_FIXED }, +[CMD_FORMAT_STREAM_OUT] = { 0x860000, 0, RMH_SSIZE_FIXED }, +[CMD_FORMAT_STREAM_IN] = { 0x870000, 0, RMH_SSIZE_FIXED }, +[CMD_STREAM_SAMPLE_COUNT] = { 0x902000, 2, RMH_SSIZE_FIXED }, +[CMD_AUDIO_LEVEL_ADJUST] = { 0xc22000, 0, RMH_SSIZE_FIXED }, +[CMD_GET_TIME_CODE] = { 0x060000, 5, RMH_SSIZE_FIXED }, +[CMD_MANAGE_SIGNAL] = { 0x0f0000, 0, RMH_SSIZE_FIXED }, +}; + +#ifdef CONFIG_SND_DEBUG_VERBOSE +static const char * const cmd_names[] = { +[CMD_VERSION] = "CMD_VERSION", +[CMD_SUPPORTED] = "CMD_SUPPORTED", +[CMD_TEST_IT] = "CMD_TEST_IT", +[CMD_SEND_IRQA] = "CMD_SEND_IRQA", +[CMD_ACCESS_IO_WRITE] = "CMD_ACCESS_IO_WRITE", +[CMD_ACCESS_IO_READ] = "CMD_ACCESS_IO_READ", +[CMD_ASYNC] = "CMD_ASYNC", +[CMD_MODIFY_CLOCK] = "CMD_MODIFY_CLOCK", +[CMD_RESYNC_AUDIO_INPUTS] = "CMD_RESYNC_AUDIO_INPUTS", +[CMD_GET_DSP_RESOURCES] = "CMD_GET_DSP_RESOURCES", +[CMD_SET_TIMER_INTERRUPT] = "CMD_SET_TIMER_INTERRUPT", +[CMD_RES_PIPE] = "CMD_RES_PIPE", +[CMD_FREE_PIPE] = "CMD_FREE_PIPE", +[CMD_CONF_PIPE] = "CMD_CONF_PIPE", +[CMD_STOP_PIPE] = "CMD_STOP_PIPE", +[CMD_PIPE_SAMPLE_COUNT] = "CMD_PIPE_SAMPLE_COUNT", +[CMD_CAN_START_PIPE] = "CMD_CAN_START_PIPE", +[CMD_START_STREAM] = "CMD_START_STREAM", +[CMD_STREAM_OUT_LEVEL_ADJUST] = "CMD_STREAM_OUT_LEVEL_ADJUST", +[CMD_STOP_STREAM] = "CMD_STOP_STREAM", +[CMD_UPDATE_R_BUFFERS] = "CMD_UPDATE_R_BUFFERS", +[CMD_FORMAT_STREAM_OUT] = "CMD_FORMAT_STREAM_OUT", +[CMD_FORMAT_STREAM_IN] = "CMD_FORMAT_STREAM_IN", +[CMD_STREAM_SAMPLE_COUNT] = "CMD_STREAM_SAMPLE_COUNT", +[CMD_AUDIO_LEVEL_ADJUST] = "CMD_AUDIO_LEVEL_ADJUST", +[CMD_GET_TIME_CODE] = "CMD_GET_TIME_CODE", +[CMD_MANAGE_SIGNAL] = "CMD_MANAGE_SIGNAL", +}; +#endif + + +static int pcxhr_read_rmh_status(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) +{ + int err; + int i; + u32 data; + u32 size_mask; + unsigned char reg; + int max_stat_len; + + if (rmh->stat_len < PCXHR_SIZE_MAX_STATUS) + max_stat_len = PCXHR_SIZE_MAX_STATUS; + else max_stat_len = rmh->stat_len; + + for (i = 0; i < rmh->stat_len; i++) { + /* wait for receiver full */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_RXDF, + PCXHR_ISR_HI08_RXDF, + PCXHR_TIMEOUT_DSP, ®); + if (err) { + dev_err(&mgr->pci->dev, + "ERROR RMH stat: ISR:RXDF=1 (ISR = %x; i=%d )\n", + reg, i); + return err; + } + /* read data */ + data = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH) << 16; + data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM) << 8; + data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL); + + /* need to update rmh->stat_len on the fly ?? */ + if (!i) { + if (rmh->dsp_stat != RMH_SSIZE_FIXED) { + if (rmh->dsp_stat == RMH_SSIZE_ARG) { + rmh->stat_len = (data & 0x0000ff) + 1; + data &= 0xffff00; + } else { + /* rmh->dsp_stat == RMH_SSIZE_MASK */ + rmh->stat_len = 1; + size_mask = data; + while (size_mask) { + if (size_mask & 1) + rmh->stat_len++; + size_mask >>= 1; + } + } + } + } +#ifdef CONFIG_SND_DEBUG_VERBOSE + if (rmh->cmd_idx < CMD_LAST_INDEX) + dev_dbg(&mgr->pci->dev, " stat[%d]=%x\n", i, data); +#endif + if (i < max_stat_len) + rmh->stat[i] = data; + } + if (rmh->stat_len > max_stat_len) { + dev_dbg(&mgr->pci->dev, "PCXHR : rmh->stat_len=%x too big\n", + rmh->stat_len); + rmh->stat_len = max_stat_len; + } + return 0; +} + +static int pcxhr_send_msg_nolock(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) +{ + int err; + int i; + u32 data; + unsigned char reg; + + if (snd_BUG_ON(rmh->cmd_len >= PCXHR_SIZE_MAX_CMD)) + return -EINVAL; + err = pcxhr_send_it_dsp(mgr, PCXHR_IT_MESSAGE, 1); + if (err) { + dev_err(&mgr->pci->dev, + "pcxhr_send_message : ED_DSP_CRASHED\n"); + return err; + } + /* wait for chk bit */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, + PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + /* reset irq chk */ + err = pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_CHK, 1); + if (err) + return err; + /* wait for chk bit == 0*/ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, 0, + PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + + data = rmh->cmd[0]; + + if (rmh->cmd_len > 1) + data |= 0x008000; /* MASK_MORE_THAN_1_WORD_COMMAND */ + else + data &= 0xff7fff; /* MASK_1_WORD_COMMAND */ +#ifdef CONFIG_SND_DEBUG_VERBOSE + if (rmh->cmd_idx < CMD_LAST_INDEX) + dev_dbg(&mgr->pci->dev, "MSG cmd[0]=%x (%s)\n", + data, cmd_names[rmh->cmd_idx]); +#endif + + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_TRDY, + PCXHR_ISR_HI08_TRDY, PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); + + if (rmh->cmd_len > 1) { + /* send length */ + data = rmh->cmd_len - 1; + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_TRDY, + PCXHR_ISR_HI08_TRDY, + PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); + + for (i=1; i < rmh->cmd_len; i++) { + /* send other words */ + data = rmh->cmd[i]; +#ifdef CONFIG_SND_DEBUG_VERBOSE + if (rmh->cmd_idx < CMD_LAST_INDEX) + dev_dbg(&mgr->pci->dev, + " cmd[%d]=%x\n", i, data); +#endif + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_TRDY, + PCXHR_ISR_HI08_TRDY, + PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH, (data>>16)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM, (data>>8)&0xFF); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL, (data&0xFF)); + } + } + /* wait for chk bit */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, PCXHR_ISR_HI08_CHK, + PCXHR_ISR_HI08_CHK, PCXHR_TIMEOUT_DSP, ®); + if (err) + return err; + /* test status ISR */ + if (reg & PCXHR_ISR_HI08_ERR) { + /* ERROR, wait for receiver full */ + err = pcxhr_check_reg_bit(mgr, PCXHR_DSP, PCXHR_DSP_ISR, + PCXHR_ISR_HI08_RXDF, + PCXHR_ISR_HI08_RXDF, + PCXHR_TIMEOUT_DSP, ®); + if (err) { + dev_err(&mgr->pci->dev, + "ERROR RMH: ISR:RXDF=1 (ISR = %x)\n", reg); + return err; + } + /* read error code */ + data = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXH) << 16; + data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXM) << 8; + data |= PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_TXL); + dev_err(&mgr->pci->dev, "ERROR RMH(%d): 0x%x\n", + rmh->cmd_idx, data); + err = -EINVAL; + } else { + /* read the response data */ + err = pcxhr_read_rmh_status(mgr, rmh); + } + /* reset semaphore */ + if (pcxhr_send_it_dsp(mgr, PCXHR_IT_RESET_SEMAPHORE, 1) < 0) + return -EIO; + return err; +} + + +/** + * pcxhr_init_rmh - initialize the RMH instance + * @rmh: the rmh pointer to be initialized + * @cmd: the rmh command to be set + */ +void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd) +{ + if (snd_BUG_ON(cmd >= CMD_LAST_INDEX)) + return; + rmh->cmd[0] = pcxhr_dsp_cmds[cmd].opcode; + rmh->cmd_len = 1; + rmh->stat_len = pcxhr_dsp_cmds[cmd].st_length; + rmh->dsp_stat = pcxhr_dsp_cmds[cmd].st_type; + rmh->cmd_idx = cmd; +} + + +void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh *rmh, int capture, + unsigned int param1, unsigned int param2, + unsigned int param3) +{ + snd_BUG_ON(param1 > MASK_FIRST_FIELD); + if (capture) + rmh->cmd[0] |= 0x800; /* COMMAND_RECORD_MASK */ + if (param1) + rmh->cmd[0] |= (param1 << FIELD_SIZE); + if (param2) { + snd_BUG_ON(param2 > MASK_FIRST_FIELD); + rmh->cmd[0] |= param2; + } + if(param3) { + snd_BUG_ON(param3 > MASK_DSP_WORD); + rmh->cmd[1] = param3; + rmh->cmd_len = 2; + } +} + +/* + * pcxhr_send_msg - send a DSP message with spinlock + * @rmh: the rmh record to send and receive + * + * returns 0 if successful, or a negative error code. + */ +int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh) +{ + int err; + + mutex_lock(&mgr->msg_lock); + err = pcxhr_send_msg_nolock(mgr, rmh); + mutex_unlock(&mgr->msg_lock); + return err; +} + +static inline int pcxhr_pipes_running(struct pcxhr_mgr *mgr) +{ + int start_mask = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX2); + /* least significant 12 bits are the pipe states + * for the playback audios + * next 12 bits are the pipe states for the capture audios + * (PCXHR_PIPE_STATE_CAPTURE_OFFSET) + */ + start_mask &= 0x00ffffff; + dev_dbg(&mgr->pci->dev, "CMD_PIPE_STATE MBOX2=0x%06x\n", start_mask); + return start_mask; +} + +#define PCXHR_PIPE_STATE_CAPTURE_OFFSET 12 +#define MAX_WAIT_FOR_DSP 20 + +static int pcxhr_prepair_pipe_start(struct pcxhr_mgr *mgr, + int audio_mask, int *retry) +{ + struct pcxhr_rmh rmh; + int err; + int audio = 0; + + *retry = 0; + while (audio_mask) { + if (audio_mask & 1) { + pcxhr_init_rmh(&rmh, CMD_CAN_START_PIPE); + if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) { + /* can start playback pipe */ + pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); + } else { + /* can start capture pipe */ + pcxhr_set_pipe_cmd_params(&rmh, 1, audio - + PCXHR_PIPE_STATE_CAPTURE_OFFSET, + 0, 0); + } + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + dev_err(&mgr->pci->dev, + "error pipe start " + "(CMD_CAN_START_PIPE) err=%x!\n", + err); + return err; + } + /* if the pipe couldn't be prepaired for start, + * retry it later + */ + if (rmh.stat[0] == 0) + *retry |= (1<>=1; + audio++; + } + return 0; +} + +static int pcxhr_stop_pipes(struct pcxhr_mgr *mgr, int audio_mask) +{ + struct pcxhr_rmh rmh; + int err; + int audio = 0; + + while (audio_mask) { + if (audio_mask & 1) { + pcxhr_init_rmh(&rmh, CMD_STOP_PIPE); + if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) { + /* stop playback pipe */ + pcxhr_set_pipe_cmd_params(&rmh, 0, audio, 0, 0); + } else { + /* stop capture pipe */ + pcxhr_set_pipe_cmd_params(&rmh, 1, audio - + PCXHR_PIPE_STATE_CAPTURE_OFFSET, + 0, 0); + } + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + dev_err(&mgr->pci->dev, + "error pipe stop " + "(CMD_STOP_PIPE) err=%x!\n", err); + return err; + } + } + audio_mask>>=1; + audio++; + } + return 0; +} + +static int pcxhr_toggle_pipes(struct pcxhr_mgr *mgr, int audio_mask) +{ + struct pcxhr_rmh rmh; + int err; + int audio = 0; + + while (audio_mask) { + if (audio_mask & 1) { + pcxhr_init_rmh(&rmh, CMD_CONF_PIPE); + if (audio < PCXHR_PIPE_STATE_CAPTURE_OFFSET) + pcxhr_set_pipe_cmd_params(&rmh, 0, 0, 0, + 1 << audio); + else + pcxhr_set_pipe_cmd_params(&rmh, 1, 0, 0, + 1 << (audio - PCXHR_PIPE_STATE_CAPTURE_OFFSET)); + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + dev_err(&mgr->pci->dev, + "error pipe start " + "(CMD_CONF_PIPE) err=%x!\n", err); + return err; + } + } + audio_mask>>=1; + audio++; + } + /* now fire the interrupt on the card */ + pcxhr_init_rmh(&rmh, CMD_SEND_IRQA); + err = pcxhr_send_msg(mgr, &rmh); + if (err) { + dev_err(&mgr->pci->dev, + "error pipe start (CMD_SEND_IRQA) err=%x!\n", + err); + return err; + } + return 0; +} + + + +int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, + int capture_mask, int start) +{ + int state, i, err; + int audio_mask; + +#ifdef CONFIG_SND_DEBUG_VERBOSE + ktime_t start_time, stop_time, diff_time; + + start_time = ktime_get(); +#endif + audio_mask = (playback_mask | + (capture_mask << PCXHR_PIPE_STATE_CAPTURE_OFFSET)); + /* current pipe state (playback + record) */ + state = pcxhr_pipes_running(mgr); + dev_dbg(&mgr->pci->dev, + "pcxhr_set_pipe_state %s (mask %x current %x)\n", + start ? "START" : "STOP", audio_mask, state); + if (start) { + /* start only pipes that are not yet started */ + audio_mask &= ~state; + state = audio_mask; + for (i = 0; i < MAX_WAIT_FOR_DSP; i++) { + err = pcxhr_prepair_pipe_start(mgr, state, &state); + if (err) + return err; + if (state == 0) + break; /* success, all pipes prepaired */ + mdelay(1); /* wait 1 millisecond and retry */ + } + } else { + audio_mask &= state; /* stop only pipes that are started */ + } + if (audio_mask == 0) + return 0; + + err = pcxhr_toggle_pipes(mgr, audio_mask); + if (err) + return err; + + i = 0; + while (1) { + state = pcxhr_pipes_running(mgr); + /* have all pipes the new state ? */ + if ((state & audio_mask) == (start ? audio_mask : 0)) + break; + if (++i >= MAX_WAIT_FOR_DSP * 100) { + dev_err(&mgr->pci->dev, "error pipe start/stop\n"); + return -EBUSY; + } + udelay(10); /* wait 10 microseconds */ + } + if (!start) { + err = pcxhr_stop_pipes(mgr, audio_mask); + if (err) + return err; + } +#ifdef CONFIG_SND_DEBUG_VERBOSE + stop_time = ktime_get(); + diff_time = ktime_sub(stop_time, start_time); + dev_dbg(&mgr->pci->dev, "***SET PIPE STATE*** TIME = %ld (err = %x)\n", + (long)(ktime_to_ns(diff_time)), err); +#endif + return 0; +} + +int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, + unsigned int value, int *changed) +{ + struct pcxhr_rmh rmh; + int err; + + mutex_lock(&mgr->msg_lock); + if ((mgr->io_num_reg_cont & mask) == value) { + dev_dbg(&mgr->pci->dev, + "IO_NUM_REG_CONT mask %x already is set to %x\n", + mask, value); + if (changed) + *changed = 0; + mutex_unlock(&mgr->msg_lock); + return 0; /* already programmed */ + } + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd[0] |= IO_NUM_REG_CONT; + rmh.cmd[1] = mask; + rmh.cmd[2] = value; + rmh.cmd_len = 3; + err = pcxhr_send_msg_nolock(mgr, &rmh); + if (err == 0) { + mgr->io_num_reg_cont &= ~mask; + mgr->io_num_reg_cont |= value; + if (changed) + *changed = 1; + } + mutex_unlock(&mgr->msg_lock); + return err; +} + +#define PCXHR_IRQ_TIMER 0x000300 +#define PCXHR_IRQ_FREQ_CHANGE 0x000800 +#define PCXHR_IRQ_TIME_CODE 0x001000 +#define PCXHR_IRQ_NOTIFY 0x002000 +#define PCXHR_IRQ_ASYNC 0x008000 +#define PCXHR_IRQ_MASK 0x00bb00 +#define PCXHR_FATAL_DSP_ERR 0xff0000 + +enum pcxhr_async_err_src { + PCXHR_ERR_PIPE, + PCXHR_ERR_STREAM, + PCXHR_ERR_AUDIO +}; + +static int pcxhr_handle_async_err(struct pcxhr_mgr *mgr, u32 err, + enum pcxhr_async_err_src err_src, int pipe, + int is_capture) +{ + static const char * const err_src_name[] = { + [PCXHR_ERR_PIPE] = "Pipe", + [PCXHR_ERR_STREAM] = "Stream", + [PCXHR_ERR_AUDIO] = "Audio" + }; + + if (err & 0xfff) + err &= 0xfff; + else + err = ((err >> 12) & 0xfff); + if (!err) + return 0; + dev_dbg(&mgr->pci->dev, "CMD_ASYNC : Error %s %s Pipe %d err=%x\n", + err_src_name[err_src], + is_capture ? "Record" : "Play", pipe, err); + if (err == 0xe01) + mgr->async_err_stream_xrun++; + else if (err == 0xe10) + mgr->async_err_pipe_xrun++; + else + mgr->async_err_other_last = (int)err; + return 1; +} + + +static void pcxhr_msg_thread(struct pcxhr_mgr *mgr) +{ + struct pcxhr_rmh *prmh = mgr->prmh; + int err; + int i, j; + + if (mgr->src_it_dsp & PCXHR_IRQ_FREQ_CHANGE) + dev_dbg(&mgr->pci->dev, + "PCXHR_IRQ_FREQ_CHANGE event occurred\n"); + if (mgr->src_it_dsp & PCXHR_IRQ_TIME_CODE) + dev_dbg(&mgr->pci->dev, + "PCXHR_IRQ_TIME_CODE event occurred\n"); + if (mgr->src_it_dsp & PCXHR_IRQ_NOTIFY) + dev_dbg(&mgr->pci->dev, + "PCXHR_IRQ_NOTIFY event occurred\n"); + if (mgr->src_it_dsp & (PCXHR_IRQ_FREQ_CHANGE | PCXHR_IRQ_TIME_CODE)) { + /* clear events FREQ_CHANGE and TIME_CODE */ + pcxhr_init_rmh(prmh, CMD_TEST_IT); + err = pcxhr_send_msg(mgr, prmh); + dev_dbg(&mgr->pci->dev, "CMD_TEST_IT : err=%x, stat=%x\n", + err, prmh->stat[0]); + } + if (mgr->src_it_dsp & PCXHR_IRQ_ASYNC) { + dev_dbg(&mgr->pci->dev, + "PCXHR_IRQ_ASYNC event occurred\n"); + + pcxhr_init_rmh(prmh, CMD_ASYNC); + prmh->cmd[0] |= 1; /* add SEL_ASYNC_EVENTS */ + /* this is the only one extra long response command */ + prmh->stat_len = PCXHR_SIZE_MAX_LONG_STATUS; + err = pcxhr_send_msg(mgr, prmh); + if (err) + dev_err(&mgr->pci->dev, "ERROR pcxhr_msg_thread=%x;\n", + err); + i = 1; + while (i < prmh->stat_len) { + int nb_audio = ((prmh->stat[i] >> FIELD_SIZE) & + MASK_FIRST_FIELD); + int nb_stream = ((prmh->stat[i] >> (2*FIELD_SIZE)) & + MASK_FIRST_FIELD); + int pipe = prmh->stat[i] & MASK_FIRST_FIELD; + int is_capture = prmh->stat[i] & 0x400000; + u32 err2; + + if (prmh->stat[i] & 0x800000) { /* if BIT_END */ + dev_dbg(&mgr->pci->dev, + "TASKLET : End%sPipe %d\n", + is_capture ? "Record" : "Play", + pipe); + } + i++; + err2 = prmh->stat[i] ? prmh->stat[i] : prmh->stat[i+1]; + if (err2) + pcxhr_handle_async_err(mgr, err2, + PCXHR_ERR_PIPE, + pipe, is_capture); + i += 2; + for (j = 0; j < nb_stream; j++) { + err2 = prmh->stat[i] ? + prmh->stat[i] : prmh->stat[i+1]; + if (err2) + pcxhr_handle_async_err(mgr, err2, + PCXHR_ERR_STREAM, + pipe, + is_capture); + i += 2; + } + for (j = 0; j < nb_audio; j++) { + err2 = prmh->stat[i] ? + prmh->stat[i] : prmh->stat[i+1]; + if (err2) + pcxhr_handle_async_err(mgr, err2, + PCXHR_ERR_AUDIO, + pipe, + is_capture); + i += 2; + } + } + } +} + +static u_int64_t pcxhr_stream_read_position(struct pcxhr_mgr *mgr, + struct pcxhr_stream *stream) +{ + u_int64_t hw_sample_count; + struct pcxhr_rmh rmh; + int err, stream_mask; + + stream_mask = stream->pipe->is_capture ? 1 : 1<substream->number; + + /* get sample count for one stream */ + pcxhr_init_rmh(&rmh, CMD_STREAM_SAMPLE_COUNT); + pcxhr_set_pipe_cmd_params(&rmh, stream->pipe->is_capture, + stream->pipe->first_audio, 0, stream_mask); + /* rmh.stat_len = 2; */ /* 2 resp data for each stream of the pipe */ + + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return 0; + + hw_sample_count = ((u_int64_t)rmh.stat[0]) << 24; + hw_sample_count += (u_int64_t)rmh.stat[1]; + + dev_dbg(&mgr->pci->dev, + "stream %c%d : abs samples real(%llu) timer(%llu)\n", + stream->pipe->is_capture ? 'C' : 'P', + stream->substream->number, + hw_sample_count, + stream->timer_abs_periods + stream->timer_period_frag + + mgr->granularity); + return hw_sample_count; +} + +static void pcxhr_update_timer_pos(struct pcxhr_mgr *mgr, + struct pcxhr_stream *stream, + int samples_to_add) +{ + if (stream->substream && + (stream->status == PCXHR_STREAM_STATUS_RUNNING)) { + u_int64_t new_sample_count; + int elapsed = 0; + int hardware_read = 0; + struct snd_pcm_runtime *runtime = stream->substream->runtime; + + if (samples_to_add < 0) { + stream->timer_is_synced = 0; + /* add default if no hardware_read possible */ + samples_to_add = mgr->granularity; + } + + if (!stream->timer_is_synced) { + if ((stream->timer_abs_periods != 0) || + ((stream->timer_period_frag + samples_to_add) >= + runtime->period_size)) { + new_sample_count = + pcxhr_stream_read_position(mgr, stream); + hardware_read = 1; + if (new_sample_count >= mgr->granularity) { + /* sub security offset because of + * jitter and finer granularity of + * dsp time (MBOX4) + */ + new_sample_count -= mgr->granularity; + stream->timer_is_synced = 1; + } + } + } + if (!hardware_read) { + /* if we didn't try to sync the position, increment it + * by PCXHR_GRANULARITY every timer interrupt + */ + new_sample_count = stream->timer_abs_periods + + stream->timer_period_frag + samples_to_add; + } + while (1) { + u_int64_t new_elapse_pos = stream->timer_abs_periods + + runtime->period_size; + if (new_elapse_pos > new_sample_count) + break; + elapsed = 1; + stream->timer_buf_periods++; + if (stream->timer_buf_periods >= runtime->periods) + stream->timer_buf_periods = 0; + stream->timer_abs_periods = new_elapse_pos; + } + if (new_sample_count >= stream->timer_abs_periods) { + stream->timer_period_frag = + (u_int32_t)(new_sample_count - + stream->timer_abs_periods); + } else { + dev_err(&mgr->pci->dev, + "ERROR new_sample_count too small ??? %ld\n", + (long unsigned int)new_sample_count); + } + + if (elapsed) { + mutex_unlock(&mgr->lock); + snd_pcm_period_elapsed(stream->substream); + mutex_lock(&mgr->lock); + } + } +} + +irqreturn_t pcxhr_interrupt(int irq, void *dev_id) +{ + struct pcxhr_mgr *mgr = dev_id; + unsigned int reg = 0; + unsigned int tmp; + bool wake_thread = false; + + mgr->dbg_cpt.interrupts_all++; + + //*************************ATTENTION*************************// +// mgr->dbg_cpt.interrupts_all++; +// mgr->dbg_cpt.interrupts_none++; + /* this device did not cause the interrupt */ +// return IRQ_NONE; +// return IRQ_HANDLED; + //*************************ATTENTION*************************// + + + //mgr->dbg_cpt.interrupts_all++; + + if (irq) { + reg = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_IRQCS); + if (! (reg & PCXHR_IRQCS_ACTIVE_PCIDB)) { + mgr->dbg_cpt.interrupts_none++; + /* this device did not cause the interrupt */ + return IRQ_NONE; + } + } + else { + mgr->hr_timer_calls++; + } + /* clear interrupt */ + reg = 0; + tmp = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); + do { + PCXHR_OUTPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB, tmp); + reg |= tmp; + tmp = PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_L2PCIDB); + } while ( tmp != 0 ); + + if ((reg & (PCXHR_IRQ_TIMER | PCXHR_IRQ_MASK)) == 0) { + mgr->dbg_cpt.interrupts_dummy++; + } + /* timer irq occurred */ + if (reg & PCXHR_IRQ_TIMER) { + int timer_toggle = reg & PCXHR_IRQ_TIMER; + if (timer_toggle == mgr->timer_toggle) { + dev_dbg(&mgr->pci->dev, "ERROR TIMER TOGGLE\n"); + mgr->dsp_time_err++; + } + + mgr->timer_toggle = timer_toggle; + mgr->src_it_dsp = reg; + wake_thread = true; + } + + /* other irq's handled in the thread */ + if (reg & PCXHR_IRQ_MASK) { + if (reg & PCXHR_IRQ_ASYNC) { + /* as we didn't request any async notifications, + * some kind of xrun error will probably occurred + */ + /* better resynchronize all streams next interrupt : */ + mgr->dsp_time_last = PCXHR_DSP_TIME_INVALID; + } + mgr->src_it_dsp = reg; + wake_thread = true; + } +#ifdef CONFIG_SND_DEBUG_VERBOSE + if (reg & PCXHR_FATAL_DSP_ERR) + dev_dbg(&mgr->pci->dev, "FATAL DSP ERROR : %x\n", reg); +#endif + + return wake_thread ? IRQ_WAKE_THREAD : IRQ_HANDLED; +} + +irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id) +{ + struct pcxhr_mgr *mgr = dev_id; + int i, j; + struct snd_pcxhr *chip; + + mutex_lock(&mgr->lock); + if (mgr->src_it_dsp & PCXHR_IRQ_TIMER) { + /* is a 24 bit counter */ + int dsp_time_new = + PCXHR_INPL(mgr, PCXHR_PLX, PCXHR_PLX_MBOX4) & PCXHR_DSP_TIME_MASK; + int dsp_time_diff = dsp_time_new - mgr->dsp_time_last; + + if ((dsp_time_diff < 0) && + (mgr->dsp_time_last != PCXHR_DSP_TIME_INVALID)) { + /* handle dsp counter wraparound without resync */ + int tmp_diff = dsp_time_diff + PCXHR_DSP_TIME_MASK + 1; + dev_dbg(&mgr->pci->dev, + "WARNING DSP timestamp old(%d) new(%d)", + mgr->dsp_time_last, dsp_time_new); + if (tmp_diff > 0 && tmp_diff <= (2*mgr->granularity)) { + dev_dbg(&mgr->pci->dev, + "-> timestamp wraparound OK: " + "diff=%d\n", tmp_diff); + dsp_time_diff = tmp_diff; + } else { + dev_dbg(&mgr->pci->dev, + "-> resynchronize all streams\n"); + mgr->dsp_time_err++; + } + } +#ifdef CONFIG_SND_DEBUG_VERBOSE + if (dsp_time_diff == 0) + dev_dbg(&mgr->pci->dev, + "ERROR DSP TIME NO DIFF time(%d)\n", + dsp_time_new); + else if (dsp_time_diff >= (2*mgr->granularity)) + dev_dbg(&mgr->pci->dev, + "ERROR DSP TIME TOO BIG old(%d) add(%d)\n", + mgr->dsp_time_last, + dsp_time_new - mgr->dsp_time_last); + else if (dsp_time_diff % mgr->granularity) + dev_dbg(&mgr->pci->dev, + "ERROR DSP TIME increased by %d\n", + dsp_time_diff); +#endif + mgr->dsp_time_last = dsp_time_new; + + for (i = 0; i < mgr->num_cards; i++) { + chip = mgr->chip[i]; + for (j = 0; j < chip->nb_streams_capt; j++) + pcxhr_update_timer_pos(mgr, + &chip->capture_stream[j], + dsp_time_diff); + } + for (i = 0; i < mgr->num_cards; i++) { + chip = mgr->chip[i]; + for (j = 0; j < chip->nb_streams_play; j++) + pcxhr_update_timer_pos(mgr, + &chip->playback_stream[j], + dsp_time_diff); + } + } + + pcxhr_msg_thread(mgr); + mutex_unlock(&mgr->lock); + return IRQ_HANDLED; +} diff --git a/snd-pcxhr/src/pcxhr_core.h b/snd-pcxhr/src/pcxhr_core.h new file mode 100644 index 0000000..c0ec553 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_core.h @@ -0,0 +1,245 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Digigram pcxhr compatible soundcards + * + * low level interface with interrupt and message handling + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef __SOUND_PCXHR_CORE_H +#define __SOUND_PCXHR_CORE_H + +struct firmware; +struct pcxhr_mgr; + +/* init and firmware download commands */ +void pcxhr_reset_xilinx_com(struct pcxhr_mgr *mgr); +void pcxhr_reset_dsp(struct pcxhr_mgr *mgr); +void pcxhr_enable_dsp(struct pcxhr_mgr *mgr); +int pcxhr_load_xilinx_binary(struct pcxhr_mgr *mgr, const struct firmware *xilinx, int second); +int pcxhr_load_eeprom_binary(struct pcxhr_mgr *mgr, const struct firmware *eeprom); +int pcxhr_load_boot_binary(struct pcxhr_mgr *mgr, const struct firmware *boot); +int pcxhr_load_dsp_binary(struct pcxhr_mgr *mgr, const struct firmware *dsp); + +/* DSP time available on MailBox4 register : 24 bit time samples() */ +#define PCXHR_DSP_TIME_MASK 0x00ffffff +#define PCXHR_DSP_TIME_INVALID 0x10000000 + + +#define PCXHR_SIZE_MAX_CMD 8 +#define PCXHR_SIZE_MAX_STATUS 16 +#define PCXHR_SIZE_MAX_LONG_STATUS 256 + +struct pcxhr_rmh { + u16 cmd_len; /* length of the command to send (WORDs) */ + u16 stat_len; /* length of the status received (WORDs) */ + u16 dsp_stat; /* status type, RMP_SSIZE_XXX */ + u16 cmd_idx; /* index of the command */ + u32 cmd[PCXHR_SIZE_MAX_CMD]; + u32 stat[PCXHR_SIZE_MAX_STATUS]; +}; + +enum { + CMD_VERSION, /* cmd_len = 2 stat_len = 1 */ + CMD_SUPPORTED, /* cmd_len = 1 stat_len = 4 */ + CMD_TEST_IT, /* cmd_len = 1 stat_len = 1 */ + CMD_SEND_IRQA, /* cmd_len = 1 stat_len = 0 */ + CMD_ACCESS_IO_WRITE, /* cmd_len >= 1 stat_len >= 1 */ + CMD_ACCESS_IO_READ, /* cmd_len >= 1 stat_len >= 1 */ + CMD_ASYNC, /* cmd_len = 1 stat_len = 1 */ + CMD_MODIFY_CLOCK, /* cmd_len = 3 stat_len = 0 */ + CMD_RESYNC_AUDIO_INPUTS, /* cmd_len = 1 stat_len = 0 */ + CMD_GET_DSP_RESOURCES, /* cmd_len = 1 stat_len = 4 */ + CMD_SET_TIMER_INTERRUPT, /* cmd_len = 1 stat_len = 0 */ + CMD_RES_PIPE, /* cmd_len >=2 stat_len = 0 */ + CMD_FREE_PIPE, /* cmd_len = 1 stat_len = 0 */ + CMD_CONF_PIPE, /* cmd_len = 2 stat_len = 0 */ + CMD_STOP_PIPE, /* cmd_len = 1 stat_len = 0 */ + CMD_PIPE_SAMPLE_COUNT, /* cmd_len = 2 stat_len = 2 */ + CMD_CAN_START_PIPE, /* cmd_len >= 1 stat_len = 1 */ + CMD_START_STREAM, /* cmd_len = 2 stat_len = 0 */ + CMD_STREAM_OUT_LEVEL_ADJUST, /* cmd_len >= 1 stat_len = 0 */ + CMD_STOP_STREAM, /* cmd_len = 2 stat_len = 0 */ + CMD_UPDATE_R_BUFFERS, /* cmd_len = 4 stat_len = 0 */ + CMD_FORMAT_STREAM_OUT, /* cmd_len >= 2 stat_len = 0 */ + CMD_FORMAT_STREAM_IN, /* cmd_len >= 4 stat_len = 0 */ + CMD_STREAM_SAMPLE_COUNT, /* cmd_len = 2 stat_len = (2 * nb_stream) */ + CMD_AUDIO_LEVEL_ADJUST, /* cmd_len = 3 stat_len = 0 */ + CMD_GET_TIME_CODE, /* cmd_len = 1 stat_len = 5 */ + CMD_MANAGE_SIGNAL, /* cmd_len = 1 stat_len = 0 */ + CMD_LAST_INDEX +}; + +#define MASK_DSP_WORD 0x00ffffff +#define MASK_ALL_STREAM 0x00ffffff +#define MASK_DSP_WORD_LEVEL 0x000001ff +#define MASK_FIRST_FIELD 0x0000001f +#define FIELD_SIZE 5 + +/* + init the rmh struct; by default cmd_len is set to 1 + */ +void pcxhr_init_rmh(struct pcxhr_rmh *rmh, int cmd); + +void pcxhr_set_pipe_cmd_params(struct pcxhr_rmh* rmh, int capture, unsigned int param1, + unsigned int param2, unsigned int param3); + +#define DSP_EXT_CMD_SET(x) (x->dsp_version > 0x012800) + +/* + send the rmh + */ +int pcxhr_send_msg(struct pcxhr_mgr *mgr, struct pcxhr_rmh *rmh); + + +/* values used for CMD_ACCESS_IO_WRITE and CMD_ACCESS_IO_READ */ +#define IO_NUM_REG_CONT 0 +#define IO_NUM_REG_GENCLK 1 +#define IO_NUM_REG_MUTE_OUT 2 +#define IO_NUM_SPEED_RATIO 4 +#define IO_NUM_REG_STATUS 5 +#define IO_NUM_REG_CUER 10 +#define IO_NUM_UER_CHIP_REG 11 +#define IO_NUM_REG_CONFIG_SRC 12 +#define IO_NUM_REG_OUT_ANA_LEVEL 20 +#define IO_NUM_REG_IN_ANA_LEVEL 21 + +#define REG_CONT_VALSMPTE 0x000800 +#define REG_CONT_UNMUTE_INPUTS 0x020000 + +/* parameters used with register IO_NUM_REG_STATUS */ +#define REG_STATUS_OPTIONS 0 +#define REG_STATUS_AES_SYNC 8 +#define REG_STATUS_AES_1 9 +#define REG_STATUS_AES_2 10 +#define REG_STATUS_AES_3 11 +#define REG_STATUS_AES_4 12 +#define REG_STATUS_WORD_CLOCK 13 +#define REG_STATUS_INTER_SYNC 14 +#define REG_STATUS_CURRENT 0x80 +/* results */ +#define REG_STATUS_OPT_NO_VIDEO_SIGNAL 0x01 +#define REG_STATUS_OPT_DAUGHTER_MASK 0x1c +#define REG_STATUS_OPT_ANALOG_BOARD 0x00 +#define REG_STATUS_OPT_NO_DAUGHTER 0x1c +#define REG_STATUS_OPT_COMPANION_MASK 0xe0 +#define REG_STATUS_OPT_NO_COMPANION 0xe0 +#define REG_STATUS_SYNC_32000 0x00 +#define REG_STATUS_SYNC_44100 0x01 +#define REG_STATUS_SYNC_48000 0x02 +#define REG_STATUS_SYNC_64000 0x03 +#define REG_STATUS_SYNC_88200 0x04 +#define REG_STATUS_SYNC_96000 0x05 +#define REG_STATUS_SYNC_128000 0x06 +#define REG_STATUS_SYNC_176400 0x07 +#define REG_STATUS_SYNC_192000 0x08 + +int pcxhr_set_pipe_state(struct pcxhr_mgr *mgr, int playback_mask, int capture_mask, int start); + +int pcxhr_write_io_num_reg_cont(struct pcxhr_mgr *mgr, unsigned int mask, + unsigned int value, int *changed); + +/* codec parameters */ +#define CS8416_RUN 0x200401 +#define CS8416_FORMAT_DETECT 0x200b00 +#define CS8416_CSB0 0x201900 +#define CS8416_CSB1 0x201a00 +#define CS8416_CSB2 0x201b00 +#define CS8416_CSB3 0x201c00 +#define CS8416_CSB4 0x201d00 +#define CS8416_VERSION 0x207f00 + +#define CS8420_DATA_FLOW_CTL 0x200301 +#define CS8420_CLOCK_SRC_CTL 0x200401 +#define CS8420_RECEIVER_ERRORS 0x201000 +#define CS8420_SRC_RATIO 0x201e00 +#define CS8420_CSB0 0x202000 +#define CS8420_CSB1 0x202100 +#define CS8420_CSB2 0x202200 +#define CS8420_CSB3 0x202300 +#define CS8420_CSB4 0x202400 +#define CS8420_VERSION 0x207f00 + +#define CS4271_MODE_CTL_1 0x200101 +#define CS4271_DAC_CTL 0x200201 +#define CS4271_VOLMIX 0x200301 +#define CS4271_VOLMUTE_LEFT 0x200401 +#define CS4271_VOLMUTE_RIGHT 0x200501 +#define CS4271_ADC_CTL 0x200601 +#define CS4271_MODE_CTL_2 0x200701 + +#define CHIP_SIG_AND_MAP_SPI 0xff7f00 + +/* codec selection */ +#define CS4271_01_CS 0x160018 +#define CS4271_23_CS 0x160019 +#define CS4271_45_CS 0x16001a +#define CS4271_67_CS 0x16001b +#define CS4271_89_CS 0x16001c +#define CS4271_AB_CS 0x16001d +#define CS8420_01_CS 0x080090 +#define CS8420_23_CS 0x080092 +#define CS8420_45_CS 0x080094 +#define CS8420_67_CS 0x080096 +#define CS8416_01_CS 0x080098 + + +/* interrupt handling */ +irqreturn_t pcxhr_interrupt(int irq, void *dev_id); +irqreturn_t pcxhr_threaded_irq(int irq, void *dev_id); + + +/* access to the card */ +#define PCXHR_PLX 1 +#define PCXHR_DSP 2 + +//below hook in order to be able to dump register in pcxhr.c in /proc/asound/ file +/* registers used on the PLX (port 1), use PCXHR_PLX as bar */ +#define PCXHR_PLX_MBOX0 0x40 +#define PCXHR_PLX_MBOX1 0x44 +#define PCXHR_PLX_MBOX2 0x48 +#define PCXHR_PLX_MBOX3 0x4C +#define PCXHR_PLX_MBOX4 0x50 +#define PCXHR_PLX_MBOX5 0x54 +#define PCXHR_PLX_MBOX6 0x58 +#define PCXHR_PLX_MBOX7 0x5C +#define PCXHR_PLX_L2PCIDB 0x64 +#define PCXHR_PLX_IRQCS 0x68 +#define PCXHR_PLX_CHIPSC 0x6C + +/* registers used on the DSP (port 2), use PCXHR_DSP as bar */ +/* attention : access the PCXHR_DSP_* registers with inb and outb only ! */ +#define PCXHR_DSP_ICR 0x00 +#define PCXHR_DSP_CVR 0x04 +#define PCXHR_DSP_ISR 0x08 +#define PCXHR_DSP_IVR 0x0C +#define PCXHR_DSP_RXH 0x14 +#define PCXHR_DSP_TXH 0x14 +#define PCXHR_DSP_RXM 0x18 +#define PCXHR_DSP_TXM 0x18 +#define PCXHR_DSP_RXL 0x1C +#define PCXHR_DSP_TXL 0x1C +#define PCXHR_DSP_RESET 0x20 + +/* registers used on the DSP and Xilinx (port 2), use PCXHR_DSP as bar : HR stereo cards only */ +/* attention : byte access only, with inb and outb ! */ +//#define PCXHR_DSP_RESET 0x20 +#define PCXHR_XLX_CFG 0x24 +#define PCXHR_XLX_RUER 0x28 +#define PCXHR_XLX_DATA 0x2C +#define PCXHR_XLX_STATUS 0x30 +#define PCXHR_XLX_LOFREQ 0x34 +#define PCXHR_XLX_HIFREQ 0x38 +#define PCXHR_XLX_CSUER 0x3C +#define PCXHR_XLX_SELMIC 0x40 +#define PCXHR_XLX_MUTEIN 0x7C + +#define GET_ADDR(mgr, bar,x) ( ( bar == PCXHR_PLX ) ? ((mgr)->port[PCXHR_PLX] + (x) ):((mgr)->port[PCXHR_DSP] + (x) + mgr->dsp_reg_offset) ) + +#define PCXHR_INPB(mgr,bar,x) inb( GET_ADDR(mgr, bar, x)) +#define PCXHR_INPL(mgr,bar,x) inl( GET_ADDR(mgr, bar, x)) +#define PCXHR_OUTPB(mgr,bar,x,data) outb( (data), GET_ADDR(mgr, bar, x) ) +#define PCXHR_OUTPL(mgr,bar,x,data) outl( (data), GET_ADDR(mgr, bar, x) ) + +#endif /* __SOUND_PCXHR_CORE_H */ diff --git a/snd-pcxhr/src/pcxhr_hrtimer.c b/snd-pcxhr/src/pcxhr_hrtimer.c new file mode 100644 index 0000000..4ccc1bf --- /dev/null +++ b/snd-pcxhr/src/pcxhr_hrtimer.c @@ -0,0 +1,65 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * Copyright (c) 2004 by Digigram + */ + + +#include "pcxhr_hrtimer.h" + +void pcxhr_hr_timer_tasklet(unsigned long data) +{ + pcxhr_interrupt(0, (void*)data); +} + +enum hrtimer_restart pcxhr_hr_timer_callback(struct hrtimer* hr_timer) +{ + struct pcxhr_mgr *mgr; + + mgr = container_of(hr_timer, struct pcxhr_mgr, hr_timer); + if (!atomic_read(&mgr->hr_timer_running)) + return HRTIMER_NORESTART; + tasklet_schedule(&mgr->hr_timer_tasklet); + hrtimer_forward_now(hr_timer, mgr->hr_timer_period_time); + return HRTIMER_RESTART; +} + + +void pcxhr_hr_timer_trig(struct pcxhr_mgr *mgr, int start, unsigned int rate) { + if (start) + { + unsigned int period = mgr->granularity/2; + long sec; + unsigned long nsecs; + + sec = period/rate; + period %= rate; + nsecs = div_u64((u64)period * 1000000000UL + rate - 1, rate); + + tasklet_kill(&mgr->hr_timer_tasklet); // Make sure the tasklet is not running. + mgr->hr_timer_period_time = ktime_set(sec, nsecs); + atomic_set(&mgr->hr_timer_running, 1); + hrtimer_start(&mgr->hr_timer, mgr->hr_timer_period_time, HRTIMER_MODE_REL); + } + else + { + atomic_set(&mgr->hr_timer_running, 0); + hrtimer_cancel(&mgr->hr_timer); + } + +} + + +void pcxhr_hr_timer_init(struct pcxhr_mgr *mgr) { + hrtimer_init( &mgr->hr_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL ); + mgr->hr_timer.function = pcxhr_hr_timer_callback; + atomic_set(&mgr->hr_timer_running, 0); + tasklet_init(&mgr->hr_timer_tasklet, pcxhr_hr_timer_tasklet, + (unsigned long)mgr); + +} + +void pcxhr_hr_timer_kill(struct pcxhr_mgr *mgr) { + tasklet_kill(&mgr->hr_timer_tasklet); +} diff --git a/snd-pcxhr/src/pcxhr_hrtimer.h b/snd-pcxhr/src/pcxhr_hrtimer.h new file mode 100644 index 0000000..b54d864 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_hrtimer.h @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef PCXHR_PCX_HRTIMER_H_ +#define PCXHR_PCX_HRTIMER_H_ + +#include +#include "pcxhr.h" +#include "pcxhr_core.h" + +/* interrupt handling */ +enum hrtimer_restart pcxhr_hr_timer_callback(struct hrtimer* hr_timer); + +void pcxhr_hr_timer_tasklet(unsigned long data); +void pcxhr_hr_timer_trig(struct pcxhr_mgr *mgr, int start, unsigned int rate); +void pcxhr_hr_timer_init(struct pcxhr_mgr *mgr); +void pcxhr_hr_timer_kill(struct pcxhr_mgr *mgr); + +#endif /* PCXHR_PCX_HRTIMER_H_ */ diff --git a/snd-pcxhr/src/pcxhr_hwdep.c b/snd-pcxhr/src/pcxhr_hwdep.c new file mode 100644 index 0000000..da67207 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_hwdep.c @@ -0,0 +1,429 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * hwdep device manager + * + * Copyright (c) 2004 by Digigram + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "pcxhr.h" +#include "pcxhr_mixer.h" +#include "pcxhr_hwdep.h" +#include "pcxhr_core.h" +#include "pcxhr_mix22.h" + + +static int pcxhr_sub_init(struct pcxhr_mgr *mgr); +/* + * get basic information and init pcxhr card + */ +static int pcxhr_init_board(struct pcxhr_mgr *mgr) +{ + int err; + struct pcxhr_rmh rmh; + int card_streams; + + /* calc the number of all streams used */ + if (mgr->mono_capture) + card_streams = mgr->capture_chips * 2; + else + card_streams = mgr->capture_chips; + card_streams += mgr->playback_chips * PCXHR_PLAYBACK_STREAMS; + + /* enable interrupts */ + pcxhr_enable_dsp(mgr); + + pcxhr_init_rmh(&rmh, CMD_SUPPORTED); + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + /* test 4, 8 or 12 phys out */ + if ((rmh.stat[0] & MASK_FIRST_FIELD) < mgr->playback_chips * 2) + return -EINVAL; + /* test 4, 8 or 2 phys in */ + if (((rmh.stat[0] >> (2 * FIELD_SIZE)) & MASK_FIRST_FIELD) < + mgr->capture_chips * 2) + return -EINVAL; + /* test max nb substream per board */ + if ((rmh.stat[1] & 0x5F) < card_streams) + return -EINVAL; + /* test max nb substream per pipe */ + if (((rmh.stat[1] >> 7) & 0x5F) < PCXHR_PLAYBACK_STREAMS) + return -EINVAL; + dev_dbg(&mgr->pci->dev, + "supported formats : playback=%x capture=%x\n", + rmh.stat[2], rmh.stat[3]); + + pcxhr_init_rmh(&rmh, CMD_VERSION); + /* firmware num for DSP */ + rmh.cmd[0] |= mgr->firmware_num; + /* transfer granularity in samples (should be multiple of 48) */ + rmh.cmd[1] = (1<<23) + mgr->granularity; + rmh.cmd_len = 2; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + dev_dbg(&mgr->pci->dev, + "PCXHR DSP version is %d.%d.%d\n", (rmh.stat[0]>>16)&0xff, + (rmh.stat[0]>>8)&0xff, rmh.stat[0]&0xff); + mgr->dsp_version = rmh.stat[0]; + + if (mgr->is_hr_stereo) + err = hr222_sub_init(mgr); + else + err = pcxhr_sub_init(mgr); + return err; +} + +static int pcxhr_sub_init(struct pcxhr_mgr *mgr) +{ + int err; + struct pcxhr_rmh rmh; + + /* get options */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); + rmh.cmd[0] |= IO_NUM_REG_STATUS; + rmh.cmd[1] = REG_STATUS_OPTIONS; + rmh.cmd_len = 2; + err = pcxhr_send_msg(mgr, &rmh); + if (err) + return err; + + if ((rmh.stat[1] & REG_STATUS_OPT_DAUGHTER_MASK) == + REG_STATUS_OPT_ANALOG_BOARD) + mgr->board_has_analog = 1; /* analog addon board found */ + + /* unmute inputs */ + err = pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS, + REG_CONT_UNMUTE_INPUTS, NULL); + if (err) + return err; + /* unmute outputs (a write to IO_NUM_REG_MUTE_OUT mutes!) */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); + rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; + if (DSP_EXT_CMD_SET(mgr)) { + rmh.cmd[1] = 1; /* unmute digital plugs */ + rmh.cmd_len = 2; + } + err = pcxhr_send_msg(mgr, &rmh); + return err; +} + +void pcxhr_reset_board(struct pcxhr_mgr *mgr) +{ + struct pcxhr_rmh rmh; + + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_MAIN_INDEX)) { + /* mute outputs */ + if (!mgr->is_hr_stereo) { + /* a read to IO_NUM_REG_MUTE_OUT register unmutes! */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd[0] |= IO_NUM_REG_MUTE_OUT; + pcxhr_send_msg(mgr, &rmh); + /* mute inputs */ + pcxhr_write_io_num_reg_cont(mgr, REG_CONT_UNMUTE_INPUTS, + 0, NULL); + } + /* stereo cards mute with reset of dsp */ + } + /* reset pcxhr dsp */ + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_DSP_EPRM_INDEX)) + pcxhr_reset_dsp(mgr); + /* reset second xilinx */ + if (mgr->dsp_loaded & (1 << PCXHR_FIRMWARE_XLX_COM_INDEX)) { + pcxhr_reset_xilinx_com(mgr); + mgr->dsp_loaded = 1; + } + return; +} + + +/* + * allocate a playback/capture pipe (pcmp0/pcmc0) + */ +static int pcxhr_dsp_allocate_pipe(struct pcxhr_mgr *mgr, + struct pcxhr_pipe *pipe, + int is_capture, int pin) +{ + int stream_count, audio_count; + int err; + struct pcxhr_rmh rmh; + + if (is_capture) { + stream_count = 1; + if (mgr->mono_capture) + audio_count = 1; + else + audio_count = 2; + } else { + stream_count = PCXHR_PLAYBACK_STREAMS; + audio_count = 2; /* always stereo */ + } + dev_dbg(&mgr->pci->dev, "snd_add_ref_pipe pin(%d) pcm%c0\n", + pin, is_capture ? 'c' : 'p'); + pipe->is_capture = is_capture; + pipe->first_audio = pin; + /* define pipe (P_PCM_ONLY_MASK (0x020000) is not necessary) */ + pcxhr_init_rmh(&rmh, CMD_RES_PIPE); + pcxhr_set_pipe_cmd_params(&rmh, is_capture, pin, + audio_count, stream_count); + rmh.cmd[1] |= 0x020000; /* add P_PCM_ONLY_MASK */ + if (DSP_EXT_CMD_SET(mgr)) { + /* add channel mask to command */ + rmh.cmd[rmh.cmd_len++] = (audio_count == 1) ? 0x01 : 0x03; + } + err = pcxhr_send_msg(mgr, &rmh); + if (err < 0) { + dev_err(&mgr->pci->dev, "error pipe allocation " + "(CMD_RES_PIPE) err=%x!\n", err); + return err; + } + pipe->status = PCXHR_PIPE_DEFINED; + + return 0; +} + +/* + * free playback/capture pipe (pcmp0/pcmc0) + */ +#if 0 +static int pcxhr_dsp_free_pipe( struct pcxhr_mgr *mgr, struct pcxhr_pipe *pipe) +{ + struct pcxhr_rmh rmh; + int capture_mask = 0; + int playback_mask = 0; + int err = 0; + + if (pipe->is_capture) + capture_mask = (1 << pipe->first_audio); + else + playback_mask = (1 << pipe->first_audio); + + /* stop one pipe */ + err = pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 0); + if (err < 0) + dev_err(&mgr->pci->dev, "error stopping pipe!\n"); + /* release the pipe */ + pcxhr_init_rmh(&rmh, CMD_FREE_PIPE); + pcxhr_set_pipe_cmd_params(&rmh, pipe->is_capture, pipe->first_audio, + 0, 0); + err = pcxhr_send_msg(mgr, &rmh); + if (err < 0) + dev_err(&mgr->pci->dev, "error pipe release " + "(CMD_FREE_PIPE) err(%x)\n", err); + pipe->status = PCXHR_PIPE_UNDEFINED; + return err; +} +#endif + + +static int pcxhr_config_pipes(struct pcxhr_mgr *mgr) +{ + int err, i, j; + struct snd_pcxhr *chip; + struct pcxhr_pipe *pipe; + + /* allocate the pipes on the dsp */ + for (i = 0; i < mgr->num_cards; i++) { + chip = mgr->chip[i]; + if (chip->nb_streams_play) { + pipe = &chip->playback_pipe; + err = pcxhr_dsp_allocate_pipe( mgr, pipe, 0, i*2); + if (err) + return err; + for(j = 0; j < chip->nb_streams_play; j++) + chip->playback_stream[j].pipe = pipe; + } + for (j = 0; j < chip->nb_streams_capt; j++) { + pipe = &chip->capture_pipe[j]; + err = pcxhr_dsp_allocate_pipe(mgr, pipe, 1, i*2 + j); + if (err) + return err; + chip->capture_stream[j].pipe = pipe; + } + } + return 0; +} + +static int pcxhr_start_pipes(struct pcxhr_mgr *mgr) +{ + int i, j; + struct snd_pcxhr *chip; + int playback_mask = 0; + int capture_mask = 0; + + /* start all the pipes on the dsp */ + for (i = 0; i < mgr->num_cards; i++) { + chip = mgr->chip[i]; + if (chip->nb_streams_play) + playback_mask |= 1 << chip->playback_pipe.first_audio; + for (j = 0; j < chip->nb_streams_capt; j++) + capture_mask |= 1 << chip->capture_pipe[j].first_audio; + } + return pcxhr_set_pipe_state(mgr, playback_mask, capture_mask, 1); +} + + +static int pcxhr_dsp_load(struct pcxhr_mgr *mgr, int index, + const struct firmware *dsp) +{ + int err, card_index; + + dev_dbg(&mgr->pci->dev, + "loading dsp [%d] size = %zd\n", index, dsp->size); + + switch (index) { + case PCXHR_FIRMWARE_XLX_INT_INDEX: + pcxhr_reset_xilinx_com(mgr); + return pcxhr_load_xilinx_binary(mgr, dsp, 0); + + case PCXHR_FIRMWARE_XLX_COM_INDEX: + pcxhr_reset_xilinx_com(mgr); + return pcxhr_load_xilinx_binary(mgr, dsp, 1); + + case PCXHR_FIRMWARE_DSP_EPRM_INDEX: + pcxhr_reset_dsp(mgr); + return pcxhr_load_eeprom_binary(mgr, dsp); + + case PCXHR_FIRMWARE_DSP_BOOT_INDEX: + return pcxhr_load_boot_binary(mgr, dsp); + + case PCXHR_FIRMWARE_DSP_MAIN_INDEX: + err = pcxhr_load_dsp_binary(mgr, dsp); + if (err) + return err; + break; /* continue with first init */ + default: + dev_err(&mgr->pci->dev, "wrong file index\n"); + return -EFAULT; + } /* end of switch file index*/ + + /* first communication with embedded */ + err = pcxhr_init_board(mgr); + if (err < 0) { + dev_err(&mgr->pci->dev, "pcxhr could not be set up\n"); + return err; + } + err = pcxhr_config_pipes(mgr); + if (err < 0) { + dev_err(&mgr->pci->dev, "pcxhr pipes could not be set up\n"); + return err; + } + /* create devices and mixer in accordance with HW options*/ + for (card_index = 0; card_index < mgr->num_cards; card_index++) { + struct snd_pcxhr *chip = mgr->chip[card_index]; + + err = pcxhr_create_pcm(chip); + if (err < 0) + return err; + + if (card_index == 0) { + err = pcxhr_create_mixer(chip->mgr); + if (err < 0) + return err; + } + err = snd_card_register(chip->card); + if (err < 0) + return err; + } + err = pcxhr_start_pipes(mgr); + if (err < 0) { + dev_err(&mgr->pci->dev, "pcxhr pipes could not be started\n"); + return err; + } + dev_dbg(&mgr->pci->dev, + "pcxhr firmware downloaded and successfully set up\n"); + + return 0; +} + +// Read: magic word + fpga version (32 bits access) +#define PCXHR_XLX_VERSION (0x70) + +static int get_xilinx_version(struct pcxhr_mgr *mgr){ + if (pcxhr_is_device_compatible_IE (mgr->pci->subsystem_device, PCXHR_DEVICE_IE5_ID)){ + int xlx_version = cpu_to_be32(PCXHR_INPL(mgr, PCXHR_DSP, PCXHR_XLX_VERSION)); + dev_err(&mgr->pci->dev, "Magic : %04x Version : %04x\n", xlx_version>>16, xlx_version&0x00ff); + } + return 0; +} + +/* + * fw loader entry + */ +int pcxhr_setup_firmware(struct pcxhr_mgr *mgr) +{ + static const char *fw_files[][5] = { + /* xilinx 1 xilinx 2 eeprom boot dsp */ + [0] = { "xlxint.dat", "xlxc882hr.dat", "dspe882.e56", "dspb882hr.b56", "dspd882.d56" }, + [1] = { "xlxint.dat", "xlxc882e.dat", "dspe882.e56", "dspb882e.b56", "dspd882.d56" }, + [2] = { "xlxint.dat", "xlxc1222hr.dat", "dspe882.e56", "dspb1222hr.b56", "dspd1222.d56" }, + [3] = { "xlxint.dat", "xlxc1222e.dat", "dspe882.e56", "dspb1222e.b56", "dspd1222.d56" }, + [4] = { NULL, "xlxc222.dat", "dspe924.e56", "dspb924.b56", "dspd222.d56" }, + [5] = { NULL, "xlxc924.dat", "dspe924.e56", "dspb924.b56", "dspd222.d56" }, + [6] = { NULL, NULL, "dspe924e5.e56", "dspb924.b56", "dspd222.d56" }, + [7] = { NULL, NULL, "dspe924e5.e56", "dspb924.b56", "dspd222.d56" }, + }; + char path[32]; + + const struct firmware *fw_entry; + int i, err; + int fw_set = mgr->fw_file_set; + + get_xilinx_version(mgr); + + for (i = 0; i < 5; i++) { + if (!fw_files[fw_set][i]) { + if( ((fw_set == 6) ||(fw_set == 7)) && (i==1)) { + pcxhr_reset_xilinx_com(mgr); + mdelay(1000); + } + continue; + } + sprintf(path, "pcxhr/%s", fw_files[fw_set][i]); + if (request_firmware(&fw_entry, path, &mgr->pci->dev)) { + dev_err(&mgr->pci->dev, + "pcxhr: can't load firmware %s\n", + path); + return -ENOENT; + } + /* fake hwdep dsp record */ + err = pcxhr_dsp_load(mgr, i, fw_entry); + release_firmware(fw_entry); + if (err < 0) + return err; + mgr->dsp_loaded |= 1 << i; + } + return 0; +} + +MODULE_FIRMWARE("pcxhr/xlxint.dat"); +MODULE_FIRMWARE("pcxhr/xlxc882hr.dat"); +MODULE_FIRMWARE("pcxhr/xlxc882e.dat"); +MODULE_FIRMWARE("pcxhr/dspe882.e56"); +MODULE_FIRMWARE("pcxhr/dspb882hr.b56"); +MODULE_FIRMWARE("pcxhr/dspb882e.b56"); +MODULE_FIRMWARE("pcxhr/dspd882.d56"); + +MODULE_FIRMWARE("pcxhr/xlxc1222hr.dat"); +MODULE_FIRMWARE("pcxhr/xlxc1222e.dat"); +MODULE_FIRMWARE("pcxhr/dspb1222hr.b56"); +MODULE_FIRMWARE("pcxhr/dspb1222e.b56"); +MODULE_FIRMWARE("pcxhr/dspd1222.d56"); + +MODULE_FIRMWARE("pcxhr/xlxc222.dat"); +MODULE_FIRMWARE("pcxhr/xlxc924.dat"); +MODULE_FIRMWARE("pcxhr/dspe924.e56"); +MODULE_FIRMWARE("pcxhr/dspe924e5.e56"); +MODULE_FIRMWARE("pcxhr/dspb924.b56"); +MODULE_FIRMWARE("pcxhr/dspd222.d56"); diff --git a/snd-pcxhr/src/pcxhr_hwdep.h b/snd-pcxhr/src/pcxhr_hwdep.h new file mode 100644 index 0000000..f7a440e --- /dev/null +++ b/snd-pcxhr/src/pcxhr_hwdep.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Digigram pcxhr compatible soundcards + * + * definitions and makros for basic card access + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef __SOUND_PCXHR_HWDEP_H +#define __SOUND_PCXHR_HWDEP_H + + +/* firmware status codes */ +#define PCXHR_FIRMWARE_XLX_INT_INDEX 0 +#define PCXHR_FIRMWARE_XLX_COM_INDEX 1 +#define PCXHR_FIRMWARE_DSP_EPRM_INDEX 2 +#define PCXHR_FIRMWARE_DSP_BOOT_INDEX 3 +#define PCXHR_FIRMWARE_DSP_MAIN_INDEX 4 +#define PCXHR_FIRMWARE_FILES_MAX_INDEX 5 + + +/* exported */ +int pcxhr_setup_firmware(struct pcxhr_mgr *mgr); +void pcxhr_reset_board(struct pcxhr_mgr *mgr); + +#endif /* __SOUND_PCXHR_HWDEP_H */ diff --git a/snd-pcxhr/src/pcxhr_mix22.c b/snd-pcxhr/src/pcxhr_mix22.c new file mode 100644 index 0000000..57972ff --- /dev/null +++ b/snd-pcxhr/src/pcxhr_mix22.c @@ -0,0 +1,1064 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for Digigram pcxhr compatible soundcards + * + * mixer interface for stereo cards + * + * Copyright (c) 2004 by Digigram + */ + +#include +#include +#include +#include +#include +#include +#include +#include "pcxhr.h" +#include "pcxhr_core.h" +#include "pcxhr_mix22.h" + +/* values for PCHR_DSP_RESET register */ +#define PCXHR_DSP_RESET_DSP 0x01 +#define PCXHR_DSP_RESET_MUTE 0x02 +#define PCXHR_DSP_RESET_CODEC 0x08 +#define PCXHR_DSP_RESET_SMPTE 0x10 +#define PCXHR_DSP_RESET_GPO_OFFSET 5 +#define PCXHR_DSP_RESET_GPO_MASK 0x60 + +/* values for PCHR_XLX_CFG register */ +#define PCXHR_CFG_SYNCDSP_MASK 0x80 +#define PCXHR_CFG_DEPENDENCY_MASK 0x60 +#define PCXHR_CFG_INDEPENDANT_SEL 0x00 +#define PCXHR_CFG_MASTER_SEL 0x40 +#define PCXHR_CFG_SLAVE_SEL 0x20 +#define PCXHR_CFG_DATA_UER1_SEL_MASK 0x10 /* 0 (UER0), 1(UER1) */ +#define PCXHR_CFG_DATAIN_SEL_MASK 0x08 /* 0 (ana), 1 (UER) */ +#define PCXHR_CFG_SRC_MASK 0x04 /* 0 (Bypass), 1 (SRC Actif) */ +#define PCXHR_CFG_CLOCK_UER1_SEL_MASK 0x02 /* 0 (UER0), 1(UER1) */ +#define PCXHR_CFG_CLOCKIN_SEL_MASK 0x01 /* 0 (internal), 1 (AES/EBU) */ + +/* values for PCHR_XLX_DATA register */ +#define PCXHR_DATA_CODEC 0x80 +#define AKM_POWER_CONTROL_CMD 0xA007 +#define AKM_RESET_ON_CMD 0xA100 +#define AKM_RESET_OFF_CMD 0xA103 +#define AKM_CLOCK_INF_55K_CMD 0xA240 +#define AKM_CLOCK_SUP_55K_CMD 0xA24D +#define AKM_MUTE_CMD 0xA38D +#define AKM_UNMUTE_CMD 0xA30D +#define AKM_LEFT_LEVEL_CMD 0xA600 +#define AKM_RIGHT_LEVEL_CMD 0xA700 + +/* values for PCHR_XLX_STATUS register - READ */ +#define PCXHR_STAT_SRC_LOCK 0x01 +#define PCXHR_STAT_LEVEL_IN 0x02 +#define PCXHR_STAT_GPI_OFFSET 2 +#define PCXHR_STAT_GPI_MASK 0x0C +#define PCXHR_STAT_MIC_CAPS 0x10 +/* values for PCHR_XLX_STATUS register - WRITE */ +#define PCXHR_STAT_FREQ_SYNC_MASK 0x01 +#define PCXHR_STAT_FREQ_UER1_MASK 0x02 +#define PCXHR_STAT_FREQ_SAVE_MASK 0x80 + +/* values for PCHR_XLX_CSUER register */ +#define PCXHR_SUER1_BIT_U_READ_MASK 0x80 +#define PCXHR_SUER1_BIT_C_READ_MASK 0x40 +#define PCXHR_SUER1_DATA_PRESENT_MASK 0x20 +#define PCXHR_SUER1_CLOCK_PRESENT_MASK 0x10 +#define PCXHR_SUER_BIT_U_READ_MASK 0x08 +#define PCXHR_SUER_BIT_C_READ_MASK 0x04 +#define PCXHR_SUER_DATA_PRESENT_MASK 0x02 +#define PCXHR_SUER_CLOCK_PRESENT_MASK 0x01 + +#define PCXHR_SUER_BIT_U_WRITE_MASK 0x02 +#define PCXHR_SUER_BIT_C_WRITE_MASK 0x01 + +/* values for PCXHR_XLX_SELMIC register - WRITE */ +#define PCXHR_SELMIC_PREAMPLI_OFFSET 2 +#define PCXHR_SELMIC_PREAMPLI_MASK 0x0C +#define PCXHR_SELMIC_PHANTOM_ALIM 0x80 + +/* Values for PCXHR_XLX_MUTEIN register - WRITE */ +#define PCXHR_XLX_MUTEIN_CMD_ON 1 +#define PCXHR_XLX_MUTEIN_CMD_OFF 0 + +/* CODEC set in reset delay (in ms) */ +#define PCXHR_CODEC_RESET_TIME_MS_MS 5 +#define PCXHR_AKM_CODECS_SETTLING_TIME_MS 5 +#define PCXHR_XLX_PLL_SETTLING_TIME_MS 2 + +//Codec reset time (in ms). +#define PCXHR_CODEC_RESET_TIME_MS 5 + +/*************************************************************/ +/* TI codecs stuff */ +/*************************************************************/ +/* TI codecs registers /commands for IE7 boards, PCM1796 is the DAC, PCM4202 is an ADC but not programmable */ +//Actual address is on the upper byte only of the 16bit values +#define PCXHR_PCM1796_LEFT_LEVEL_REG_ADDR 0x1000 +#define PCXHR_PCM1796_RIGHT_LEVEL_REG_ADDR 0x1100 + +#define PCXHR_PCM1796_CONF_REG_ADDR 0x1200 +#define PCXHR_PCM1796_OPER_REG_ADDR 0x1300 + + +//MUTE level +#define PCXHR_PCM1796_LEVEL_MUTE_VALUE 0x00 + +//Operation : MUTE bit in conf register +#define PCXHR_PCM1796_CONF_MUTE_BIT (1<<0) + +//Init conf : ATLD|FMT(24b,left) +#define PCXHR_PCM1796_INIT_CONF_CMD PCXHR_PCM1796_CONF_REG_ADDR | 0xB0 + + +//Operation: default value : 0x00 according to DS +#define PCXHR_PCM1796_OPER_RESET_VALUE 0x00 + +//Operation : Enable/disable the DAC (OPE bit) in reg 19 +#define PCXHR_PCM1796_OPER_OPE_DISABLED_BIT (1<<4) + +//Operation base configuration : Attenuation rate selection : LRCK/2 +#define PCXHR_PCM1796_OPER_CONF_CMD PCXHR_PCM1796_OPER_REG_ADDR | 0x20 + +//Settling time once reset Off. +#define PCXHR_TI_CODECS_SETTLING_TIME_MS 10 + +//The default sampling rate (in Hz) +static const unsigned int PCXHR_TI_CODECS_DEFAULT_SAMPLING_RATE = 48000; + +//Follow Datasheet table and input values as given in comments of m_OutputLevelAKM[] +// Range : from 0dB downto -50dB (level : 0 to 100) +static const unsigned int PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE = 255; +static const unsigned int PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL = 100; +static const unsigned int PCXHR_PCM1796_MUTE_OUTPUT_GAIN_VALUE = 0; +static const unsigned int PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE = PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE - PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL; + +//! ADC FS ranges border see PCM4202 data sheet (in kHz) +static const unsigned int PCXHR_TI_ADC_SINGLE_RATE_UPPER_BORDER = 54000; +static const unsigned int PCXHR_TI_ADC_DUAL_RATE_UPPER_BORDER = 108000; + +//! The FS rates for the TI PCM4202 ADC +typedef enum _PCXHR_TI_ADC_FS_RATES +{ + PCXHR_TI_ADC_FS_SINGLE_RATE = 0, + PCXHR_TI_ADC_FS_DUAL_RATE = 1, + PCXHR_TI_ADC_FS_QUAD_RATE = 2, +} PCXHR_TI_ADC_FS_RATES; + + +/**************************************************************/ +/* KM codecs stuff */ +/**************************************************************/ + +static const unsigned char g_hr222_p_level[] = { + 0x00, /* [000] -49.5 dB: AKM[000] = -1.#INF dB (mute) */ + 0x01, /* [001] -49.0 dB: AKM[001] = -48.131 dB (diff=0.86920 dB) */ + 0x01, /* [002] -48.5 dB: AKM[001] = -48.131 dB (diff=0.36920 dB) */ + 0x01, /* [003] -48.0 dB: AKM[001] = -48.131 dB (diff=0.13080 dB) */ + 0x01, /* [004] -47.5 dB: AKM[001] = -48.131 dB (diff=0.63080 dB) */ + 0x01, /* [005] -46.5 dB: AKM[001] = -48.131 dB (diff=1.63080 dB) */ + 0x01, /* [006] -47.0 dB: AKM[001] = -48.131 dB (diff=1.13080 dB) */ + 0x01, /* [007] -46.0 dB: AKM[001] = -48.131 dB (diff=2.13080 dB) */ + 0x01, /* [008] -45.5 dB: AKM[001] = -48.131 dB (diff=2.63080 dB) */ + 0x02, /* [009] -45.0 dB: AKM[002] = -42.110 dB (diff=2.88980 dB) */ + 0x02, /* [010] -44.5 dB: AKM[002] = -42.110 dB (diff=2.38980 dB) */ + 0x02, /* [011] -44.0 dB: AKM[002] = -42.110 dB (diff=1.88980 dB) */ + 0x02, /* [012] -43.5 dB: AKM[002] = -42.110 dB (diff=1.38980 dB) */ + 0x02, /* [013] -43.0 dB: AKM[002] = -42.110 dB (diff=0.88980 dB) */ + 0x02, /* [014] -42.5 dB: AKM[002] = -42.110 dB (diff=0.38980 dB) */ + 0x02, /* [015] -42.0 dB: AKM[002] = -42.110 dB (diff=0.11020 dB) */ + 0x02, /* [016] -41.5 dB: AKM[002] = -42.110 dB (diff=0.61020 dB) */ + 0x02, /* [017] -41.0 dB: AKM[002] = -42.110 dB (diff=1.11020 dB) */ + 0x02, /* [018] -40.5 dB: AKM[002] = -42.110 dB (diff=1.61020 dB) */ + 0x03, /* [019] -40.0 dB: AKM[003] = -38.588 dB (diff=1.41162 dB) */ + 0x03, /* [020] -39.5 dB: AKM[003] = -38.588 dB (diff=0.91162 dB) */ + 0x03, /* [021] -39.0 dB: AKM[003] = -38.588 dB (diff=0.41162 dB) */ + 0x03, /* [022] -38.5 dB: AKM[003] = -38.588 dB (diff=0.08838 dB) */ + 0x03, /* [023] -38.0 dB: AKM[003] = -38.588 dB (diff=0.58838 dB) */ + 0x03, /* [024] -37.5 dB: AKM[003] = -38.588 dB (diff=1.08838 dB) */ + 0x04, /* [025] -37.0 dB: AKM[004] = -36.090 dB (diff=0.91040 dB) */ + 0x04, /* [026] -36.5 dB: AKM[004] = -36.090 dB (diff=0.41040 dB) */ + 0x04, /* [027] -36.0 dB: AKM[004] = -36.090 dB (diff=0.08960 dB) */ + 0x04, /* [028] -35.5 dB: AKM[004] = -36.090 dB (diff=0.58960 dB) */ + 0x05, /* [029] -35.0 dB: AKM[005] = -34.151 dB (diff=0.84860 dB) */ + 0x05, /* [030] -34.5 dB: AKM[005] = -34.151 dB (diff=0.34860 dB) */ + 0x05, /* [031] -34.0 dB: AKM[005] = -34.151 dB (diff=0.15140 dB) */ + 0x05, /* [032] -33.5 dB: AKM[005] = -34.151 dB (diff=0.65140 dB) */ + 0x06, /* [033] -33.0 dB: AKM[006] = -32.568 dB (diff=0.43222 dB) */ + 0x06, /* [034] -32.5 dB: AKM[006] = -32.568 dB (diff=0.06778 dB) */ + 0x06, /* [035] -32.0 dB: AKM[006] = -32.568 dB (diff=0.56778 dB) */ + 0x07, /* [036] -31.5 dB: AKM[007] = -31.229 dB (diff=0.27116 dB) */ + 0x07, /* [037] -31.0 dB: AKM[007] = -31.229 dB (diff=0.22884 dB) */ + 0x08, /* [038] -30.5 dB: AKM[008] = -30.069 dB (diff=0.43100 dB) */ + 0x08, /* [039] -30.0 dB: AKM[008] = -30.069 dB (diff=0.06900 dB) */ + 0x09, /* [040] -29.5 dB: AKM[009] = -29.046 dB (diff=0.45405 dB) */ + 0x09, /* [041] -29.0 dB: AKM[009] = -29.046 dB (diff=0.04595 dB) */ + 0x0a, /* [042] -28.5 dB: AKM[010] = -28.131 dB (diff=0.36920 dB) */ + 0x0a, /* [043] -28.0 dB: AKM[010] = -28.131 dB (diff=0.13080 dB) */ + 0x0b, /* [044] -27.5 dB: AKM[011] = -27.303 dB (diff=0.19705 dB) */ + 0x0b, /* [045] -27.0 dB: AKM[011] = -27.303 dB (diff=0.30295 dB) */ + 0x0c, /* [046] -26.5 dB: AKM[012] = -26.547 dB (diff=0.04718 dB) */ + 0x0d, /* [047] -26.0 dB: AKM[013] = -25.852 dB (diff=0.14806 dB) */ + 0x0e, /* [048] -25.5 dB: AKM[014] = -25.208 dB (diff=0.29176 dB) */ + 0x0e, /* [049] -25.0 dB: AKM[014] = -25.208 dB (diff=0.20824 dB) */ + 0x0f, /* [050] -24.5 dB: AKM[015] = -24.609 dB (diff=0.10898 dB) */ + 0x10, /* [051] -24.0 dB: AKM[016] = -24.048 dB (diff=0.04840 dB) */ + 0x11, /* [052] -23.5 dB: AKM[017] = -23.522 dB (diff=0.02183 dB) */ + 0x12, /* [053] -23.0 dB: AKM[018] = -23.025 dB (diff=0.02535 dB) */ + 0x13, /* [054] -22.5 dB: AKM[019] = -22.556 dB (diff=0.05573 dB) */ + 0x14, /* [055] -22.0 dB: AKM[020] = -22.110 dB (diff=0.11020 dB) */ + 0x15, /* [056] -21.5 dB: AKM[021] = -21.686 dB (diff=0.18642 dB) */ + 0x17, /* [057] -21.0 dB: AKM[023] = -20.896 dB (diff=0.10375 dB) */ + 0x18, /* [058] -20.5 dB: AKM[024] = -20.527 dB (diff=0.02658 dB) */ + 0x1a, /* [059] -20.0 dB: AKM[026] = -19.831 dB (diff=0.16866 dB) */ + 0x1b, /* [060] -19.5 dB: AKM[027] = -19.504 dB (diff=0.00353 dB) */ + 0x1d, /* [061] -19.0 dB: AKM[029] = -18.883 dB (diff=0.11716 dB) */ + 0x1e, /* [062] -18.5 dB: AKM[030] = -18.588 dB (diff=0.08838 dB) */ + 0x20, /* [063] -18.0 dB: AKM[032] = -18.028 dB (diff=0.02780 dB) */ + 0x22, /* [064] -17.5 dB: AKM[034] = -17.501 dB (diff=0.00123 dB) */ + 0x24, /* [065] -17.0 dB: AKM[036] = -17.005 dB (diff=0.00475 dB) */ + 0x26, /* [066] -16.5 dB: AKM[038] = -16.535 dB (diff=0.03513 dB) */ + 0x28, /* [067] -16.0 dB: AKM[040] = -16.090 dB (diff=0.08960 dB) */ + 0x2b, /* [068] -15.5 dB: AKM[043] = -15.461 dB (diff=0.03857 dB) */ + 0x2d, /* [069] -15.0 dB: AKM[045] = -15.067 dB (diff=0.06655 dB) */ + 0x30, /* [070] -14.5 dB: AKM[048] = -14.506 dB (diff=0.00598 dB) */ + 0x33, /* [071] -14.0 dB: AKM[051] = -13.979 dB (diff=0.02060 dB) */ + 0x36, /* [072] -13.5 dB: AKM[054] = -13.483 dB (diff=0.01707 dB) */ + 0x39, /* [073] -13.0 dB: AKM[057] = -13.013 dB (diff=0.01331 dB) */ + 0x3c, /* [074] -12.5 dB: AKM[060] = -12.568 dB (diff=0.06778 dB) */ + 0x40, /* [075] -12.0 dB: AKM[064] = -12.007 dB (diff=0.00720 dB) */ + 0x44, /* [076] -11.5 dB: AKM[068] = -11.481 dB (diff=0.01937 dB) */ + 0x48, /* [077] -11.0 dB: AKM[072] = -10.984 dB (diff=0.01585 dB) */ + 0x4c, /* [078] -10.5 dB: AKM[076] = -10.515 dB (diff=0.01453 dB) */ + 0x51, /* [079] -10.0 dB: AKM[081] = -9.961 dB (diff=0.03890 dB) */ + 0x55, /* [080] -9.5 dB: AKM[085] = -9.542 dB (diff=0.04243 dB) */ + 0x5a, /* [081] -9.0 dB: AKM[090] = -9.046 dB (diff=0.04595 dB) */ + 0x60, /* [082] -8.5 dB: AKM[096] = -8.485 dB (diff=0.01462 dB) */ + 0x66, /* [083] -8.0 dB: AKM[102] = -7.959 dB (diff=0.04120 dB) */ + 0x6c, /* [084] -7.5 dB: AKM[108] = -7.462 dB (diff=0.03767 dB) */ + 0x72, /* [085] -7.0 dB: AKM[114] = -6.993 dB (diff=0.00729 dB) */ + 0x79, /* [086] -6.5 dB: AKM[121] = -6.475 dB (diff=0.02490 dB) */ + 0x80, /* [087] -6.0 dB: AKM[128] = -5.987 dB (diff=0.01340 dB) */ + 0x87, /* [088] -5.5 dB: AKM[135] = -5.524 dB (diff=0.02413 dB) */ + 0x8f, /* [089] -5.0 dB: AKM[143] = -5.024 dB (diff=0.02408 dB) */ + 0x98, /* [090] -4.5 dB: AKM[152] = -4.494 dB (diff=0.00607 dB) */ + 0xa1, /* [091] -4.0 dB: AKM[161] = -3.994 dB (diff=0.00571 dB) */ + 0xaa, /* [092] -3.5 dB: AKM[170] = -3.522 dB (diff=0.02183 dB) */ + 0xb5, /* [093] -3.0 dB: AKM[181] = -2.977 dB (diff=0.02277 dB) */ + 0xbf, /* [094] -2.5 dB: AKM[191] = -2.510 dB (diff=0.01014 dB) */ + 0xcb, /* [095] -2.0 dB: AKM[203] = -1.981 dB (diff=0.01912 dB) */ + 0xd7, /* [096] -1.5 dB: AKM[215] = -1.482 dB (diff=0.01797 dB) */ + 0xe3, /* [097] -1.0 dB: AKM[227] = -1.010 dB (diff=0.01029 dB) */ + 0xf1, /* [098] -0.5 dB: AKM[241] = -0.490 dB (diff=0.00954 dB) */ + 0xff, /* [099] +0.0 dB: AKM[255] = +0.000 dB (diff=0.00000 dB) */ +}; + +static void hr222_write_to_codec(struct pcxhr_mgr *mgr, unsigned short toWrite) +{ + /* + * This is Bit banging of a 16 bit value + * Activate access to codec registers + */ + + unsigned short bit_mask = 0x8000; + + dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); + + dev_dbg(&mgr->pci->dev, "%s() to write : 0x%x\n", __FUNCTION__, toWrite); + + /* activate access to codec registers */ + PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_HIFREQ); + + while (bit_mask) { + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA, + toWrite & bit_mask ? PCXHR_DATA_CODEC : 0); + bit_mask >>= 1; + } + /* termiate access to codec registers */ + PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_RUER); +} + +//Return 1 if this is a valid output level +static inline unsigned int pcxhr_ti_is_valid_output_gain_level (const int level) +{ + return (level >= 0) && + (level <= PCXHR_PCM1796_MAX_OUTPUT_GAIN_LEVEL) ? 1 : 0; +} + +// Return the TI DAC gain value from the given level value. +static unsigned int pcxhr_ti_gain_level_to_register_value(const unsigned int level) +{ + if (level == 0) + return PCXHR_PCM1796_MUTE_OUTPUT_GAIN_VALUE; + + if ((PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE + level) <= PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE) + return PCXHR_PCM1796_MIN_OUTPUT_GAIN_VALUE + level; //See PCM1796 datasheet p26. + else + return PCXHR_PCM1796_MAX_OUTPUT_GAIN_VALUE; //saturate +} + +#if 0 +/* NOT NEEDED AT THIS TIME */ +static PCXHR_TI_ADC_FS_RATES pcxhr_get_ti_adc_sampling_range (const unsigned int rate) +{ + if (rate <= PCXHR_TI_ADC_SINGLE_RATE_UPPER_BORDER) + return PCXHR_TI_ADC_FS_SINGLE_RATE; + + if (rate <= PCXHR_TI_ADC_DUAL_RATE_UPPER_BORDER) + return PCXHR_TI_ADC_FS_DUAL_RATE; + + return PCXHR_TI_ADC_FS_QUAD_RATE; + +} + +#endif +static int hr222_set_ti_hw_playback_level(struct pcxhr_mgr *mgr, + int channel_id, int level) +{ + unsigned short cmd; + + if (channel_id > 1 || !pcxhr_ti_is_valid_output_gain_level(level)) + return -EINVAL; + + cmd = (channel_id == 0) ? PCXHR_PCM1796_LEFT_LEVEL_REG_ADDR : + PCXHR_PCM1796_RIGHT_LEVEL_REG_ADDR; + + cmd |= pcxhr_ti_gain_level_to_register_value(level); + + hr222_write_to_codec(mgr, cmd); + return 0; +} + + +static int hr222_set_akm_hw_playback_level(struct pcxhr_mgr *mgr, + int channel_id, int level) +{ + unsigned short cmd; + + dev_dbg(&mgr->pci->dev, + "%s(channel:%d, level:%d) CALLED\n", __FUNCTION__, channel_id, level); + + if (channel_id > 1 || + level < 0 || + level >= ARRAY_SIZE(g_hr222_p_level)) + return -EINVAL; + + if (channel_id == 0) + cmd = AKM_LEFT_LEVEL_CMD; + else + cmd = AKM_RIGHT_LEVEL_CMD; + + /* conversion from PmBoardCodedLevel to AKM nonlinear programming */ + cmd += g_hr222_p_level[level]; + + hr222_write_to_codec(mgr, cmd); + return 0; +} + + +static int hr222_set_hw_capture_level(struct pcxhr_mgr *mgr, + int level_l, int level_r, int level_mic) +{ + /* program all input levels at the same time */ + unsigned int data; + int i; + + if (!mgr->capture_chips) + return -EINVAL; /* no PCX22 */ + + data = ((level_mic & 0xff) << 24); /* micro is mono, but apply */ + data |= ((level_mic & 0xff) << 16); /* level on both channels */ + data |= ((level_r & 0xff) << 8); /* line input right channel */ + data |= (level_l & 0xff); /* line input left channel */ + + PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA); /* activate input codec */ + /* send 32 bits (4 x 8 bits) */ + for (i = 0; i < 32; i++, data <<= 1) { + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_DATA, + (data & 0x80000000) ? PCXHR_DATA_CODEC : 0); + } + PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_RUER); /* close input level codec */ + return 0; +} + +static void hr222_micro_boost(struct pcxhr_mgr *mgr, int level) +{ + unsigned char boost_mask; + boost_mask = (unsigned char) (level << PCXHR_SELMIC_PREAMPLI_OFFSET); + if (boost_mask & (~PCXHR_SELMIC_PREAMPLI_MASK)) + return; /* only values form 0 to 3 accepted */ + + mgr->xlx_selmic &= ~PCXHR_SELMIC_PREAMPLI_MASK; + mgr->xlx_selmic |= boost_mask; + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_SELMIC, mgr->xlx_selmic); + + dev_dbg(&mgr->pci->dev, "hr222_micro_boost : set %x\n", boost_mask); +} + + + +static int hr222_ti_sub_init (struct pcxhr_mgr *mgr) +{ + dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); + + //set the PCM1796 specific values + mgr->pcm1796_operation_reg_value = PCXHR_PCM1796_OPER_RESET_VALUE; + + /* config TI Codecs */ + hr222_write_to_codec(mgr, PCXHR_PCM1796_INIT_CONF_CMD); + + return 0; +} + + +static int hr222_akm_sub_init (struct pcxhr_mgr *mgr) +{ + dev_dbg(&mgr->pci->dev, "%s() CALLED\n", __FUNCTION__); + /* config AKM */ + hr222_write_to_codec(mgr, AKM_POWER_CONTROL_CMD); + hr222_write_to_codec(mgr, AKM_CLOCK_INF_55K_CMD); + hr222_write_to_codec(mgr, AKM_UNMUTE_CMD); + hr222_write_to_codec(mgr, AKM_RESET_OFF_CMD); + + return 0; +} + +int hr222_sub_init(struct pcxhr_mgr *mgr) +{ + unsigned char reg; + + mgr->board_has_analog = 1; /* analog always available */ + mgr->xlx_cfg = PCXHR_CFG_SYNCDSP_MASK; + + reg = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS); + if (reg & PCXHR_STAT_MIC_CAPS) + mgr->board_has_mic = 1; /* microphone available */ + dev_dbg(&mgr->pci->dev, + "MIC input available = %d\n", mgr->board_has_mic); + + /* reset codec */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, + PCXHR_DSP_RESET_DSP); + + msleep(PCXHR_CODEC_RESET_TIME_MS); + + mgr->dsp_reset = PCXHR_DSP_RESET_DSP | + PCXHR_DSP_RESET_MUTE | + PCXHR_DSP_RESET_CODEC; + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, mgr->dsp_reset); + /* hr222_write_gpo(mgr, 0); does the same */ + msleep(pcxhr_is_board_revision(mgr, PCXHR_BOARD_REVISION_7) ? + PCXHR_TI_CODECS_SETTLING_TIME_MS : + PCXHR_AKM_CODECS_SETTLING_TIME_MS); + + dev_dbg(&mgr->pci->dev, "init board %s\n", + pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? "IE7" : "IE5"); + pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? hr222_ti_sub_init(mgr) : hr222_akm_sub_init(mgr); + + /* init micro boost */ + hr222_micro_boost(mgr, 0); + + return 0; +} + + +/* calc PLL register */ +/* TODO : there is a very similar fct in pcxhr.c */ +static int hr222_compute_pll_freq_register(unsigned int freq, + unsigned int *pllreg, + unsigned int *realfreq) +{ + unsigned int reg; + + if (freq < 6900 || freq > 219000) + return -EINVAL; + reg = (28224000 * 2) / freq; + reg = (reg - 1) / 2; + if (reg < 0x100) + *pllreg = reg + 0xC00; + else if (reg < 0x200) + *pllreg = reg + 0x800; + else if (reg < 0x400) + *pllreg = reg & 0x1ff; + else if (reg < 0x800) { + *pllreg = ((reg >> 1) & 0x1ff) + 0x200; + reg &= ~1; + } else { + *pllreg = ((reg >> 2) & 0x1ff) + 0x400; + reg &= ~3; + } + if (realfreq) + *realfreq = (28224000 / (reg + 1)); + return 0; +} + + +static int hr222_sub_set_pll_reg( struct pcxhr_mgr* mgr, unsigned int reg_value) +{ + //Set Clock at DSP level. + if (mgr->use_clock_type == HR22_CLOCK_TYPE_INTERNAL) { + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_HIFREQ, reg_value >> 8); + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_LOFREQ, reg_value & 0xff); + } + + /* set clock source */ + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_CFG, mgr->xlx_cfg); + + //PLL Settling time + msleep(PCXHR_XLX_PLL_SETTLING_TIME_MS); + + return 0; +} + +static int hr222_ti_sub_set_clock(struct pcxhr_mgr *mgr, + unsigned int rate, unsigned int pllreg) + +{ + //full MUTE, set the clock, unmute + + // Mute DAC Out : disable operation + + hr222_write_to_codec(mgr, + PCXHR_PCM1796_OPER_REG_ADDR | mgr->pcm1796_operation_reg_value | PCXHR_PCM1796_OPER_OPE_DISABLED_BIT); + + // Mute DSP (OUT), use the cached value + mgr->dsp_reset &= ~PCXHR_DSP_RESET_MUTE ; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET , mgr->dsp_reset ); + + //Mute Input : FPGA Command + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_MUTEIN, PCXHR_XLX_MUTEIN_CMD_ON); + + hr222_sub_set_pll_reg(mgr, pllreg); + + //UN-MUTE + //Unmute Input : FPGA Command + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_MUTEIN, PCXHR_XLX_MUTEIN_CMD_OFF); + + // Unmute DSP (OUT), use the cached value (MUTE unmute in fact !!) + mgr->dsp_reset |= PCXHR_DSP_RESET_MUTE ; + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET , mgr->dsp_reset ); + + //unmutes DAC : just re-enable + hr222_write_to_codec(mgr, + PCXHR_PCM1796_OPER_REG_ADDR | mgr->pcm1796_operation_reg_value); + + return 0; +} + + +static int hr222_akm_sub_set_clock(struct pcxhr_mgr *mgr, + unsigned int rate, unsigned int pllreg) + +{ + unsigned int speed = 0; + + hr222_write_to_codec(mgr, AKM_MUTE_CMD); + + hr222_sub_set_pll_reg(mgr, pllreg); + + /* codec speed modes */ + speed = rate < 55000 ? 0 : 1; + if (mgr->codec_speed != speed) { + mgr->codec_speed = speed; + if (speed == 0) + hr222_write_to_codec(mgr, AKM_CLOCK_INF_55K_CMD); + else + hr222_write_to_codec(mgr, AKM_CLOCK_SUP_55K_CMD); + } + + hr222_write_to_codec(mgr, AKM_UNMUTE_CMD); + + return 0; +} + +int hr222_sub_set_clock(struct pcxhr_mgr *mgr, + unsigned int rate, + int *changed) +{ + unsigned int pllreg = 0; + int err; + unsigned realfreq = rate; + + switch (mgr->use_clock_type) { + case HR22_CLOCK_TYPE_INTERNAL: + err = hr222_compute_pll_freq_register(rate, &pllreg, &realfreq); + if (err) + return err; + + mgr->xlx_cfg &= ~(PCXHR_CFG_CLOCKIN_SEL_MASK | + PCXHR_CFG_CLOCK_UER1_SEL_MASK); + break; + case HR22_CLOCK_TYPE_AES_SYNC: + mgr->xlx_cfg |= PCXHR_CFG_CLOCKIN_SEL_MASK; + mgr->xlx_cfg &= ~PCXHR_CFG_CLOCK_UER1_SEL_MASK; + break; + case HR22_CLOCK_TYPE_AES_1: + if (!mgr->board_has_aes1) + return -EINVAL; + + mgr->xlx_cfg |= (PCXHR_CFG_CLOCKIN_SEL_MASK | + PCXHR_CFG_CLOCK_UER1_SEL_MASK); + break; + default: + return -EINVAL; + } + //Codec specific code. + pcxhr_is_board_revision (mgr, PCXHR_BOARD_REVISION_7) ? hr222_ti_sub_set_clock(mgr, rate, pllreg) : hr222_akm_sub_set_clock(mgr, rate, pllreg); + + mgr->sample_rate_real = realfreq; + mgr->cur_clock_type = mgr->use_clock_type; + + if (changed) + *changed = 1; + + dev_dbg(&mgr->pci->dev, "set_clock to %dHz (realfreq=%d pllreg=%x)\n", + rate, realfreq, pllreg); + return 0; +} + +int hr222_get_external_clock(struct pcxhr_mgr *mgr, + enum pcxhr_clock_type clock_type, + int *sample_rate) +{ + int rate, calc_rate = 0; + unsigned int ticks; + unsigned char mask, reg; + + if (clock_type == HR22_CLOCK_TYPE_AES_SYNC) { + + mask = (PCXHR_SUER_CLOCK_PRESENT_MASK | + PCXHR_SUER_DATA_PRESENT_MASK); + reg = PCXHR_STAT_FREQ_SYNC_MASK; + + } else if (clock_type == HR22_CLOCK_TYPE_AES_1 && mgr->board_has_aes1) { + + mask = (PCXHR_SUER1_CLOCK_PRESENT_MASK | + PCXHR_SUER1_DATA_PRESENT_MASK); + reg = PCXHR_STAT_FREQ_UER1_MASK; + + } else { + dev_dbg(&mgr->pci->dev, + "get_external_clock : type %d not supported\n", + clock_type); + return -EINVAL; /* other clocks not supported */ + } + + if ((PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_CSUER) & mask) != mask) { + dev_dbg(&mgr->pci->dev, + "get_external_clock(%d) = 0 Hz\n", clock_type); + *sample_rate = 0; + return 0; /* no external clock locked */ + } + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS, reg); /* calculate freq */ + + /* save the measured clock frequency */ + reg |= PCXHR_STAT_FREQ_SAVE_MASK; + + if (mgr->last_reg_stat != reg) { + udelay(500); /* wait min 2 cycles of lowest freq (8000) */ + mgr->last_reg_stat = reg; + } + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS, reg); /* save */ + + /* get the frequency */ + ticks = (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_CFG); + ticks = (ticks & 0x03) << 8; + ticks |= (unsigned int)PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET); + + if (ticks != 0) + calc_rate = 28224000 / ticks; + /* rounding */ + if (calc_rate > 184200) + rate = 192000; + else if (calc_rate > 152200) + rate = 176400; + else if (calc_rate > 112000) + rate = 128000; + else if (calc_rate > 92100) + rate = 96000; + else if (calc_rate > 76100) + rate = 88200; + else if (calc_rate > 56000) + rate = 64000; + else if (calc_rate > 46050) + rate = 48000; + else if (calc_rate > 38050) + rate = 44100; + else if (calc_rate > 28000) + rate = 32000; + else if (calc_rate > 23025) + rate = 24000; + else if (calc_rate > 19025) + rate = 22050; + else if (calc_rate > 14000) + rate = 16000; + else if (calc_rate > 11512) + rate = 12000; + else if (calc_rate > 9512) + rate = 11025; + else if (calc_rate > 7000) + rate = 8000; + else + rate = 0; + + dev_dbg(&mgr->pci->dev, "External clock is at %d Hz (measured %d Hz)\n", + rate, calc_rate); + *sample_rate = rate; + return 0; +} + + +int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value) +{ + if (is_gpi) { + unsigned char reg = PCXHR_INPB(mgr, PCXHR_DSP, PCXHR_XLX_STATUS); + *value = (int)(reg & PCXHR_STAT_GPI_MASK) >> + PCXHR_STAT_GPI_OFFSET; + } else { + *value = (int)(mgr->dsp_reset & PCXHR_DSP_RESET_GPO_MASK) >> + PCXHR_DSP_RESET_GPO_OFFSET; + } + return 0; +} + + +int hr222_write_gpo(struct pcxhr_mgr *mgr, int value) +{ + unsigned char reg = mgr->dsp_reset & ~PCXHR_DSP_RESET_GPO_MASK; + + reg |= (unsigned char)(value << PCXHR_DSP_RESET_GPO_OFFSET) & + PCXHR_DSP_RESET_GPO_MASK; + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, reg); + mgr->dsp_reset = reg; + return 0; +} + +int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable) +{ + if (enable) + mgr->dsp_reset |= PCXHR_DSP_RESET_SMPTE; + else + mgr->dsp_reset &= ~PCXHR_DSP_RESET_SMPTE; + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_DSP_RESET, mgr->dsp_reset); + return 0; +} + +int hr222_update_analog_audio_level(struct snd_pcxhr *chip, + int is_capture, int channel) +{ + dev_dbg(chip->card->dev, + "hr222_update_analog_audio_level(%s chan=%d)\n", + snd_pcm_direction_name(is_capture), channel); + if (is_capture) { + int level_l, level_r, level_mic; + /* we have to update all levels */ + if (chip->analog_capture_active) { + level_l = chip->analog_capture_volume[0]; + level_r = chip->analog_capture_volume[1]; + } else { + level_l = HR222_LINE_CAPTURE_LEVEL_MIN; + level_r = HR222_LINE_CAPTURE_LEVEL_MIN; + } + if (chip->mic_active) + level_mic = chip->mic_volume; + else + level_mic = HR222_MICRO_CAPTURE_LEVEL_MIN; + return hr222_set_hw_capture_level(chip->mgr, + level_l, level_r, level_mic); + } else { + int vol; + if (chip->analog_playback_active[channel]) + vol = chip->analog_playback_volume[channel]; + else + vol = HR222_LINE_PLAYBACK_LEVEL_MIN; + + return pcxhr_is_board_revision(chip->mgr, PCXHR_BOARD_REVISION_7) ? + hr222_set_ti_hw_playback_level(chip->mgr, channel, vol) : + hr222_set_akm_hw_playback_level(chip->mgr, channel, vol); + } +} + + +/*texts[5] = {"Line", "Digital", "Digi+SRC", "Mic", "Line+Mic"}*/ +#define SOURCE_LINE 0 +#define SOURCE_DIGITAL 1 +#define SOURCE_DIGISRC 2 +#define SOURCE_MIC 3 +#define SOURCE_LINEMIC 4 + +int hr222_set_audio_source(struct snd_pcxhr *chip) +{ + int digital = 0; + /* default analog source */ + chip->mgr->xlx_cfg &= ~(PCXHR_CFG_SRC_MASK | + PCXHR_CFG_DATAIN_SEL_MASK | + PCXHR_CFG_DATA_UER1_SEL_MASK); + + if (chip->audio_capture_source == SOURCE_DIGISRC) { + chip->mgr->xlx_cfg |= PCXHR_CFG_SRC_MASK; + digital = 1; + } else { + if (chip->audio_capture_source == SOURCE_DIGITAL) + digital = 1; + } + if (digital) { + chip->mgr->xlx_cfg |= PCXHR_CFG_DATAIN_SEL_MASK; + if (chip->mgr->board_has_aes1) { + /* get data from the AES1 plug */ + chip->mgr->xlx_cfg |= PCXHR_CFG_DATA_UER1_SEL_MASK; + } + /* chip->mic_active = 0; */ + /* chip->analog_capture_active = 0; */ + } else { + int update_lvl = 0; + chip->analog_capture_active = 0; + chip->mic_active = 0; + if (chip->audio_capture_source == SOURCE_LINE || + chip->audio_capture_source == SOURCE_LINEMIC) { + if (chip->analog_capture_active == 0) + update_lvl = 1; + chip->analog_capture_active = 1; + } + if (chip->audio_capture_source == SOURCE_MIC || + chip->audio_capture_source == SOURCE_LINEMIC) { + if (chip->mic_active == 0) + update_lvl = 1; + chip->mic_active = 1; + } + if (update_lvl) { + /* capture: update all 3 mutes/unmutes with one call */ + hr222_update_analog_audio_level(chip, 1, 0); + } + } + /* set the source infos (max 3 bits modified) */ + PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CFG, chip->mgr->xlx_cfg); + return 0; +} + + +int hr222_iec958_capture_byte(struct snd_pcxhr *chip, + int aes_idx, unsigned char *aes_bits) +{ + unsigned char idx = (unsigned char)(aes_idx * 8); + unsigned char temp = 0; + unsigned char mask = chip->mgr->board_has_aes1 ? + PCXHR_SUER1_BIT_C_READ_MASK : PCXHR_SUER_BIT_C_READ_MASK; + int i; + for (i = 0; i < 8; i++) { + PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_RUER, idx++); /* idx < 192 */ + temp <<= 1; + if (PCXHR_INPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CSUER) & mask) + temp |= 1; + } + dev_dbg(chip->card->dev, "read iec958 AES %d byte %d = 0x%x\n", + chip->chip_idx, aes_idx, temp); + *aes_bits = temp; + return 0; +} + + +int hr222_iec958_update_byte(struct snd_pcxhr *chip, + int aes_idx, unsigned char aes_bits) +{ + int i; + unsigned char new_bits = aes_bits; + unsigned char old_bits = chip->aes_bits[aes_idx]; + unsigned char idx = (unsigned char)(aes_idx * 8); + for (i = 0; i < 8; i++) { + if ((old_bits & 0x01) != (new_bits & 0x01)) { + /* idx < 192 */ + PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_RUER, idx); + /* write C and U bit */ + PCXHR_OUTPB(chip->mgr, PCXHR_DSP, PCXHR_XLX_CSUER, new_bits&0x01 ? + PCXHR_SUER_BIT_C_WRITE_MASK : 0); + } + idx++; + old_bits >>= 1; + new_bits >>= 1; + } + chip->aes_bits[aes_idx] = aes_bits; + return 0; +} + +static void hr222_phantom_power(struct pcxhr_mgr *mgr, int power) +{ + if (power) + mgr->xlx_selmic |= PCXHR_SELMIC_PHANTOM_ALIM; + else + mgr->xlx_selmic &= ~PCXHR_SELMIC_PHANTOM_ALIM; + + PCXHR_OUTPB(mgr, PCXHR_DSP, PCXHR_XLX_SELMIC, mgr->xlx_selmic); + + dev_dbg(&mgr->pci->dev, "hr222_phantom_power : set %d\n", power); +} + + +/* mic level */ +static const DECLARE_TLV_DB_SCALE(db_scale_mic_hr222, -9850, 50, 650); + +static int hr222_mic_vol_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = HR222_MICRO_CAPTURE_LEVEL_MIN; /* -98 dB */ + /* gains from 9 dB to 31.5 dB not recommended; use micboost instead */ + uinfo->value.integer.max = HR222_MICRO_CAPTURE_LEVEL_MAX; /* +7 dB */ + return 0; +} + +static int hr222_mic_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->mic_volume; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int hr222_mic_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + mutex_lock(&chip->mgr->mixer_mutex); + if (chip->mic_volume != ucontrol->value.integer.value[0]) { + changed = 1; + chip->mic_volume = ucontrol->value.integer.value[0]; + hr222_update_analog_audio_level(chip, 1, 0); + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new hr222_control_mic_level = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ), + .name = "Mic Capture Volume", + .info = hr222_mic_vol_info, + .get = hr222_mic_vol_get, + .put = hr222_mic_vol_put, + .tlv = { .p = db_scale_mic_hr222 }, +}; + + +/* mic boost level */ +static const DECLARE_TLV_DB_SCALE(db_scale_micboost_hr222, 0, 1800, 5400); + +static int hr222_mic_boost_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 1; + uinfo->value.integer.min = 0; /* 0 dB */ + uinfo->value.integer.max = 3; /* 54 dB */ + return 0; +} + +static int hr222_mic_boost_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->mic_boost; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int hr222_mic_boost_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + mutex_lock(&chip->mgr->mixer_mutex); + if (chip->mic_boost != ucontrol->value.integer.value[0]) { + changed = 1; + chip->mic_boost = ucontrol->value.integer.value[0]; + hr222_micro_boost(chip->mgr, chip->mic_boost); + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new hr222_control_mic_boost = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ), + .name = "MicBoost Capture Volume", + .info = hr222_mic_boost_info, + .get = hr222_mic_boost_get, + .put = hr222_mic_boost_put, + .tlv = { .p = db_scale_micboost_hr222 }, +}; + + +/******************* Phantom power switch *******************/ +#define hr222_phantom_power_info snd_ctl_boolean_mono_info + +static int hr222_phantom_power_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->phantom_power; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int hr222_phantom_power_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int power, changed = 0; + + mutex_lock(&chip->mgr->mixer_mutex); + power = !!ucontrol->value.integer.value[0]; + if (chip->phantom_power != power) { + hr222_phantom_power(chip->mgr, power); + chip->phantom_power = power; + changed = 1; + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new hr222_phantom_power_switch = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Phantom Power Switch", + .info = hr222_phantom_power_info, + .get = hr222_phantom_power_get, + .put = hr222_phantom_power_put, +}; + + +int hr222_add_mic_controls(struct snd_pcxhr *chip) +{ + int err; + if (!chip->mgr->board_has_mic) + return 0; + + /* controls */ + err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_level, + chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_control_mic_boost, + chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, snd_ctl_new1(&hr222_phantom_power_switch, + chip)); + return err; +} diff --git a/snd-pcxhr/src/pcxhr_mix22.h b/snd-pcxhr/src/pcxhr_mix22.h new file mode 100644 index 0000000..b1e4ffc --- /dev/null +++ b/snd-pcxhr/src/pcxhr_mix22.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Digigram pcxhr compatible soundcards + * + * low level interface with interrupt ans message handling + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef __SOUND_PCXHR_MIX22_H +#define __SOUND_PCXHR_MIX22_H + +struct pcxhr_mgr; + +int hr222_sub_init(struct pcxhr_mgr *mgr); +int hr222_sub_set_clock(struct pcxhr_mgr *mgr, unsigned int rate, + int *changed); +int hr222_get_external_clock(struct pcxhr_mgr *mgr, + enum pcxhr_clock_type clock_type, + int *sample_rate); + +int hr222_read_gpio(struct pcxhr_mgr *mgr, int is_gpi, int *value); +int hr222_write_gpo(struct pcxhr_mgr *mgr, int value); +int hr222_manage_timecode(struct pcxhr_mgr *mgr, int enable); + +#define HR222_LINE_PLAYBACK_LEVEL_MIN 0 /* -25.5 dB */ +#define HR222_LINE_PLAYBACK_ZERO_LEVEL 51 /* 0.0 dB */ +#define HR222_LINE_PLAYBACK_LEVEL_MAX 99 /* +24.0 dB */ + +#define HR222_LINE_CAPTURE_LEVEL_MIN 0 /* -111.5 dB */ +#define HR222_LINE_CAPTURE_ZERO_LEVEL 223 /* 0.0 dB */ +#define HR222_LINE_CAPTURE_LEVEL_MAX 255 /* +16 dB */ +#define HR222_MICRO_CAPTURE_LEVEL_MIN 0 /* -98.5 dB */ +#define HR222_MICRO_CAPTURE_LEVEL_MAX 210 /* +6.5 dB */ + +int hr222_update_analog_audio_level(struct snd_pcxhr *chip, + int is_capture, + int channel); +int hr222_set_audio_source(struct snd_pcxhr *chip); +int hr222_iec958_capture_byte(struct snd_pcxhr *chip, int aes_idx, + unsigned char *aes_bits); +int hr222_iec958_update_byte(struct snd_pcxhr *chip, int aes_idx, + unsigned char aes_bits); + +int hr222_add_mic_controls(struct snd_pcxhr *chip); + +#endif /* __SOUND_PCXHR_MIX22_H */ diff --git a/snd-pcxhr/src/pcxhr_mixer.c b/snd-pcxhr/src/pcxhr_mixer.c new file mode 100644 index 0000000..aec5094 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_mixer.c @@ -0,0 +1,1246 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +#define __NO_VERSION__ +/* + * Driver for Digigram pcxhr compatible soundcards + * + * mixer callbacks + * + * Copyright (c) 2004 by Digigram + */ + +#include +#include +#include +#include +#include +#include "pcxhr.h" +#include "pcxhr_hwdep.h" +#include "pcxhr_core.h" +#include +#include +#include +#include "pcxhr_mixer.h" +#include "pcxhr_mix22.h" + +#define PCXHR_LINE_CAPTURE_LEVEL_MIN 0 /* -112.0 dB */ +#define PCXHR_LINE_CAPTURE_LEVEL_MAX 255 /* +15.5 dB */ +#define PCXHR_LINE_CAPTURE_ZERO_LEVEL 224 /* 0.0 dB ( 0 dBu -> 0 dBFS ) */ + +#define PCXHR_LINE_PLAYBACK_LEVEL_MIN 0 /* -104.0 dB */ +#define PCXHR_LINE_PLAYBACK_LEVEL_MAX 128 /* +24.0 dB */ +#define PCXHR_LINE_PLAYBACK_ZERO_LEVEL 104 /* 0.0 dB ( 0 dBFS -> 0 dBu ) */ + +static const DECLARE_TLV_DB_SCALE(db_scale_analog_capture, -11200, 50, 1550); +static const DECLARE_TLV_DB_SCALE(db_scale_analog_playback, -10400, 100, 2400); + +static const DECLARE_TLV_DB_SCALE(db_scale_a_hr222_capture, -11150, 50, 1600); +static const DECLARE_TLV_DB_SCALE(db_scale_a_hr222_playback, -2550, 50, 2400); + +static int pcxhr_update_analog_audio_level(struct snd_pcxhr *chip, + int is_capture, int channel) +{ + int err, vol; + struct pcxhr_rmh rmh; + + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + if (is_capture) { + rmh.cmd[0] |= IO_NUM_REG_IN_ANA_LEVEL; + rmh.cmd[2] = chip->analog_capture_volume[channel]; + } else { + rmh.cmd[0] |= IO_NUM_REG_OUT_ANA_LEVEL; + if (chip->analog_playback_active[channel]) + vol = chip->analog_playback_volume[channel]; + else + vol = PCXHR_LINE_PLAYBACK_LEVEL_MIN; + /* playback analog levels are inversed */ + rmh.cmd[2] = PCXHR_LINE_PLAYBACK_LEVEL_MAX - vol; + } + rmh.cmd[1] = 1 << ((2 * chip->chip_idx) + channel); /* audio mask */ + rmh.cmd_len = 3; + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err < 0) { + dev_dbg(chip->card->dev, + "error update_analog_audio_level card(%d)" + " is_capture(%d) err(%x)\n", + chip->chip_idx, is_capture, err); + return -EINVAL; + } + return 0; +} + +/* + * analog level control + */ +static int pcxhr_analog_vol_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 2; + if (kcontrol->private_value == 0) { /* playback */ + if (chip->mgr->is_hr_stereo) { + uinfo->value.integer.min = + HR222_LINE_PLAYBACK_LEVEL_MIN; /* -25 dB */ + uinfo->value.integer.max = + HR222_LINE_PLAYBACK_LEVEL_MAX; /* +24 dB */ + } else { + uinfo->value.integer.min = + PCXHR_LINE_PLAYBACK_LEVEL_MIN; /*-104 dB */ + uinfo->value.integer.max = + PCXHR_LINE_PLAYBACK_LEVEL_MAX; /* +24 dB */ + } + } else { /* capture */ + if (chip->mgr->is_hr_stereo) { + uinfo->value.integer.min = + HR222_LINE_CAPTURE_LEVEL_MIN; /*-112 dB */ + uinfo->value.integer.max = + HR222_LINE_CAPTURE_LEVEL_MAX; /* +15.5 dB */ + } else { + uinfo->value.integer.min = + PCXHR_LINE_CAPTURE_LEVEL_MIN; /*-112 dB */ + uinfo->value.integer.max = + PCXHR_LINE_CAPTURE_LEVEL_MAX; /* +15.5 dB */ + } + } + return 0; +} + +static int pcxhr_analog_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + if (kcontrol->private_value == 0) { /* playback */ + ucontrol->value.integer.value[0] = chip->analog_playback_volume[0]; + ucontrol->value.integer.value[1] = chip->analog_playback_volume[1]; + } else { /* capture */ + ucontrol->value.integer.value[0] = chip->analog_capture_volume[0]; + ucontrol->value.integer.value[1] = chip->analog_capture_volume[1]; + } + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_analog_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + int is_capture, i; + + mutex_lock(&chip->mgr->mixer_mutex); + is_capture = (kcontrol->private_value != 0); + for (i = 0; i < 2; i++) { + int new_volume = ucontrol->value.integer.value[i]; + int *stored_volume = is_capture ? + &chip->analog_capture_volume[i] : + &chip->analog_playback_volume[i]; + if (is_capture) { + if (chip->mgr->is_hr_stereo) { + if (new_volume < HR222_LINE_CAPTURE_LEVEL_MIN || + new_volume > HR222_LINE_CAPTURE_LEVEL_MAX) + continue; + } else { + if (new_volume < PCXHR_LINE_CAPTURE_LEVEL_MIN || + new_volume > PCXHR_LINE_CAPTURE_LEVEL_MAX) + continue; + } + } else { + if (chip->mgr->is_hr_stereo) { + if (new_volume < HR222_LINE_PLAYBACK_LEVEL_MIN || + new_volume > HR222_LINE_PLAYBACK_LEVEL_MAX) + continue; + } else { + if (new_volume < PCXHR_LINE_PLAYBACK_LEVEL_MIN || + new_volume > PCXHR_LINE_PLAYBACK_LEVEL_MAX) + continue; + } + } + if (*stored_volume != new_volume) { + *stored_volume = new_volume; + changed = 1; + if (chip->mgr->is_hr_stereo) + hr222_update_analog_audio_level(chip, + is_capture, i); + else + pcxhr_update_analog_audio_level(chip, + is_capture, i); + } + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new pcxhr_control_analog_level = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ), + /* name will be filled later */ + .info = pcxhr_analog_vol_info, + .get = pcxhr_analog_vol_get, + .put = pcxhr_analog_vol_put, + /* tlv will be filled later */ +}; + +/* shared */ + +#define pcxhr_sw_info snd_ctl_boolean_stereo_info + +static int pcxhr_audio_sw_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->analog_playback_active[0]; + ucontrol->value.integer.value[1] = chip->analog_playback_active[1]; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_audio_sw_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int i, changed = 0; + mutex_lock(&chip->mgr->mixer_mutex); + for(i = 0; i < 2; i++) { + if (chip->analog_playback_active[i] != + ucontrol->value.integer.value[i]) { + chip->analog_playback_active[i] = + !!ucontrol->value.integer.value[i]; + changed = 1; + /* update playback levels */ + if (chip->mgr->is_hr_stereo) + hr222_update_analog_audio_level(chip, 0, i); + else + pcxhr_update_analog_audio_level(chip, 0, i); + } + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new pcxhr_control_output_switch = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Master Playback Switch", + .info = pcxhr_sw_info, /* shared */ + .get = pcxhr_audio_sw_get, + .put = pcxhr_audio_sw_put +}; + + +#define PCXHR_DIGITAL_LEVEL_MIN 0x000 /* -110 dB */ +#define PCXHR_DIGITAL_LEVEL_MAX 0x1ff /* +18 dB */ +#define PCXHR_DIGITAL_ZERO_LEVEL 0x1b7 /* 0 dB */ + +static const DECLARE_TLV_DB_SCALE(db_scale_digital, -10975, 25, 1800); + +#define MORE_THAN_ONE_STREAM_LEVEL 0x000001 +#define VALID_STREAM_PAN_LEVEL_MASK 0x800000 +#define VALID_STREAM_LEVEL_MASK 0x400000 +#define VALID_STREAM_LEVEL_1_MASK 0x200000 +#define VALID_STREAM_LEVEL_2_MASK 0x100000 + +static int pcxhr_update_playback_stream_level(struct snd_pcxhr* chip, int idx) +{ + int err; + struct pcxhr_rmh rmh; + struct pcxhr_pipe *pipe = &chip->playback_pipe; + int left, right; + + if (chip->digital_playback_active[idx][0]) + left = chip->digital_playback_volume[idx][0]; + else + left = PCXHR_DIGITAL_LEVEL_MIN; + if (chip->digital_playback_active[idx][1]) + right = chip->digital_playback_volume[idx][1]; + else + right = PCXHR_DIGITAL_LEVEL_MIN; + + pcxhr_init_rmh(&rmh, CMD_STREAM_OUT_LEVEL_ADJUST); + /* add pipe and stream mask */ + pcxhr_set_pipe_cmd_params(&rmh, 0, pipe->first_audio, 0, 1<left / right->right panoramic level */ + rmh.cmd[0] |= MORE_THAN_ONE_STREAM_LEVEL; + rmh.cmd[2] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_1_MASK; + rmh.cmd[2] |= (left << 10); + rmh.cmd[3] = VALID_STREAM_PAN_LEVEL_MASK | VALID_STREAM_LEVEL_2_MASK; + rmh.cmd[3] |= right; + rmh.cmd_len = 4; + + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err < 0) { + dev_dbg(chip->card->dev, "error update_playback_stream_level " + "card(%d) err(%x)\n", chip->chip_idx, err); + return -EINVAL; + } + return 0; +} + +#define AUDIO_IO_HAS_MUTE_LEVEL 0x400000 +#define AUDIO_IO_HAS_MUTE_MONITOR_1 0x200000 +#define VALID_AUDIO_IO_DIGITAL_LEVEL 0x000001 +#define VALID_AUDIO_IO_MONITOR_LEVEL 0x000002 +#define VALID_AUDIO_IO_MUTE_LEVEL 0x000004 +#define VALID_AUDIO_IO_MUTE_MONITOR_1 0x000008 + +static int pcxhr_update_audio_pipe_level(struct snd_pcxhr *chip, + int capture, int channel) +{ + int err; + struct pcxhr_rmh rmh; + struct pcxhr_pipe *pipe; + + if (capture) + pipe = &chip->capture_pipe[0]; + else + pipe = &chip->playback_pipe; + + pcxhr_init_rmh(&rmh, CMD_AUDIO_LEVEL_ADJUST); + /* add channel mask */ + pcxhr_set_pipe_cmd_params(&rmh, capture, 0, 0, + 1 << (channel + pipe->first_audio)); + /* TODO : if mask (3 << pipe->first_audio) is used, left and right + * channel will be programmed to the same params */ + if (capture) { + rmh.cmd[0] |= VALID_AUDIO_IO_DIGITAL_LEVEL; + /* VALID_AUDIO_IO_MUTE_LEVEL not yet handled + * (capture pipe level) */ + rmh.cmd[2] = chip->digital_capture_volume[channel]; + } else { + rmh.cmd[0] |= VALID_AUDIO_IO_MONITOR_LEVEL | + VALID_AUDIO_IO_MUTE_MONITOR_1; + /* VALID_AUDIO_IO_DIGITAL_LEVEL and VALID_AUDIO_IO_MUTE_LEVEL + * not yet handled (playback pipe level) + */ + rmh.cmd[2] = chip->monitoring_volume[channel] << 10; + if (chip->monitoring_active[channel] == 0) + rmh.cmd[2] |= AUDIO_IO_HAS_MUTE_MONITOR_1; + } + rmh.cmd_len = 3; + + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err < 0) { + dev_dbg(chip->card->dev, + "error update_audio_level(%d) err=%x\n", + chip->chip_idx, err); + return -EINVAL; + } + return 0; +} + + +/* shared */ +static int pcxhr_digital_vol_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 2; + uinfo->value.integer.min = PCXHR_DIGITAL_LEVEL_MIN; /* -109.5 dB */ + uinfo->value.integer.max = PCXHR_DIGITAL_LEVEL_MAX; /* 18.0 dB */ + return 0; +} + + +static int pcxhr_pcm_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ + int *stored_volume; + int is_capture = kcontrol->private_value; + + mutex_lock(&chip->mgr->mixer_mutex); + if (is_capture) /* digital capture */ + stored_volume = chip->digital_capture_volume; + else /* digital playback */ + stored_volume = chip->digital_playback_volume[idx]; + ucontrol->value.integer.value[0] = stored_volume[0]; + ucontrol->value.integer.value[1] = stored_volume[1]; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_pcm_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ + int changed = 0; + int is_capture = kcontrol->private_value; + int *stored_volume; + int i; + + mutex_lock(&chip->mgr->mixer_mutex); + if (is_capture) /* digital capture */ + stored_volume = chip->digital_capture_volume; + else /* digital playback */ + stored_volume = chip->digital_playback_volume[idx]; + for (i = 0; i < 2; i++) { + int vol = ucontrol->value.integer.value[i]; + if (vol < PCXHR_DIGITAL_LEVEL_MIN || + vol > PCXHR_DIGITAL_LEVEL_MAX) + continue; + if (stored_volume[i] != vol) { + stored_volume[i] = vol; + changed = 1; + if (is_capture) /* update capture volume */ + pcxhr_update_audio_pipe_level(chip, 1, i); + } + } + if (!is_capture && changed) /* update playback volume */ + pcxhr_update_playback_stream_level(chip, idx); + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new snd_pcxhr_pcm_vol = +{ + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ), + /* name will be filled later */ + /* count will be filled later */ + .info = pcxhr_digital_vol_info, /* shared */ + .get = pcxhr_pcm_vol_get, + .put = pcxhr_pcm_vol_put, + .tlv = { .p = db_scale_digital }, +}; + + +static int pcxhr_pcm_sw_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ + + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->digital_playback_active[idx][0]; + ucontrol->value.integer.value[1] = chip->digital_playback_active[idx][1]; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_pcm_sw_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id); /* index */ + int i, j; + + mutex_lock(&chip->mgr->mixer_mutex); + j = idx; + for (i = 0; i < 2; i++) { + if (chip->digital_playback_active[j][i] != + ucontrol->value.integer.value[i]) { + chip->digital_playback_active[j][i] = + !!ucontrol->value.integer.value[i]; + changed = 1; + } + } + if (changed) + pcxhr_update_playback_stream_level(chip, idx); + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new pcxhr_control_pcm_switch = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "PCM Playback Switch", + .count = PCXHR_PLAYBACK_STREAMS, + .info = pcxhr_sw_info, /* shared */ + .get = pcxhr_pcm_sw_get, + .put = pcxhr_pcm_sw_put +}; + + +/* + * monitoring level control + */ + +static int pcxhr_monitor_vol_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->monitoring_volume[0]; + ucontrol->value.integer.value[1] = chip->monitoring_volume[1]; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_monitor_vol_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + int i; + + mutex_lock(&chip->mgr->mixer_mutex); + for (i = 0; i < 2; i++) { + if (chip->monitoring_volume[i] != + ucontrol->value.integer.value[i]) { + chip->monitoring_volume[i] = + ucontrol->value.integer.value[i]; + if (chip->monitoring_active[i]) + /* update monitoring volume and mute */ + /* do only when monitoring is unmuted */ + pcxhr_update_audio_pipe_level(chip, 0, i); + changed = 1; + } + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new pcxhr_control_monitor_vol = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ), + .name = "Monitoring Playback Volume", + .info = pcxhr_digital_vol_info, /* shared */ + .get = pcxhr_monitor_vol_get, + .put = pcxhr_monitor_vol_put, + .tlv = { .p = db_scale_digital }, +}; + +/* + * monitoring switch control + */ + +static int pcxhr_monitor_sw_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + mutex_lock(&chip->mgr->mixer_mutex); + ucontrol->value.integer.value[0] = chip->monitoring_active[0]; + ucontrol->value.integer.value[1] = chip->monitoring_active[1]; + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_monitor_sw_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int changed = 0; + int i; + + mutex_lock(&chip->mgr->mixer_mutex); + for (i = 0; i < 2; i++) { + if (chip->monitoring_active[i] != + ucontrol->value.integer.value[i]) { + chip->monitoring_active[i] = + !!ucontrol->value.integer.value[i]; + changed |= (1<mgr->mixer_mutex); + return (changed != 0); +} + +static const struct snd_kcontrol_new pcxhr_control_monitor_sw = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Monitoring Playback Switch", + .info = pcxhr_sw_info, /* shared */ + .get = pcxhr_monitor_sw_get, + .put = pcxhr_monitor_sw_put +}; + + + +/* + * audio source select + */ +#define PCXHR_SOURCE_AUDIO01_UER 0x000100 +#define PCXHR_SOURCE_AUDIO01_SYNC 0x000200 +#define PCXHR_SOURCE_AUDIO23_UER 0x000400 +#define PCXHR_SOURCE_AUDIO45_UER 0x001000 +#define PCXHR_SOURCE_AUDIO67_UER 0x040000 + +static int pcxhr_set_audio_source(struct snd_pcxhr* chip) +{ + struct pcxhr_rmh rmh; + unsigned int mask, reg; + unsigned int codec; + int err, changed; + + switch (chip->chip_idx) { + case 0 : mask = PCXHR_SOURCE_AUDIO01_UER; codec = CS8420_01_CS; break; + case 1 : mask = PCXHR_SOURCE_AUDIO23_UER; codec = CS8420_23_CS; break; + case 2 : mask = PCXHR_SOURCE_AUDIO45_UER; codec = CS8420_45_CS; break; + case 3 : mask = PCXHR_SOURCE_AUDIO67_UER; codec = CS8420_67_CS; break; + default: return -EINVAL; + } + if (chip->audio_capture_source != 0) { + reg = mask; /* audio source from digital plug */ + } else { + reg = 0; /* audio source from analog plug */ + } + /* set the input source */ + pcxhr_write_io_num_reg_cont(chip->mgr, mask, reg, &changed); + /* resync them (otherwise channel inversion possible) */ + if (changed) { + pcxhr_init_rmh(&rmh, CMD_RESYNC_AUDIO_INPUTS); + rmh.cmd[0] |= (1 << chip->chip_idx); + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + return err; + } + if (chip->mgr->board_aes_in_192k) { + int i; + unsigned int src_config = 0xC0; + /* update all src configs with one call */ + for (i = 0; (i < 4) && (i < chip->mgr->capture_chips); i++) { + if (chip->mgr->chip[i]->audio_capture_source == 2) + src_config |= (1 << (3 - i)); + } + /* set codec SRC on off */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd_len = 2; + rmh.cmd[0] |= IO_NUM_REG_CONFIG_SRC; + rmh.cmd[1] = src_config; + err = pcxhr_send_msg(chip->mgr, &rmh); + } else { + int use_src = 0; + if (chip->audio_capture_source == 2) + use_src = 1; + /* set codec SRC on off */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd_len = 3; + rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; + rmh.cmd[1] = codec; + rmh.cmd[2] = ((CS8420_DATA_FLOW_CTL & CHIP_SIG_AND_MAP_SPI) | + (use_src ? 0x41 : 0x54)); + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + return err; + rmh.cmd[2] = ((CS8420_CLOCK_SRC_CTL & CHIP_SIG_AND_MAP_SPI) | + (use_src ? 0x41 : 0x49)); + err = pcxhr_send_msg(chip->mgr, &rmh); + } + return err; +} + +static int pcxhr_audio_src_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + static const char *texts[5] = { + "Line", "Digital", "Digi+SRC", "Mic", "Line+Mic" + }; + int i; + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + + i = 2; /* no SRC, no Mic available */ + if (chip->mgr->board_has_aes1) { + i = 3; /* SRC available */ + if (chip->mgr->board_has_mic) + i = 5; /* Mic and MicroMix available */ + } + return snd_ctl_enum_info(uinfo, 1, i, texts); +} + +static int pcxhr_audio_src_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + ucontrol->value.enumerated.item[0] = chip->audio_capture_source; + return 0; +} + +static int pcxhr_audio_src_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int ret = 0; + int i = 2; /* no SRC, no Mic available */ + if (chip->mgr->board_has_aes1) { + i = 3; /* SRC available */ + if (chip->mgr->board_has_mic) + i = 5; /* Mic and MicroMix available */ + } + if (ucontrol->value.enumerated.item[0] >= i) + return -EINVAL; + mutex_lock(&chip->mgr->mixer_mutex); + if (chip->audio_capture_source != ucontrol->value.enumerated.item[0]) { + chip->audio_capture_source = ucontrol->value.enumerated.item[0]; + if (chip->mgr->is_hr_stereo) + hr222_set_audio_source(chip); + else + pcxhr_set_audio_source(chip); + ret = 1; + } + mutex_unlock(&chip->mgr->mixer_mutex); + return ret; +} + +static const struct snd_kcontrol_new pcxhr_control_audio_src = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Capture Source", + .info = pcxhr_audio_src_info, + .get = pcxhr_audio_src_get, + .put = pcxhr_audio_src_put, +}; + + +/* + * clock type selection + * enum pcxhr_clock_type { + * PCXHR_CLOCK_TYPE_INTERNAL = 0, + * PCXHR_CLOCK_TYPE_WORD_CLOCK, + * PCXHR_CLOCK_TYPE_AES_SYNC, + * PCXHR_CLOCK_TYPE_AES_1, + * PCXHR_CLOCK_TYPE_AES_2, + * PCXHR_CLOCK_TYPE_AES_3, + * PCXHR_CLOCK_TYPE_AES_4, + * PCXHR_CLOCK_TYPE_MAX = PCXHR_CLOCK_TYPE_AES_4, + * HR22_CLOCK_TYPE_INTERNAL = PCXHR_CLOCK_TYPE_INTERNAL, + * HR22_CLOCK_TYPE_AES_SYNC, + * HR22_CLOCK_TYPE_AES_1, + * HR22_CLOCK_TYPE_MAX = HR22_CLOCK_TYPE_AES_1, + * }; + */ + +static int pcxhr_clock_type_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + static const char *textsPCXHR[7] = { + "Internal", "WordClock", "AES Sync", + "AES 1", "AES 2", "AES 3", "AES 4" + }; + static const char *textsHR22[3] = { + "Internal", "AES Sync", "AES 1" + }; + const char **texts; + struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); + int clock_items = 2; /* at least Internal and AES Sync clock */ + if (mgr->board_has_aes1) { + clock_items += mgr->capture_chips; /* add AES x */ + if (!mgr->is_hr_stereo) + clock_items += 1; /* add word clock */ + } + if (mgr->is_hr_stereo) { + texts = textsHR22; + snd_BUG_ON(clock_items > (HR22_CLOCK_TYPE_MAX+1)); + } else { + texts = textsPCXHR; + snd_BUG_ON(clock_items > (PCXHR_CLOCK_TYPE_MAX+1)); + } + return snd_ctl_enum_info(uinfo, 1, clock_items, texts); +} + +static int pcxhr_clock_type_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); + ucontrol->value.enumerated.item[0] = mgr->use_clock_type; + return 0; +} + +static int pcxhr_clock_type_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); + int rate, ret = 0; + unsigned int clock_items = 2; /* at least Internal and AES Sync clock */ + if (mgr->board_has_aes1) { + clock_items += mgr->capture_chips; /* add AES x */ + if (!mgr->is_hr_stereo) + clock_items += 1; /* add word clock */ + } + if (ucontrol->value.enumerated.item[0] >= clock_items) + return -EINVAL; + mutex_lock(&mgr->mixer_mutex); + if (mgr->use_clock_type != ucontrol->value.enumerated.item[0]) { + mutex_lock(&mgr->setup_mutex); + mgr->use_clock_type = ucontrol->value.enumerated.item[0]; + rate = 0; + if (mgr->use_clock_type != PCXHR_CLOCK_TYPE_INTERNAL) { + pcxhr_get_external_clock(mgr, mgr->use_clock_type, + &rate); + } else { + rate = mgr->sample_rate; + if (!rate) + rate = 48000; + } + if (rate) { + pcxhr_set_clock(mgr, rate); + if (mgr->sample_rate) + mgr->sample_rate = rate; + } + mutex_unlock(&mgr->setup_mutex); + ret = 1; /* return 1 even if the set was not done. ok ? */ + } + mutex_unlock(&mgr->mixer_mutex); + return ret; +} + +static const struct snd_kcontrol_new pcxhr_control_clock_type = { + .iface = SNDRV_CTL_ELEM_IFACE_MIXER, + .name = "Clock Mode", + .info = pcxhr_clock_type_info, + .get = pcxhr_clock_type_get, + .put = pcxhr_clock_type_put, +}; + +/* + * clock rate control + * specific control that scans the sample rates on the external plugs + */ +static int pcxhr_clock_rate_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = 3 + mgr->capture_chips; + uinfo->value.integer.min = 0; /* clock not present */ + uinfo->value.integer.max = 192000; /* max sample rate 192 kHz */ + return 0; +} + +static int pcxhr_clock_rate_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct pcxhr_mgr *mgr = snd_kcontrol_chip(kcontrol); + int i, err, rate; + + mutex_lock(&mgr->mixer_mutex); + for(i = 0; i < 3 + mgr->capture_chips; i++) { + if (i == PCXHR_CLOCK_TYPE_INTERNAL) + rate = mgr->sample_rate_real; + else { + err = pcxhr_get_external_clock(mgr, i, &rate); + if (err) + break; + } + ucontrol->value.integer.value[i] = rate; + } + mutex_unlock(&mgr->mixer_mutex); + return 0; +} + +static const struct snd_kcontrol_new pcxhr_control_clock_rate = { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_CARD, + .name = "Clock Rates", + .info = pcxhr_clock_rate_info, + .get = pcxhr_clock_rate_get, +}; + +/* + * IEC958 status bits + */ +static int pcxhr_iec958_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958; + uinfo->count = 1; + return 0; +} + +static int pcxhr_iec958_capture_byte(struct snd_pcxhr *chip, + int aes_idx, unsigned char *aes_bits) +{ + int i, err; + unsigned char temp; + struct pcxhr_rmh rmh; + + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_READ); + rmh.cmd[0] |= IO_NUM_UER_CHIP_REG; + switch (chip->chip_idx) { + /* instead of CS8420_01_CS use CS8416_01_CS for AES SYNC plug */ + case 0: rmh.cmd[1] = CS8420_01_CS; break; + case 1: rmh.cmd[1] = CS8420_23_CS; break; + case 2: rmh.cmd[1] = CS8420_45_CS; break; + case 3: rmh.cmd[1] = CS8420_67_CS; break; + default: return -EINVAL; + } + if (chip->mgr->board_aes_in_192k) { + switch (aes_idx) { + case 0: rmh.cmd[2] = CS8416_CSB0; break; + case 1: rmh.cmd[2] = CS8416_CSB1; break; + case 2: rmh.cmd[2] = CS8416_CSB2; break; + case 3: rmh.cmd[2] = CS8416_CSB3; break; + case 4: rmh.cmd[2] = CS8416_CSB4; break; + default: return -EINVAL; + } + } else { + switch (aes_idx) { + /* instead of CS8420_CSB0 use CS8416_CSBx for AES SYNC plug */ + case 0: rmh.cmd[2] = CS8420_CSB0; break; + case 1: rmh.cmd[2] = CS8420_CSB1; break; + case 2: rmh.cmd[2] = CS8420_CSB2; break; + case 3: rmh.cmd[2] = CS8420_CSB3; break; + case 4: rmh.cmd[2] = CS8420_CSB4; break; + default: return -EINVAL; + } + } + /* size and code the chip id for the fpga */ + rmh.cmd[1] &= 0x0fffff; + /* chip signature + map for spi read */ + rmh.cmd[2] &= CHIP_SIG_AND_MAP_SPI; + rmh.cmd_len = 3; + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + return err; + + if (chip->mgr->board_aes_in_192k) { + temp = (unsigned char)rmh.stat[1]; + } else { + temp = 0; + /* reversed bit order (not with CS8416_01_CS) */ + for (i = 0; i < 8; i++) { + temp <<= 1; + if (rmh.stat[1] & (1 << i)) + temp |= 1; + } + } + dev_dbg(chip->card->dev, "read iec958 AES %d byte %d = 0x%x\n", + chip->chip_idx, aes_idx, temp); + *aes_bits = temp; + return 0; +} + +static int pcxhr_iec958_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + unsigned char aes_bits; + int i, err; + + mutex_lock(&chip->mgr->mixer_mutex); + for(i = 0; i < 5; i++) { + if (kcontrol->private_value == 0) /* playback */ + aes_bits = chip->aes_bits[i]; + else { /* capture */ + if (chip->mgr->is_hr_stereo) + err = hr222_iec958_capture_byte(chip, i, + &aes_bits); + else + err = pcxhr_iec958_capture_byte(chip, i, + &aes_bits); + if (err) + break; + } + ucontrol->value.iec958.status[i] = aes_bits; + } + mutex_unlock(&chip->mgr->mixer_mutex); + return 0; +} + +static int pcxhr_iec958_mask_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + int i; + for (i = 0; i < 5; i++) + ucontrol->value.iec958.status[i] = 0xff; + return 0; +} + +static int pcxhr_iec958_update_byte(struct snd_pcxhr *chip, + int aes_idx, unsigned char aes_bits) +{ + int i, err, cmd; + unsigned char new_bits = aes_bits; + unsigned char old_bits = chip->aes_bits[aes_idx]; + struct pcxhr_rmh rmh; + + for (i = 0; i < 8; i++) { + if ((old_bits & 0x01) != (new_bits & 0x01)) { + cmd = chip->chip_idx & 0x03; /* chip index 0..3 */ + if (chip->chip_idx > 3) + /* new bit used if chip_idx>3 (PCX1222HR) */ + cmd |= 1 << 22; + cmd |= ((aes_idx << 3) + i) << 2; /* add bit offset */ + cmd |= (new_bits & 0x01) << 23; /* add bit value */ + pcxhr_init_rmh(&rmh, CMD_ACCESS_IO_WRITE); + rmh.cmd[0] |= IO_NUM_REG_CUER; + rmh.cmd[1] = cmd; + rmh.cmd_len = 2; + dev_dbg(chip->card->dev, + "write iec958 AES %d byte %d bit %d (cmd %x)\n", + chip->chip_idx, aes_idx, i, cmd); + err = pcxhr_send_msg(chip->mgr, &rmh); + if (err) + return err; + } + old_bits >>= 1; + new_bits >>= 1; + } + chip->aes_bits[aes_idx] = aes_bits; + return 0; +} + +static int pcxhr_iec958_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct snd_pcxhr *chip = snd_kcontrol_chip(kcontrol); + int i, changed = 0; + + /* playback */ + mutex_lock(&chip->mgr->mixer_mutex); + for (i = 0; i < 5; i++) { + if (ucontrol->value.iec958.status[i] != chip->aes_bits[i]) { + if (chip->mgr->is_hr_stereo) + hr222_iec958_update_byte(chip, i, + ucontrol->value.iec958.status[i]); + else + pcxhr_iec958_update_byte(chip, i, + ucontrol->value.iec958.status[i]); + changed = 1; + } + } + mutex_unlock(&chip->mgr->mixer_mutex); + return changed; +} + +static const struct snd_kcontrol_new pcxhr_control_playback_iec958_mask = { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK), + .info = pcxhr_iec958_info, + .get = pcxhr_iec958_mask_get +}; +static const struct snd_kcontrol_new pcxhr_control_playback_iec958 = { + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT), + .info = pcxhr_iec958_info, + .get = pcxhr_iec958_get, + .put = pcxhr_iec958_put, + .private_value = 0 /* playback */ +}; + +static const struct snd_kcontrol_new pcxhr_control_capture_iec958_mask = { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,MASK), + .info = pcxhr_iec958_info, + .get = pcxhr_iec958_mask_get +}; +static const struct snd_kcontrol_new pcxhr_control_capture_iec958 = { + .access = SNDRV_CTL_ELEM_ACCESS_READ, + .iface = SNDRV_CTL_ELEM_IFACE_PCM, + .name = SNDRV_CTL_NAME_IEC958("",CAPTURE,DEFAULT), + .info = pcxhr_iec958_info, + .get = pcxhr_iec958_get, + .private_value = 1 /* capture */ +}; + +static void pcxhr_init_audio_levels(struct snd_pcxhr *chip) +{ + int i; + + for (i = 0; i < 2; i++) { + if (chip->nb_streams_play) { + int j; + /* at boot time the digital volumes are unmuted 0dB */ + for (j = 0; j < PCXHR_PLAYBACK_STREAMS; j++) { + chip->digital_playback_active[j][i] = 1; + chip->digital_playback_volume[j][i] = + PCXHR_DIGITAL_ZERO_LEVEL; + } + /* after boot, only two bits are set on the uer + * interface + */ + chip->aes_bits[0] = (IEC958_AES0_PROFESSIONAL | + IEC958_AES0_PRO_FS_48000); +#ifdef CONFIG_SND_DEBUG + /* analog volumes for playback + * (is LEVEL_MIN after boot) + */ + chip->analog_playback_active[i] = 1; + if (chip->mgr->is_hr_stereo) + chip->analog_playback_volume[i] = + HR222_LINE_PLAYBACK_ZERO_LEVEL; + else { + chip->analog_playback_volume[i] = + PCXHR_LINE_PLAYBACK_ZERO_LEVEL; + pcxhr_update_analog_audio_level(chip, 0, i); + } +#endif + /* stereo cards need to be initialised after boot */ + if (chip->mgr->is_hr_stereo) + hr222_update_analog_audio_level(chip, 0, i); + } + if (chip->nb_streams_capt) { + /* at boot time the digital volumes are unmuted 0dB */ + chip->digital_capture_volume[i] = + PCXHR_DIGITAL_ZERO_LEVEL; + chip->analog_capture_active = 1; +#ifdef CONFIG_SND_DEBUG + /* analog volumes for playback + * (is LEVEL_MIN after boot) + */ + if (chip->mgr->is_hr_stereo) + chip->analog_capture_volume[i] = + HR222_LINE_CAPTURE_ZERO_LEVEL; + else { + chip->analog_capture_volume[i] = + PCXHR_LINE_CAPTURE_ZERO_LEVEL; + pcxhr_update_analog_audio_level(chip, 1, i); + } +#endif + /* stereo cards need to be initialised after boot */ + if (chip->mgr->is_hr_stereo) + hr222_update_analog_audio_level(chip, 1, i); + } + } + + return; +} + + +int pcxhr_create_mixer(struct pcxhr_mgr *mgr) +{ + struct snd_pcxhr *chip; + int err, i; + + mutex_init(&mgr->mixer_mutex); /* can be in another place */ + + for (i = 0; i < mgr->num_cards; i++) { + struct snd_kcontrol_new temp; + chip = mgr->chip[i]; + + if (chip->nb_streams_play) { + /* analog output level control */ + temp = pcxhr_control_analog_level; + temp.name = "Master Playback Volume"; + temp.private_value = 0; /* playback */ + if (mgr->is_hr_stereo) + temp.tlv.p = db_scale_a_hr222_playback; + else + temp.tlv.p = db_scale_analog_playback; + err = snd_ctl_add(chip->card, + snd_ctl_new1(&temp, chip)); + if (err < 0) + return err; + + /* output mute controls */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_output_switch, + chip)); + if (err < 0) + return err; + + temp = snd_pcxhr_pcm_vol; + temp.name = "PCM Playback Volume"; + temp.count = PCXHR_PLAYBACK_STREAMS; + temp.private_value = 0; /* playback */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&temp, chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_pcm_switch, chip)); + if (err < 0) + return err; + + /* IEC958 controls */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_playback_iec958_mask, + chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_playback_iec958, + chip)); + if (err < 0) + return err; + } + if (chip->nb_streams_capt) { + /* analog input level control */ + temp = pcxhr_control_analog_level; + temp.name = "Line Capture Volume"; + temp.private_value = 1; /* capture */ + if (mgr->is_hr_stereo) + temp.tlv.p = db_scale_a_hr222_capture; + else + temp.tlv.p = db_scale_analog_capture; + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&temp, chip)); + if (err < 0) + return err; + + temp = snd_pcxhr_pcm_vol; + temp.name = "PCM Capture Volume"; + temp.count = 1; + temp.private_value = 1; /* capture */ + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&temp, chip)); + if (err < 0) + return err; + + /* Audio source */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_audio_src, chip)); + if (err < 0) + return err; + + /* IEC958 controls */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_capture_iec958_mask, + chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_capture_iec958, + chip)); + if (err < 0) + return err; + + if (mgr->is_hr_stereo) { + err = hr222_add_mic_controls(chip); + if (err < 0) + return err; + } + } + /* monitoring only if playback and capture device available */ + if (chip->nb_streams_capt > 0 && chip->nb_streams_play > 0) { + /* monitoring */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_monitor_vol, chip)); + if (err < 0) + return err; + + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_monitor_sw, chip)); + if (err < 0) + return err; + } + + if (i == 0) { + /* clock mode only one control per pcxhr */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_clock_type, mgr)); + if (err < 0) + return err; + /* non standard control used to scan + * the external clock presence/frequencies + */ + err = snd_ctl_add(chip->card, + snd_ctl_new1(&pcxhr_control_clock_rate, mgr)); + if (err < 0) + return err; + } + + /* init values for the mixer data */ + pcxhr_init_audio_levels(chip); + } + + return 0; +} diff --git a/snd-pcxhr/src/pcxhr_mixer.h b/snd-pcxhr/src/pcxhr_mixer.h new file mode 100644 index 0000000..9c08620 --- /dev/null +++ b/snd-pcxhr/src/pcxhr_mixer.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Driver for Digigram pcxhr compatible soundcards + * + * include file for mixer + * + * Copyright (c) 2004 by Digigram + */ + +#ifndef __SOUND_PCXHR_MIXER_H +#define __SOUND_PCXHR_MIXER_H + +/* exported */ +int pcxhr_create_mixer(struct pcxhr_mgr *mgr); + +#endif /* __SOUND_PCXHR_MIXER_H */ -- cgit v0.10.2